DE1957971A1 - Message display system - Google Patents

Description

PATENT ADVOCATE
DIPL-ING.

HELMUT GÖRTZ

6 Frankfurt am Main 70
Schneckenhofstrasse 27-ToI. 61 7079

17th November 1969 Gzx / hk

Stewart-Uarner Corporation, Chicago, Illinois, U.S. A,

Message display system

The invention relates to display systems and, more particularly, to systems of the type in which display messages are sent via a fixed Matri :; of display elements is running.

The invention is based on the system proposed in German patent application No. P 19 03 464.1. The marquee message display system according to this application is able to input data from a source with suddenly varying Record rates and display the message at the rate of data entry, but not synchronized hereby so that an easily readable display is provided. This is done by keeping the data in a buffer is introduced at an intake rate and the data is output therefrom and onto the display board at a rate determined by the Depends on the amount of data that has been put into memory. In some applications of the system, such as B. for display of quotes posted by the stock exchange teletype news service, v / earth the data is recorded in blocks at short intervals, which allow the buffer to pass them on and cause the display to stop or start. When stopping and starting occurs quite often,

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like ζ, 'B for stock exchange news services with a small scope, such as For example, the American Stock Exchange Services, the effect on the display board can be quite confusing to the viewer be.

The system of the invention includes a fixed matrix display panel, Means for receiving the input data, means for forming the display characters on the display panel in correspondence with the recorded data, means that cause the formed characters to move across the display panel at a speed run, which depends on the rate at which the input data is recorded, and means for switching off the means that perform the movement of the characters at a predetermined time after the end of the recording of the input data. In this way it has System a kind of flywheel effect, which causes the message during brief interruptions in the reception of input data continues to run across the scoreboard.

^ he invention will be better understood from the following description, in particular in connection with the accompanying drawing which is a diagram showing the circuits which is essential for the creation of the flywheel effect in detail.

The system 100 receives data from an information source over the line 102, e.g. B. from a listing messaging teletype service, and displays characters from display board 104. Display board 104 contains a matrix of display elements 106, such as B. neon lamps with short switch-on times; the character data, which are developed by the circuits of the system are fed to the panel 104 so that the character on the right Page 108 is formed, which is caused by the

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Board to run in the direction of arrow 110. The data goes into a data acquisition device · 112 in a series of electrical Pulses, which represent bits of a binary code for the display characters. The data acquisition device contains a parallel-to-serial converter, so that all of the binary code bits for the character are read into a buffer storage unit 114 at the same time can. The reading of the data into the buffer and the flow of the data through it is controlled by a buffer control circuit 116, the z. B. may correspond to that in the above-mentioned application. When the input data is recorded and in parallel Form has been converted, a code-included signal is sent to the buffer controller to indicate that the data are available for storage in the buffer. The buffer 114 is made up of successive memories and stores the code bits for each display character in parallel in ■ the FoIr, e. and at the rate at which the display character data be included. After the data is introduced into the buffer, the buffer control 116 issues a code-stored signal back to the data receiver and series-to-parallel converter 112 to be reset for receiving the next character data.

The buffer control 116 controls together with a timer 118 variable frequency, which is used as a timer control of the systan serves, the final rate of the data bits through the buffer 114 and the triggering therefrom in the following circuits. The number of characters stored in buffer 114 (indicative of the rate of uptake of incoming information from the data source is determined by the variable frequency timer 118 and operates at a rate that matches it is to push the data through the buffer according to the above mentioned application. The circuit for changing the Frequency of the clock generator 118 preferably has a long and essentially linear switch-on sensitivity, so that rapid

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Changes in the rate of data input to slowly changing Rates of triggering from the buffer can be smoothed.

The data for each character, when in the last stage of the buffer, is taken from a character data decoder 120 decoded, which supplies a signal to a lamp coding circuit 122 over a certain conductor of a number. The number of conductors in the line to the lamp encoders is determined by the number of different characters required for the display, as well as the number of special functions, to be executed.

The lamp encoder 122 develops coding signals on conductors LR-itdsLR-n, each corresponding to a row of lamps. the Conductors LR-1bfeLR-n lead to lamp actuation circuits (not each of which controls one of the rows of lamps on display panel 104. How to get from the above registration As can be seen, each of the lamp actuation circuits includes a shift memory with one level for each column of the lamps on the blackboard. The state of each of the shift storage stages determines the state of the associated lamp and prepares it provide a driver circuit for this lamp. The coding signals for each row are simultaneously grounded for one column in each case Lamp actuation circuit for each row of lamps is read out so that each lamp in the column which is used to form that part of the Indicator is required, is stimulated. So z. B. to form the letter "C" the lamps in lines 2 to 6 the rightmost column of lamps 124 is excited during the first shift time. The second shift time causes the lamps in rows 2 through 6 in the second column 126 along with the lamps in rows 1 and 7 of the first Column 124 are suggested. The third shift actuated add the lamps in rows 2 to 6 in the third column 128

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together with the lamps from lines 1 and 7 in columns 126 and 124. The process continues until the entire letter "C" is formed, which then moves across the display panel in the direction of the Arrow 110 is moved column by column.

The column by column reading of the coding signals from the lamp encoder 122 is controlled by coding column scan signals from a column shift and lamp scan control circuit 156, which is also from the variable frequency clock 118 in the manner of above-mentioned application is controlled. Thus, the coding signals are read out to the display panel at a rate equal to the rate at which the input data is recorded is determined.

The column shift and lamp scan control also provides lamp shift pulses to the lamp actuation circuits in the display panel 104 which are synchronized with the column- by- column readout of the display character data from the lamp encoder 122. The lamp shift pulses trigger the shift memories to prepare the lamps in order to shift the coding signal from stage to stage in synchronization with the reading of the coditr signals from the lamp encoder into the shift register.

In addition, the column shift and lap scan control circuit 130 provides lamp scan pulses to the lamp actuation circuits in the panel to control the duration of the lamps for each column shift of the data in the lamp shift memory. The lamp scanning pulses, which are synchronized with the displacements, actuate the prepared door circuits for the lamps, so that the lamps only light up for the duration of the scanning pulses. As in the above-mentioned application, the lamps are turned on only once per shift and only for a short period of time in relation to the frequency with which the characters are shifted column by column across the board 110, so that multiple or widened images result.

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can be avoided in accordance with the above registration. after the Coding signals for each character were read to the board and the character was formed on the right side of the board, The column shift and lamp scan control 130 provides an end scan signal to the buffer control 116 and the buffer 114 which is the last stage of the buffer for advancing the data of the last character for reading Prepare in the scoreboard.

The column shift and lamp scan control contains the logic to synchronize the reading of the coding signals the board, the shifting of the signals via the shift memories on the board and the scans of the lamp circuit to operate the lamps. When the data for one character has entered the last stage of the buffer 114, the character data decoder becomes 122 causes data to appear in the last level of buffer 114; it provides a legit signal to the column shift and lamp scan control 130 indicating that a character of the Plate 104 is to be fed. The legit signal, which is used for the purpose of consistency with the above-mentioned application can be viewed as a positive going pulse is reversed by an inverter 132 and fed to a NAND gate 134, to prepare this for the passage of clock pulses, derived from the variable frequency clock 118. The variable frequency clock signal is divided by 12 by means of a-by-vifer-SchaKtrg 136 and a divided-by-three circuit 138. the Clock generator 12 / pulses are via gate 134 and the inverter a coding column shift counter 142 which the Coding column shift pulses to lamp encoder 122 in "sequential fashion as in the above-referenced application explained in more detail, delivers. The legit signal that the presence

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lie it of data in the last stage of buffer 114 indicates prepares the column shifter and scan control for the Transmission of lamp shift pulses to the display panel for shifting the data in the shift memories. That Legit signal sets a NOR gate flip-flop 144, which has the conductor 146 a NAND gate 148 for the passage of clocks 12 / pulses from counter 128 to a monostable multivibrator 150 prepared. The flip-flop 144 plays a role in the generation of the flywheel effect, as can be seen in more detail in the following description. The monostable multivibrator 150 provides a lamp displacement pulse for each recorded Clock 12 / pulse to store the data in the display lamp shift to move.

The lamp strobe pulses are also grounded from the output of the divided-by-three counter 138 as in the above noted dung derived. You will be using the output of the divided by four ZIUiler 136 fed to a NAND gate to a single Pulse per column shift: to be ensured via gate 152. The pulses coming from there are grounded by the delay circuit 154 slightly delayed and prompted a Lanpenprobe control circuit I36 to trigger which'die-width controls the pulses in accordance with an analog signal from the variable frequency clock so that the correct one Get the intensity of the visible pear image of the display as described in the above application.

As previously mentioned, the flip-flop 144 which controls the passage of the lamp displacement pulses to the panel plays one; Role in creating the flywheel effect during the gap between periods of data acquisition from the Source. The flip-flop is set by a Legi> signal, when character data enters the last stage of buffer 114 first. After reading the mark on the board,

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the coding column shift counter sends the end-of-scan signal to the buffer and the buffer controller, thereby clearing the data therein. If the data for another If characters are immediately available for the shift into the last stage of the buffer 114, another legit signal appears at the column shift and lamp scan control, which this causes the data to be read out to the board in order to form the new character thereon. However, if the data is for a new If characters do not appear immediately in the last level of the buffer, the legit signal is lost and a low signal appears on the output of transistor 164 by means of diode 162 and resistor 165 connected to the base electrode of the transistor are connected. Thus, transistor 164 (which normally switches in the presence of a positive legit signal conducts) with the loss of the legit signal and allows the capacitor 166 to pass through the resistor 168 and the Charge potentiometer 170 The capacitor 166, the resistor 168 and the potentiometer 170 together with the unijunction transistor 172 form a timer circuit 171 for supplying a Pulse through resistor 175 for a predetermined time interval after the loss of the legit signal at the base of the Transistor 164. The time constant of capacitor 166 and resistors 168 and 170 establish the predetermined time interval fixed before unijunction transistor 172 fires to generate a high pulse on the way through inverter 174 and a NAND gate to the reset terminal of the NOR gate flip-flop 144. Resetting flip-flop 144 places a high signal on conductor 146 which closes gate 148. The clock generator 12 / impulses No longer get to the multivibrator 150 and the displacement pulses to move the characters across the board 104 are stopped. The NAND gate "75 whose other input is via the inverter 178 to the count two output of the counter 138, prevents flip-flop 144 from being reset during a lamp shift pulse. The gate

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remains closed until the data for another character enters the last stage of the buffer for decoding by the character data decoder 120 occurs and up to the formation of the positive going legit signal. The flip-flop is set again • "iid the transistor 164 turned on to the timer capacitor 166 across the diode 180, transistor 164 and the low frequency tube resistor substantially short.

The RC time constant of the components in the uhi-function timer 171 can be easily selected by adjusting the potentiometer 170 so that the time interval before the Interruption in displacement is slightly longer than the mean interruption in taking data from the source. Thus, when a new character is picked up and advanced to the last stage of buffer 114 before the timer circuit 171 has the opportunity to reset flip-flop 144, the movement of the message is not interrupted and is the only one The effect is a higher number of unlit columns between the last character and the next recorded character be.

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Claims (4)

- ίο - Claims Message display system for the display of characters on Input data, with a display panel, means for receiving the input data, means for temporarily storing the Input data in the recorded order, means for forming a display character on the display board in correspondence with the most likely recorded data in the storage device, and means for moving the indicia via the display board, characterized by means (legit line, '', 44, 148, 164, 171) for controlling the Set up character movement in the presence of input data in the memory and for disabling the means for character movement predetermined period after the formation of the Character for the last input data stored in the memory. 2. System according to claim 1, characterized in that the memory is a shift register storage device with a plurality of stages , which has an output stage, and that the switch-on and switch-off means (legit line 144, 164, 171) have, which have the effect that they come into operation in the presence and the subsequent absence of input data in the output stage. That the Einsehalt- and off switch means comprises a switch arrangement (144) 3. System according to claim 2, characterized in that assume a state for switching the character movement capability means when the input data entering the memory device output stage, and a timer (171) "of at addresses the subsequent absence of input data in the output stage in order to U09823 / 1352 - BATH act that the switch arrangement the opposite State assumes to turn off the means causing the character movement a predetermined time thereafter. 4. System according to claim 3> characterized gekennzeiclinet that the Switch system contains a flip-flop circuit (144) and the timer contains a uni-function timer circuit (171). 009823/1352 Blank page