DE19534459A1 - Transfer unit for matrix field controller e.g. for regulation- and control-engineering - Google Patents

Abstract

A fuzzy logic controller has inputs received by a fuzzifier stage coupled to an inference stage that interprets the rules and then provides outputs from a defuzzifier. The process provides a transfer operation based upon 'n' inputs of X1 and X2 variables that are received by ramp function generators . The generator outputs are combined in a matrix of weighting elements C and these are summed to generate the output of the system.

Description

The invention relates to a transmission element with n inputs and at least one output, the transmission element providing a functional relationship y = f () between the input variables x _i applied to the n inputs and the output variable which can be tapped at the output, the functional relationship y = f ( ) by a multi-dimensional
Support grid is approximated by support points and the value range of each input variable x _i by means of m _i value range support points S _{i, ji} with i = 1 _,. . ., n and j _i = 1,. . ., m _{i is divided} into m _i -1 intervals of any size.

Such transmission links are used, for example in control engineering as a state controller, at those from several input variables one or more Output signals are generated.

A new trend is emerging in control technology from Fuzzy theory. A fuzzy controller is created using a defined linguistic description. Thus the Users without physical or mathematical Penetration of the control problem to be intuitive and easy understandable rule approach. Even simply structured Fuzzy controllers often have surprisingly good control behavior.  

Despite the intuitive approach to the actual one Controller design, a fuzzy controller has a clearly defined one and precisely predictable output behavior. Of the Fuzzy algorithm represents a unique mathematical Relationship between the input variables and the output variable of the controller. A fuzzy controller therefore corresponds to one Map controller or the one described at the beginning Transmission link.

For the implementation of a fuzzy controller for a Control technology applications are different options known. The fuzzy algorithms are often used on microcomputers or microcontrollers. This is the implementation of a fuzzy controller can be done relatively easily and quickly. The Implementation of a fuzzy system in the form of software offers the advantage of great flexibility, since modifications of the Program a new control algorithm can be processed. A well-known example of using a fuzzy controller Software basis is e.g. B. motion compensation in camcorders, with which the blurring of the pictures should be suppressed. At This solution was built on the existing microprocessor additionally fuzzy algorithms programmed to the image stabilize. This made a product improvement without additional hardware costs achieved. Software solutions for Simulation of a fuzzy controller are particularly then advantageous if a digital computer is already available stands, as is often the case with process control, for example the case is.

The development of special digital or analog fuzzy chips, where the developed fuzzy controller directly into one In contrast, integration technology is always available then advantages if either inexpensive solutions in large Pieces are required or the Processing speed of the controller must be high. However, digital controllers incur high costs when in Rule stretch used, the analog Have processing sizes. For coupling the digital A / D and D / A converters must then be used to control the controlled system  are provided, which take up a large chip area. Since the digital components themselves have a certain circuitry may require a digital System cannot be built with extremely small chip areas, so that relatively high manufacturing costs arise. Also require most application specific solutions further special ones Power or control electronics, making it a universal programmable control chip alone is not enough.

For example, need the necessary peripheral components The entire control electronics will be provided externally expensive. In this respect, for some applications there is just Range of simple regulations the need for simple Fuzzy controllers with small chip area that are in large numbers are manufactured and in which also the peripheral electronics can also be integrated on the chip.

A possible approach to realizing a fast analog Fuzzy controller consists of the simulation of the Output map, whereby the variables Membership functions and rules clearly defined Mapping an n-dimensional input vector onto a Maps output vector and thereby the output map of the Fuzzy controller is clearly determined. This illustration of the The output map of the fuzzy controller is based on the design of the Controller with a development environment. The through that Rules can be clearly defined in a picture multidimensional function network can be implemented without the Detour to go through the full rule processing. The the resulting realization is therefore actually Not a fuzzy controller, but a transmission element.

An example of a multi-dimensional functional network is a memory in which the function values are predetermined Support points are stored (look-up table). Be additional Provided for memory A / D and D / A converter, you get a easy to implement and flexible control system. For many Inputs and outputs or the converter with high resolution however, the required storage space quickly becomes extremely large, which means that  the cost of implementing such a system for the Mass production is unacceptable.

The object of the invention is therefore to provide a transmission link for Provide control and / or control routes, the Output characteristic field of the transfer function with a simulates low circuit complexity and a requires small chip area, reducing the cost of manufacture of the transmission link are low.

The object is achieved in that several one-dimensional function generators for each input are connected downstream that the outputs of the function generators are connected to inputs of weighting elements and that the sum signal of the output signals of the weighting elements can be tapped at the output of the transmission link.

The desired output map of the transmission link is approximated. An essential idea of the invention is that the Approximation does not take place directly, as is usually the case, i.e. the The complexity of the approximation functions depends on the Number of input quantities are, but that the approximation is broken down into one-dimensional functions that each input directly downstream, and simple weighting elements with only one parameter. This increases the complexity of the Approximation problems reduced, i. H. every single component has a simple structure and there is one structured solution that is particularly suitable for implementation in an integrated circuit is suitable.

During the decomposition, the value range of each of the n input variables is first subdivided using m _i nodes. There is an interpolation between the interpolation points on the m _i -1 intervals of each input variable with one-dimensional functions.

This means that exactly m _i -1 function generators R _{i, ji} are connected in parallel to each input. j _i = 2,. . ., m _i indicates the count index of the function generators of each input i.

The support points S _{i, ji of} each input i, in contrast, are of j _i = 1,. . ., m _i numbered.

The transmission link advantageously has a product of Number of nodes of each input variable i

corresponding number of weighting elements C _{11. . 1, . . ., m1. m2. . mn} , where m₁ is equal to the number of value range support points of the input variable x₁.

Linking the weighting elements with the Function generators are advantageously carried out in such a way that a weighting element is not connected to a function generator some weighting elements to a function generator, some on two, some on three, etc., until finally some Connect weighting elements to n function generators are. This connection scheme depends on the indices of the Weighting elements and will be explained in more detail below will.

In general, a weighting _element can be indexed as follows: C _{j1 j2. . . ji. . . jn,} where j _{i is} the running index indicative of input i. This running index corresponds to the indices of the function generators R _{i, ji} , since the value of i denotes the i-th input and the value of j _i the j _i- th function generator of the input i. The connection of the function generators to the weighting elements can now be read directly from the indices of the weighting elements by connecting the j _i -th function generator of input i for all j _i <1. This means that, for example, the weighting element C₁₁₁₁ is not to be connected to a function generator and thus realizes a constant additive value for map shift, the weighting element C ₂₁₃₁ to the function generators R _1.2 and R _3.3 and the weighting element C₄₅₂₈ to the function generators R _1.4 , R _2.5 , R _3.2 and R _4.8 are to be connected.

With two input variables (n = 2), each with seven support points (m₁ = 7, m₂ = 7) per value range you need m₁ × m₂ = 7 × 7 Weighting elements and 2 × 6 function generators.  

The weighting element C₁₁ is not connected to a function generator and realizes the constant additive value, the 12 weighting _elements C _{1 j2} to C _{j1 1} (j₁, j₂ = 2,..., 7) are each connected to a function generator and represent the edge contour, and the 36 weighting elements C₂₂ to C₇₇ are each connected to 2 function generators and form the actual map.

The output signals of the weighting elements C ₁₁ advantageously have _{. . 1, . ., m1. m2. . mn} values between zero and the amount of the product of the constant value I _ref and a weighting factor GF ₁₁ belonging to the respective weighting element _{. . 1, . ., m1. m2. . mn} lie. The value of the output signal of a weighting element is only greater than zero if the sum of the input signals of the weighting element is less than I _ref . The output signal of a weighting element can advantageously be switched to an adding or subtracting rail depending on the sign of the weighting factor belonging to the weighting element.

Alternatively, the previously mentioned range of values can also be renormalized such that it lies between the negative and positive amount of the product of the constant value I _ref and a weighting factor GF ₁₁ belonging to the respective weighting element _{. . 1, . ., m1. m2. . mn} lies. This standardization makes particular sense when using symmetrical differential levels.

The approximation of the map is based on the suitable one Breakdown of the map into sub-functions. The qualitative The course of the subfunctions can be determined as desired and depends on the respective underlying Circuit architecture for the realization of the sub-functions, as explained above, these are the function generators and the Weighting elements. Suitable functionalities for a realization in integrated MOS technology are, for example, linear or So-called sigmoid functions, for example in bipolar technology Exponential functions. Furthermore, these functionalities are carried out the selection of a voltage technology or a current technology certainly.  

A particularly simple construction of a transmission link results through the selection of linear ramp functions.

In this case, each input variable, as described above, m _i -1 ramp generators, the ramp generator R _{i, ji} for each input actual value x _i generates exactly one output signal RA _{i, ji} , which meets the condition RA _{i, ji} = max {0; (1 / A _{i, ji} ) (B _{i, ji *} I _ref -I in _{, i} )} follows, where I in _{, i} corresponds to the actual value of the input variable x _i , A _{i, ji} the Difference S _{i, ji} -S _{i, ji-1} corresponds to the support points
S _{i, ji-1} and S _{i, ji} limit the interval belonging to the ramp generator RA _{i, ji} , and B _{i, ji *} I _{ref is} equal to the value of the support point S _{i, ji} and I _{ref is} a constant.

The ramp generators R _{i, ji are} used to interpolate between the selected support points, as a result of which the number of support points can be limited to a necessary minimum. As a result, the circuitry complexity is decidedly reduced, which additionally increases the operating speed of the transmission element. The transmission element according to the invention is advantageously constructed in analog circuit technology, as a result of which the running times are limited to the settling time constants of the components used. Since all ramp generators are connected in parallel and also all ramp generators are constructed identically, all output signals of the ramp generators are available on the weighting elements at the same time. Furthermore, since only one reference signal I _{ref is} used for all ramp generators and weighting elements, the error in the output signal caused by the transmission element itself is limited to the statistical inaccuracies of the components which result from the manufacturing process.

To use the linear ramp functions described To be able to approximate a multi-dimensional map, Map suitable in surfaces or multidimensional bodies be disassembled.

In a system with two input variables, the rectangles formed by the support points distributed over the range of values of the respective input variables are broken down into two triangles, the triangles being created or approximated to the function curve of the output map using an approximation method. A triangle of a rectangle is assigned to a weighting element by the circuit structure. The slope of the triangle corresponds to the linear course of the output signal of the assigned weighting element. Due to the ramp-shaped course of the output signals of the ramp generators, only the weighting cells are active or deliver an output signal of an amount greater than zero if the sum of the input signals of the weighting element is less than the reference signal I _ref . The weighting cells, in which the sum of the input signals is equal to 0, deliver constant output signals I _ref times GF, which, depending on the sign of the weighting factor GF of the weighting element, are added to the output signal or subtracted from the output signal. The cells in which the sum of the input signals are greater than I _ref do not provide any part of the output signal.

In a circuit implementation of the described method, the input and output values mentioned can be represented by any electrical quantities. It is particularly advantageous to implement the approximation method in current or voltage technology, it also being possible to vary between these two circuit technologies within a circuit. This means in particular that the constant value referred to as I _ref can correspond to both a current and a voltage.

An advantageous implementation of the method in Voltage technology results, for example, from the application of operational amplifier circuits with resistors and Diodes are connected. Such operational amplifier circuits are known from the literature. In this case the Ramp functions described above as input functions.

In a mixed current and voltage technology, the Approximation method using so-called OTA structures  (Operational Transconductance Amplifier amplifiers) can also be realized in the literature to be discribed. With OTA structures arise non-linear one-dimensional functions in bipolar technology a tangent hyperbolic function and in a mos scarf so-called sigmoid functions.

It is advantageous if the signals are electrical currents, which makes it possible to implement the transmission element in MOS technology. For this purpose, electrical currents I _{a, i} proportional to the input variables xi are impressed at the inputs of the transmission element. In this case, ramp functions result for the function elements.

The ramp generators always consist of three current mirrors SP _A, SP _{ref and} Sp. All previously known or also future current mirror concepts can be used for these current mirrors, in particular also circuit variants in which the current mirror properties are improved by additional measures.

A particularly simple construction results for the basic type of current mirror, in which a current mirror SP _{x is formed} from two MOS transistors TR _{x, 1} and TR _{x, 2} , the source connections S _{x, 1} and S _{x, 2} and the gate connections G _{x, 1} and G _{x, 2 of} the two transistors TR _{x, 1} and TR _{x, 2} are connected to one another and the drain terminal D _{x, 1 of} the input transistor TR _{x, 1} to the gate terminals G _{x, 1} and G _{x, 2} is connected. The drain terminal D in _{, i of} the input transistor TR in _{, i} each forms an input of the transmission element. The transistors of the current mirror SP _{ref, i, ji are,} for example, p-channel transistors and the transistors of the current mirror SP are _{i, ji} and SP _{ramp, i, ji are} n-channel transistors, with the drain connections D _{a, i , ji, 2} , D _{re, i, ji, 2} and D _{ramp, i, ji, 1 of} the transistors are electrically connected to each other. The circuit can also be designed accordingly in complementary MOS technology or in bipolar technology. From the drain of the transistor TR D _{ref ref} of the constant electric current I flows _ref. The current mirrors of the ramp generators are characterized in that the current mirror SP in _{, i, ji} an amplification ratio of 1, the current mirror SP _{ref, i, ji} an amplification ratio of B _{i, ji} and the current mirror SP _{ramp, i, ji} an amplification ratio A _{i , ji} . With the help of the reference current _mirror SP _{ref, i, ji} , a current of the amount of the product of B _{i, ji} and I _{ref is} generated at the drain of the transistor TR _{ref, i, ji, 2} , which due to the p-channel type of the transistors of the Reference current _mirror SP _{ref, i, ji flows} out of the drain terminal D _{ref, i, ji, 2} . Depending on the size of the current impressed on the input transistor TR ein _{, i, 1 of} the current mirror Sp ein _{, i, ji,} this output current is divided between the transistors TR ein _{, i, ji, 2} and TR _{ramp, i, ji, 1} . A current I _{ramp, i, ji} = (1 / A _{i, ji} ) × (B _{i, ji} ×) thus flows through the output transistor TR _{ramp, i, ji, 2} through the predetermined amplification ratio of the output current mirror SP _{ramp, i, ji} I _ref -I _{a, i} ). Since the current through the output transistor TR _{ramp, i, ji, 2} cannot become negative, the output current I _{ramp, i, ji will} only give a value unequal to 0 if the input current I in _{, i is} less than the product of B _{i , ji} times I _ref is. The suitable choice of the amplification factors A _{i, ji} and B _{i, ji} ensures that a weighting element is only active if at least one input variable assumes a value that lies in the interval belonging to the weighting element.

It is also advantageous if the weighting elements C _{11th . 1, . ., m1. m2. . mn} each by two current mirrors SPC _{ref, j1. . . jn} and SPC _{off, j1. . .jn are} formed, a current mirror SPC _{x being formed} from two MOS transistors TRC _{x, 1} and TRC _{x, 2} , the source connections S _{x, 1} and S _{x, 2} and the gate connections G _{x , 1} and G _{x, 2 of} the two transistors TRC _{x, 1} and TRC _{x, 2} are connected to one another and the drain terminal D _{x, 1 of} the input transistor TRC _{x, 1} with the gate connections G _{x, 1} and G _{x, 2} is connected and the transistors of the current mirror SPC _{ref, j1. . .jn} p-channel and the transistors of the current mirror SPC _{out, j1. . .jn are} n-channel transistors. As already mentioned above, swapping the n- and p-channel current mirrors is also possible here. The drain connections D _{ref, j1. . .jn, 2} and D _{off, j1. . .jn, 1 of} the transistors are electrically connected to one another and the connection point of the drain connections D _{ref, j1. . .jn, 2} and D _{off, j1. . .jn, 1} forms the input of the weighting _element . From the drain D _{ref, j1. . .jn, 1 of} the transistor TRC _{j1. . .jn, 1,} which advantageously corresponds to the above-mentioned reference _transistor TR _ref , the electric current I _{ref flows} . The current mirror SPC _{ref, j1. . .jn} an amplification _ratio of 1 and the current mirror SPC _{off, j1. . .jn} a _{gain ratio} GF ₁₁ proportional to the weighting factor of the weighting _{element . .1, . . 1, . ., m1. m2. .mn} on.

In a special embodiment, the weighting members have C _{1. . ji. . 1, . ., m1. .ji. . mn} each have a number of n-channel input transistors, the number of input transistors corresponding to the number of ramp generators R connected to the weighting element. By connecting the input transistors of the weighting element connected in parallel, depending on the output signal of the individual ramp generators, the reference current I _ref flowing out of the drain terminal of the reference transistor TR _{ref, 2 is} divided between the individual input transistors and the output transistor TR _{, i} . As long as the sum of the currents flowing through the input transistors is smaller than the magnitude of the reference current I _ref , a residual current flows out through the output _transistor TR _{, j1. . .jn, 1} . This residual current is with the weighting factor GF _{j1. . .jn of} the respective weighting _{element is} reinforced and is applied to the output of the weighting _element .

It is particularly advantageous if SP _{ref, i, ji} and SPC _{ref, j1} for all current mirrors _{. . .jn} only a common transistor TR _{ref, 1 is} used, which means that at all gate connections of the reference transistors TR _{ref, i, ji, 2 of} the ramp generators R _{i, ji} and TRC _{ref, j1. . .jn, 2 of} the weighting _elements C _{j1. . .jn} the same potential is present and the statistical error of the circuit of the transmission element is thus minimal.

The weighting element G ₁ is advantageous _{. . 1 . . 1} generates a constant output current, which is added to the output signal of the transmission element as an offset.

There is also an advantage if, in addition to the weighting element C _{1. . 1 . . 1} , which has only a limited range of values, which is adapted to the range of values of the other weighting elements, any constant offset can be set by a further functional element.

To set the respective amplification ratios of the current mirrors used in the ramp generators and weighting elements, for each output _transistor TR _{from, j1. . .jn, 2} the current mirror SP _x and / or SPC _{x of} the weighting _elements C _{1. . ji. . 1, . ., m1. . ji. . mn} and the ramp generators R _{i, ji} or to the input transistors of the weighting elements, a plurality of transistors of the same type are connected in parallel, so that the amplification ratio of the respective current mirror can be set. The drain, gate and source connections are in electrical connection with one another.

In a likewise preferred embodiment, the transistors additionally connected in parallel are combined in groups of a multiple of two, the drain, gate and source connections of the transistors in a group being in electrical connection with one another and the connection point of the drain connections of the additional ones Transistors in each group with one contact or connection of a switching element is in connection and the other contact or connection of the switching element with the drain connection of the output transistor TR _{from, 2 is} in connection. The switching elements are electronic switches, in particular transistors or relays, and can be controlled by means of an electronic control. This advantageously ensures that the setting of the current mirror weights or amplification factors A _{i, ji} , B _{i, ji} and C _{j1. . .jn is} arbitrarily adjustable or programmable, with the use of z. B. 7 or 15 parallel connected input transistors in groups of 1, 2, 4 and 8 transistors of the output current z. B. a weighting _element can assume values between 0 and 15 times I _ref . Useful values for the resolution of the current mirror weights or reinforcements are 3-4 bits depending on the number of support points and the course of the map, one bit being realized by a group.

To the given output map as well as possible it is advantageous if the inversion of the input variables with an inverter is possible. This enables the map to be oriented to the Function generators and the weighting elements optimal be adjusted.

The following is based on possible embodiments Invention explained in more detail.

Show it:

Fig. 1 is a block diagram of a fuzzy controller.

Fig. 2 is a calculated output map of a fuzzy controller.

Fig. 3a A distribution of support points in the xy plane.

Fig. 3b A possible decomposition of the xy plane into triangles.

Fig. 4 block diagram of a transmission element.

Fig. 5 structure of a simple current mirror

Fig. 6 Structure of a ramp generator.

Fig. 7 output functions of ramp generators.

Fig. 8 is a circuit diagram of two ramp generators connected to a weighting element.

Fig. 9 A programmable current mirror.

Fig. 10 Structure of a differential current mirror .

In the area of control technology, the structure shown in FIG. 1 for a fuzzy controller has prevailed. This architecture, consisting of fuzzifier, inference block for rule processing and defuzzifier, is well known. The output characteristic field, as shown in FIG. 2, is uniquely determined by means of the defined input functions, the established rules of the fuzzy controller and the defuzzification methods. For each pair of values x₁ and x₂, the output quantity y = f (x₁, x₂) is assigned exactly one value by the characteristic diagram. The fuzzification, inference and defuzzification blocks can thus be replaced by the determined output characteristic field. With the stored transfer function, the transfer element maps the input vector to the output vector.

Fig. 3a shows an example of a transmission element with two inputs, a basic variable area, which is spanned by the two input variables x₁ and x₂. The value ranges of the input variables x₁ and x₂, which are applied to the inputs of the transmission element, are divided into intervals of any size by means of support points. This results in a lattice structure of m₁ vertical and m₂ horizontal lines. Four support points form the corner points of a rectangle. In order to achieve linear interpolation through planes, the rectangles are broken down into two triangles, as shown in FIG. 3b. Similar decomposition methods are also used in mechanics when calculating with finite elements. The intersection lines for dividing the rectangles must all run in the same direction. This division of the total area means that only every second triangle has to be realized in the desired conversion into an analog circuit. The rectangle in which the hatched triangle E _j1j2 lies is _{considered below} . The slope of the triangle 2 is determined in the x₁ and x₂ direction by the slope of the triangles 1 and 3 . The hatched half of the rectangle determines the slope of the triangles 4 in the x 1 direction and 5 in the x 2 direction. Accordingly, in this example only the triangles are realized, the right angle of which is at the top right.

This assignment is arbitrary and can be changed accordingly so that all triangles with the right angle at the bottom left are selected. Correspondingly, the diagonal (not shown) can also be used as the intersection line through the rectangles. Each triangle spans a plane that is clearly determined by the corner points of the triangle. For the hatched triangle, the delimiting straight lines are drawn in bold in FIG. 3b. Outside this area, the following should apply to the course of the level _piece E _j1j2

The values x _{1, j1} and x _{2, j2} denote the j₁-th or j₂-th support point in the x₁- and x₂-direction. These conditions set the "active" area of each section of the plane to a triangle and allow the planes to be approximated sequentially to a given function.

The above requirements can be met for m₁ × m₂ nodes on the input intervals x₁ ∈ [x _1.1 , x _{1, m1} ] and x₂ ∈ [x _2.1 , x _{2, m2} ] _{using the} following mathematical calculation:

The output function g (x₁, x₂) is calculated according to equation 2 from the sum of all partial amounts of the individual levels E _j1j2 . The limitation of the levels to a triangular partial area is achieved by the maximum function in equations 3, 6 and 7. The value resulting from the maximum operations is between 0 and 1.

For the proposed approximation method (m₁-1) × (m₂-1) planes E _{j1j2 are} required. In addition to the levels, however, the edge contour of the map on the axes must be specified. This is achieved by m₁ + m₂-1 additional contributions, in each of which only one input variable is active. Along the x₂ axis, according to equation 4 u₀ (x₁) = 0, and along the x₁ axis, according to equation 5 v₀ (x₂) = 0. At the reference point x _1.1 , x _2.1 , there is a constant function value , which is set with the parameter C₁₁. Overall, there are m₁ times m₂ contributions to the entire approximation function, which must be implemented by a corresponding number of functional units. To simplify the circuit architecture, it makes sense to design all units in the same way, even if the cells for the edge contour do not implement levels but straight lines and the proportion of C₁₁ is independent of the input variables.

Each cell has only one free parameter C _j1j2 , which indicates the slope of the plane. As a result, the circuit outlay for each individual circuit block is minimal. In addition to the plane cells m₁-1 ramp generators for the x₁ direction and m₂-1 ramp generators for the x₂ direction are required, which restrict the effective range of the partial amounts according to equations 6 and 7.

The circuit structure resulting from these considerations is explained below. The highest output level of the subfunction is independent of the location of the support points, since the increase in the x₁- and x₂-direction is limited. The maximum contribution of a level to the output function therefore depends exclusively on the selected parameter C _j1j2 .

The accuracy of the approximation is determined by the number of Levels determined. Mathematically, the approximation is great Number of levels as exact as you want. From the perspective of Circuitry is based on the number of levels on the one hand the circuit effort or, in the case of an integrated solution, the Chip area and on the other hand due to calculation errors statistical process fluctuations limited. The profit at systematic accuracy through a larger number of levels is then relativized by a lower quality of reproduction. A reasonable field size depends on the one to be approximated Map between 16 and 81 levels or weighting elements at 2 input variables.

The adjustment of the levels to a given map can be done in simplest case can be done using an iterative calculation if the base distribution is known. This can for example, an equidistant division of the support points be. This defines the ramp functions. The Level slopes can then be determined so that each the values of the levels with the function values F (x₁, x₂) of approximate function at the support points. The calculation of the slope begins with the value C₁₁ and is then done line by line or column by line after the following Scheme:

C _1.1 = f (1.1)
C _j1.1 = f (j₁, 1) -f (j₁-1.1) for j₁ = 2,. . ., m₁
C _{1, j2} = f (1, j₂) -f (1, j₂-1) for j₂ = 2,. . ., m₁
C _{j1, j2} = f (j₁, j₂) -f (j₁-1, j₂) -f (j₁, j₂-1) -f (j₁-1, j₂-1)

The arithmetic described with reference to FIGS. 1 to 4 leads to a circuit structure in electrical engineering which, due to its regularity, is suitable for a programmable analog circuit and can therefore be used universally for various problems.

Fig. 4 shows the block diagram of a transmission element with m₁ = m₂ = 7, ie 49 support points. Since the number of weighting elements to be implemented corresponds to the number of support points, 49 cells must be provided in this example. The number of ramp generators is (m₁-1) + (m₂-1) so 12. The lower margin of the coefficients C _j1 and the left _{margin column} with the factors C _1j represent straight lines, and the value C₁₁ allows the setting of a constant offset. The summation of all individual levels according to equation 2 is carried out in the circuit by adding all the partial currents in the output node.

The ramp generators must be functional Implement the relationship between equations 6 and 7.

FIG. 5 shows the implementation of a simple current mirror in MOS circuit technology, which forms the basic element of an advantageous circuit design of the approximation method described in current technology. This current mirror can be improved in its circuit properties by additional transistors in accordance with the alternatives known from the literature and other conceivable alternatives. The transmission range of such a current mirror is between 0 and a maximum value which is determined by the dimensioning of the MOS transistors by means of W 1 / L 1 and W 2 / L 2.

Fig. 6 illustrates the circuit principle for the generation of a ramp function, consisting of three current mirrors. The output transistor TR _{ramp, i, ji, 2} is the input transistor of a weighting cell and is additionally shown here to the input function of a weighting cell charge to. In the overall concept, several transistors are connected in parallel to TR _{ramp, i, ji, 2} .

The ramp generator is composed of the three current mirrors SP _{ref, i, ji} , SP _{, i, ji} and SP _{ramp, i, ji} . The transistors of the current mirror SP _{ref, i, ji are of} the p-channel type, and the transistors of the current mirror SP _{a, i, ji} and SP _{ramp, i, ji of} the n-channel type. The current B _{i, ji} × I _ref flows from the drain terminal of the current mirror transistor TR _{ref, i, ji, 2} due to the amplification ratio B _{i, ji} . This current is divided into transistors TR _{, i, ji, 2} and TR _{ramp, i, ji, 1} , current I always flowing through transistor TR ein _{, i, ji, 2 , i} . Due to the amplification ratio 1 / A _{i, ji of} the output current mirror SP _{ramp, i, ji} , the current I _ramp flows through the current mirror transistor TR _{ramp, i, ji, 2 , i, ji} = (1 / A _{i, ji} ) (B _{i , ji} × I _ref -I _{a, i} ). Since the current through the transistor TR _{ramp, i, ji, 2} cannot become negative, the output current I _{ramp, i, ji} follows the maximum function max {0; (1 / A _{i, ji} ) (B _{i, ji} × I _ref -I _{a, i} )}.

The input current I designated in FIGS. 6 and 7 _{, i} represents the input variable x _i , ie x₁ and x₂ of FIGS . 3a and 3b. A _{i, ji} corresponds to the slope of the ramp I, j _i and B _{i, ji} x I _ref indicates their end point. As is clear from FIG. 7, the ramp i, j _i for input values x _i <x _{i, ji-1} or I in _{, i} <B _{i, ji-1} × I _{ref is} not limited. Only the previous function i, j _i -1 may be active in this area. The adjustment of the grid point can be adjusted flexibly via the current mirror weights or gain factors A _{i, ji} and B _{i, ji} . The two parameters are decoupled from each other and allow the choice of the ramp slope and the effective range,

FIG. 8 shows the circuitry combination of a ramp generator of an input variable with a weighting element. For all ramp generators and the weighting element, only one reference transistor TR _{ref is} provided, the gate and drain connection of which are connected to the gate connections of the reference transistors TR _{ref, i, ji, 2 of} the ramp generators and TR _{ref of} the weighting elements. The amplification ratio of the current mirrors thus formed can be set individually for the ramp generators R _{i, ji} and weighting _elements C _j1j2 . The amplification _{ratio of} the current mirror SPC _{ref of} the weighting elements is I, as a result of which the current I _ref flows from the drain terminal of the transistor TR _{ref of} the weighting _elements C _j1j2 . This current I _ref is divided between the input _transistors TR _{ramp, 1, j1.2} and TR _{ramp, 2, j2.2} and the output _transistor TR _{, j1, j2.1 of} the weighting _element C _j1j2 .

Since the output currents of the _ramp generators I _{ramp, 1, j1} and I _{ramp, 2, j2 are} determined by the input _transistors TR _{ramp, 1, j1.2} and TR _{ramp, 2, j2.2} by the potentials present at the input _{transistors of} the weighting _element , flows through the output _transistor TR _{, j1, j2,1} the current I _ref -I _{ramp, 1, j1} -I _{ramp, 2, j2} . This current is amplified by the output current _{mirror of} the weighting _element with the factor C _j1j2 . Due to the MOS transistors, the output current cannot become negative. The output current I _{out, j1, j2 can be impressed} on an adder _rail I _add or a subtractor _rail I _{sub by} means of an electronic switch. The output current of a weighting _element is therefore in the range from 0 to I _ref times C _j1j2 .

The approximation method underlying the circuit principle described above requires the basic variable range to be divided into triangles. The lines of intersection for the subdivision were initially selected arbitrarily from top left to bottom right in FIG. 3b. This results in an asymmetry of the map. For some functions, the approximation becomes cheaper if the diagonals running from the bottom left to the top right are selected. An exchange of the diagonals corresponds to the mirroring of a variable axis around its center, or in terms of circuit technology, the inversion of an input variable.

In order to achieve a network structure that is as regular as possible, all weight cells should be identical. The offset of the entire map is over the weighting member C₁₁ set. For maps that have a large functional value F (1.1) have, extends over the weighting element C₁₁ adjustable value is not always off because of the current mirror factors of the individual modules are limited in their values. Therefore it makes sense to add an additional constant current in the Feed in output nodes if the functional history so required.

For the implementation of a desired map in a multi-dimensional functional network, the number of support points must first be determined. The characteristic course of the map is then determined by the current mirror weights or amplification factors A _{i, ji} and B _{i, ji} for the ramp generators and C _{j1j2. . .jn set} for the level _slopes . In principle, it is possible to create a layout for a specific solution that realizes exactly one map. The construction of the concept from a matrix-like arrangement of cells is, however, suitable for a universal network structure that can be programmed for various applications.

For this purpose, all weighting _elements C _j1j2 jn are dimensioned identically and provided with programmable current mirrors, as shown in FIG. 9. The current mirrors made up of unit transistors connected in parallel are combined in binary-weighted groups in order to keep the programming effort for the circuit low. For a current mirror that is programmable with 3 bits, 7 parallel base transistors are arranged in groups of 1, 2 and 4 transistors. The output current can therefore assume values between 0 and 7 × (I _ref -I _{ramp, 1, j1} -I _{ramp, 2, j2} ). Useful values for the resolution of the current mirror weights are 3 to 4 bits depending on the number of support points and the course of the map. A further bit must be provided for the output switch of each cell if the selection of a positive or negative level permits inclination.

In the ramp generators, which are all built the same way, 2 current mirrors must be programmable: One current mirror for setting the ramp slope and one for the Shift the end point of each ramp. To a sufficiently fine one To enable shifting of the support points, it makes sense the resolution of the current mirror weights in the ramp generators to be interpreted somewhat larger than in the weighting elements. Guide values for these current mirrors are 4 to 6 bits per Current mirror.

In addition to the programming options mentioned above should be programmable for a universal circuit  Offset current and one switchable inverter per input to be available.

An important property of the circuit concept is that the Programming is done in discrete steps Signal processing but is still completely analog. The Digital programming has the advantage that no manual Adjustment for the setting of a specific map is required.

An equally advantageous construction of the transmission element results if, instead of the previously described asymmetrical current mirrors according to FIG. 5, current mirrors with a symmetrical transmission range according to FIG. 10 are used. The circuit structure described above can also be implemented analogously with the differential current mirror shown in FIG. 10. The advantage of residual current mirrors lies, on the one hand, in the signal value range that is symmetrical for many analog applications and, on the other hand, in the principle-related lower influence of the supply voltage and other interference effects on the current transmission behavior. In this arrangement, as shown in FIG. 10, the current mirror factor results from the design of the differential stage transistors used in the current mirror.

Legend

T1: TR on _{, 1, j1,1} = TR on _{, 1}
T2: TR on _{, 1, j1,2}
T3: TR _{ref, 1, j1.2}
T4: TR _ref
T5: TR _{ref, j1j2} = TR _ref
T6: TR _{ramp, 1, j1.1}
T7: TR _{ramp, 1, j1,2}
T8: TR _{ramp, 2, j2.2}
T9: TR _{off, j1j2,1}
T10: TR _{out, j1j2,2}
T11: TR _{ref, 2, j2.2}
T12: TR on _{, 2, j2,1} = TR on _{, 2}
T13: TR on _{, 2, j2.2}
T14: TR _{ramp, 2, j2.1}

Claims (37)

1. Transfer element with n inputs and at least one output, the transfer element providing a functional relationship y = f () between the input variables x _{i present} at the n inputs and the output variable which can be tapped at the output, the functional relationship being y = f () by a multi-dimensional grid point is approximated by grid points and the value range of each input variable x _{i is divided} by m _i value range grid points S _{i, j} , with i = 1. .n and j = 1. .m _i , into m _i -1 intervals of any size, characterized,

• - that each input is followed by several one-dimensional function generators,
• - That the outputs of the function generators are connected to inputs of weighting elements and
• - That the sum signal of the output signals of the weighting elements can be tapped at the output of the transmission element.

2. Transmission link according to claim 1, characterized in that each input exactly m _i -1 one-dimensional function generators R _{i, ji} are connected in parallel to one another. 3. Transmission element according to one of the preceding claims, characterized in that the transmission element is a product corresponding number of weighting elements C _{11. . 1, . ., m1. m2. . has mn} , where m _{i is} equal to the number of wide-range support points of the input variable x _i . 4. Transmission element according to one of the preceding claims, characterized in that the indexing of the weighting elements corresponds to the connection of the ramp generators by the weighting _element C _{j1 j2. . . ji. . . jn} = 1 no ramp generator of input i and for all j _i <1, with j _i = 2.. .m _i , the j _i -th ramp generator of input i is connected. 5. Transmission element according to one of the preceding claims, characterized in that the values of the output signals of the respective weighting elements C _{11th . 1, . ., m1. m2. . mn} between zero and the amount of the product of the value I _ref and a weighting factor GF ₁₁ belonging to the respective weighting element _{. . 1, . ., m1. m2. . mn} , lie. 6. Transmission element according to one of the preceding claims, characterized in that the values of the output signals of the respective weighting elements C _{11th . 1, . ., m1. m2. . mn} between the negative and positive amount of the product of the value I _ref and a weighting factor GF ₁₁ belonging to the respective weighting element _{. . 1, . ., m1. m2. . mn} , lie. 7. Transmission element according to one of the preceding claims, characterized in that the value of the output signal of a weighting element is only greater than zero if the sum of the input signals of the weighting element is less than I _ref . 8. Transmission element according to one of the preceding claims, characterized in that the Output signal of a weighting element depending on the sign of the weighting factor belonging to the weighting element Total signal is additive or subtractive superimposed. 9. Transmission link according to one of the preceding claims, characterized in that the Function generators any non-linear functionals have, in particular those functional, which in a electrical circuit can be realized. 10. Transmission element according to one of the preceding claims, characterized in that the function generator is a ramp generator, wherein:

• - the function generator R _{i, ji} to each input actual value x _i exactly one output signal RA _{i, ji} generated which the condition RA _{i, ji} = max {0, 1 / A _{i, ji} (B _{i, ji *} I _ref - _{a, i} )} follows,
• - where I _{a, i} corresponds to the actual value of the input variable x _i ,
• A _{i, j} corresponds to the difference S _{i, ji} -S _{i, ji-1} , the support points S _{i, ji} -1 and S _{i, ji} limiting the interval belonging to the ramp generator R _{i, ji} ,
• - B _{i, j *} I _{ref is} equal to the value of the value range support point S _{i, ji} and
• - I _{ref is} a constant.

11. Transmission link according to one of the preceding claims, characterized in that the Input and output variables of the transmission link through any electrical quantities can be represented, in particular through voltages or currents. 12. Transmission element according to one of the preceding claims, characterized in that at the inputs of the transmission element to the input variables x _i proportional electrical currents I _{a, i can be} impressed. 13. Transmission element according to one of the preceding claims, characterized in that a ramp generator is composed of three current mirrors SP _{, i, ji} SP _{ref, i, ji} and SP _{ramp, i, ji} . 14. Transmission element according to one of the preceding claims, characterized in that the Current mirror any structure in MOS or Have bipolar technology, especially such Architectures in which the current mirror behavior is caused by additional measures can be influenced or improved. 15. Transmission element according to claim 13, characterized in that the current mirror SP _{x are} each formed from two MOS transistors TR _{x, 1} and TR _{x, 2} , the source connections S _{x, 1} and S _{x, 2} and each Gate connections G _{x, 1} and G _{x, 2 of} the two transistors TR _{x, 1} and TR _{x, 2} are connected to one another and the drain connection D _{x, 1 of} the input transistor TR _{x, 1} to the gate connections G _{x, 1} and G _{x, 2} is connected. 16. Transmission element according to claim 15, characterized in that the drain terminal D in _{, i of} the input transistor TR in _{, i} forms an input of the transmission element. 17. Transmission element according to one of the preceding claims, characterized in that the transistors of the current mirror SP _{ref, i, ji} p-channel and the transistors of the current mirror SP _{, i, ji} and SP _{ramp, i, ji} n-channel transistors are. 18. Transmission element according to one of the preceding claims, characterized in that the drain connections D _{, i, ji, 2} , D _{ref, i, ji, 2} and D _{ramp, i, ji, 1 of} the transistors are electrically connected to one another . 19. Transmission element according to claim 18, characterized in that the constant electric current I _ref flows from the drain terminal D _{ref, 1 of} the transistor TR _{ref, i, ji, 1} . 20. Transmission element according to one of the preceding claims, characterized in that the current mirror SP _{a, i, ji} an amplification ratio of 1, the current mirror SP _{ref, i, ji} an amplification ratio of B _{i, ji} and the current mirror SP _{ramp, i, ji} have a gain ratio A _{i, ji} . 21. Transmission element according to one of the preceding claims, characterized in that the weighting elements C _{11th . 1, . ., m1. m2. . mn} each by two current mirrors SPC _{ref, j1. . .jn} and SPC _{off, j1. . .jn are} formed, a current mirror SPC _{x being formed} from two MOS transistors TRC _{x, 1} and TRC _{x, 2} , the source connections S _{x, 1} and S _{x, 2} and the gate connections G _{x , 1} and G _{x, 2 of} the two transistors TRC _{x, 1} and TRC _{x, 2} are connected to one another and the drain terminal D _{x, 1 of} the input transistor TRC _{x, 1} to the gate terminals G _{x, 1} and G _{x, 2} is connected and the transistors of the current mirror SPC _{ref, j1. . .jn} p-channel and the transistors of the current mirror SPC _{out, j1. . .jn are} n-channel transistors. 22. Transmission element according to claim 22, characterized in that the drain connections D _{ref, j1. . .jn, 2} and D _{off, j1. . .jn, 1 of} the transistors are electrically connected to each other and the connection point the drain terminals D _{ref, j1. . .jn, 2} and D _{off, j1. . .jn, 1 forms} the input of the weighting _element . 23. Transmission element according to claim 23, characterized in that from the drain terminal D _{ref, j1. . .jn, 1 of} the transistor TRC _{ref, j1. . .jn, 1} the constant electric current I _ref flows. 24. Transmission element according to one of the preceding claims, characterized in that the current mirror SPC _{ref, j1. . .jn} an amplification _ratio of 1 and the current mirror SPC _{off, j1. . .jn} a _{gain ratio} GF ₁₁ proportional to the weighting factor of the weighting _{element . . 1, . ., m1. m2. . has mn} . 25. Transmission element according to one of the preceding claims, characterized in that the transistors TR _{ref, i, ji, 1} and TRC _{ref, i, ji, 1 can be implemented} by a single transistor TR _ref . 26. Transmission element according to one of the preceding claims, characterized in that the weighting elements C _{1. . ji. . 1, . ., m1. . mn} each have a number of n-channel input transistors, the number of input transistors corresponding to the number of ramp generators R _{i, ji} connected to the weighting element. 27. Transmission element according to one of the preceding claims, characterized in that the source connections of the ramp transistors with the source connection of the transistor TRC _{out, j1. . .jn, 1} and the drain connections of the ramp transistors with the drain connection of the transistor TRC _{out, j1. . .jn, 1 are} electrically connected and that the output transistor of a ramp generator is simultaneously the input transistor of the associated weighting element. 28. Transmission element according to one of the preceding claims, characterized in that the weighting element C _{1. . 1 . . 1 is} not connected to a ramp generator and thus generates a constant output current which can be added or subtracted from the output signal of the transmission element as an offset. 29. Transmission element according to one of the preceding claims, characterized in that a additional functional element for setting a There is an offset value. 30. Transmission link according to one of the preceding claims, characterized in that the Current mirror, the transmission ratios not equal to 1 have, are programmable.   31. Transmission element according to one of the preceding claims, characterized in that for each output transistor TR _{ramp, i, ji, 2} the current mirror SP _{x of} the ramp generators R _{i, ji} and / or TR _{off, j1. . .jn, 2} the current mirror SPC _x the weighting _elements C _{1. . 1 . . 1, . ., m1. . mi. . mn} several transistors of the same type can be connected in parallel, with which the amplification ratio of the respective current mirror can be set. 32. Transmission link according to claim 32, characterized characterized that drain, gate and Source connections of the transistors connected in parallel are in electrical connection with one another. 33. Transmission element according to one of claims 32 or 33, characterized in that the transistors connected in parallel in groups of 2 ⁿ with n = 0, 1.. . are summarized, the drain, gate and source connections of the transistors grouped together being in electrical connection with one another and the connection point of the drain connections in each case being connected to the one contact or connection of a switching element S _i . 34. Transmission link according to claim 34, characterized characterized in that the switching elements electronic switches, in particular transistors or relays are controlled by an electronic control are. 35. Transfer switch according to claim 35, characterized characterized in that the other contacts or Connections of the switching elements are interconnected and form the output of the current mirror.   36. transmission link according to one of the preceding claims, characterized in that the n and p-channel current mirrors are interchangeable. 37. transmission link according to one of the preceding claims, characterized in that additional Functional elements are available with which the input variables are invertible.