DE1951965C - Amplitude filter for separating sync pulses from a composite video signal - Google Patents

Description

that the resistor-capacitor Netzweik over a first resistor with the emitter of a first transistor belonging to the cutoff stage and upper a second resistor is connected to a control point of the amplitude limiter.

It should be noted that by this type of connection of the Amplituder.siebs at its normal output none Veitikal sync pulses become available. Of course May be a completely separate amplitude sieve to separate the vertical sync pulses but this requires many additional parts.

According to a further principle of the invention, however, it is possible to separate the vertical sync pulses to be realized in the same amplitude sieve if this has the characteristic that to separate the vertical sync pulses separately, two more connected as differential amplifiers Transistors are added to the amplitude filter, the base electrode of the first with the resistor-capacitor network and the base electrode of the second transistor with the output electrode of the amplitude limiter is galvanically connected and the collector electrode of the second transistor forms a second output from which the Veitikal synchion pulses are taken be able.

An embodiment of the invention is shown in the drawings and will be described in more detail below described. It shows

F i g. 1 the amplitude sieve according to the invention,

F i g. 2 synchronized pulses with the ripple voltage shown in the 'resistor-capacitor network without the measure according to the invention,

3a shows the video signal with superimposed ripple voltage, like this at the amplitude limiter in the circuit arrangement according to FIG. 1 is effective,

F i g. 3 b the Koilektorsti) m of the amplitude limiter according to FIG. 1,

F i ». 3c the collector voltage of the Ainpliutdenbegrer.zers according to Fig. 1,

F i g. 3d the current with the ripple voltage drawn in it on the wide-stand capacitor network, by one of the amplitude limiter according to FIG. 1 subsequent cutting stage,

F i g. 3 e is the collector current of one of the two transistors of the dirferential amplification according to FIG. 1 for separate separation of the vertical sync pulses.

In Fig. 1, the transistor 1 forms the amplitude limiter, while that is denoted by 2: structure is the clipping stage for clipping the horizontal synchronous pulses.

With 3 the differential amplifier is referred to, the for separate separation of the vertical sync pulses cares.

The video signal 4 is fed to the emitter electrode of the npn transistor 1 via a resistor 5 with positive horizontal sync pulses. The collector of the same is connected via an output resistor 6 to the supply voltage source, which supplies a supply voltage of + Vv volts. At the same time, the collector electrode of transistor 1 is connected to the atm input of cutoff stage 2. This cut-off stage 2 exists in the example according to FIG. 1 from two transistors 7 and 8 in Darlington connection. As will be explained later, this is done in order to facilitate the cutting of the vertical synchronizing pulses with the aid of the differential amplifier 3. If this is not done in this way, the clipping stage 2 can consist exclusively of the transistor 8, the collector electrode of the transistor 1 being directly connected to the base electrode of the transistor 8. In the case according to FIG. 1, however, the collector electrode of transistor 1 is connected to the base electrode of transistor 7, which ensures that the control current is multiplied by a factor «'so that the collector current ie ₂ flowing through transistor 8 is significantly increased.
The emitter electrode of the transistor 8 is connected to the resistor-capacitor network 10 via a relatively small resistor 9 of, for example, 260 ohms, which consists of a resistor 11 of, for example, 10 kOhms and a capacitor 12 of, for example, 0.2 μ? exists, connected. The

ao resistor-capacitor network 11, 12 is the network mentioned at the beginning with a relatively small time constant compared to the period of ^ 5U Hz that occurs in the vertical synchronous interval Vertical sync pulses. The resistor 9 is only

small and serves to set the charging time of the capacitor 12 in the case of leading transistors 7 and 8. Because, as shown below on the basis of FIG. 2 and 3, the capacitor must be charged 12 at a certain speed

take place, which can be set as desired with the resistor 9.

The connection point of the resistor-capacitor network 10 is via a resistor 13 of for example 10 kOhm with the base electrode of the

Transistor 1 connected. ¹ At the same time, 4 ^t: this connection point is connected to the base electrode of a transistor 14 which forms part of the differential amplifier 3. This further contains a transistor 15 and a transistor 16. The base electrode of the transistor 16 is connected to the connection point of a voltage consisting of the resistors 17 and 18. voltage divider connected, which voltage divider

directly to the supply voltage source, which the

Supply voltage of + Vv volts is connected

is, so that the collector current of the transistor 16 is thus determined. Therefore, the transistor 16 worries known manner for the fact that the differential amplifier 3 is supplied with a constant current, the Control signals at the base electrodes of the transistors

14 and 15 determine which part of this current through the transistor 15 and which part through the Transistor 14 flows. At the end it is indicated that in the collector electrode of the transistor 15 a second from a capacitor 20 of, for example, 22 kpF and a vv'iderstand 21 of, for example, 6.2 kOhm existing resistor-capacitor network 19 is added. The resistor-capacitor network 19 is used to integrate the Veitikal sync pulses, so that the output terminal 22, which is connected to the collector electrode of the transistor 15 is, the integrated vertical synchronization signal 23 'can be taken. This separated vertical sync signal 23 'can, if necessary, be fed to a further cutting stage, which then receives the cut-out Virtual synchronous pulses can be taken.

The output terminal 22 can be used as the second output terminal of the amplitude filter according to FIG. 1

consider while the output terminal 23, which is with the amplitude limiter 1 and see the network

connected to the collector electrode of transistor 8 and is at the same time the base of the ampli

is, the first output terminal forms, which the Aus- tudenbegrenzers 1 via the resistor 13 with the

cut horizontal sync pulses 24 taken from resistor-capacitor network 10 connected,

men can be. For this purpose, the collector electrode 5 is thus not only achieved that the connection of the

of the transistor 8 via an output resistor 25 amplitude limiter with the resistor-condenser

also to the supply voltage source of + Vv volt sator network from its emitter electrode to its

connected. Base electrode has been laid, but also that

To explain the mode of operation of the invention by switching on the cut-off stage 2, the wave-like amplitude sieve and at the same time to indicate io speed voltage 26 on the network 10 from the occurrence the disadvantages of the network 10 made independent of the vertical sync pulses with a small time constants are shown in FIGS. 2 and 3 is some streams. This can be explained as follows, and voltages indicated as these completely or 'In P i g. 3, α the input signal 4 is shown, partly in the amplitude sieve according to FIG. 1 occur. like this via the resistor 5 of the emitter electrode

In Fig. 2 shows the voltage Ve ₁ , 15 of the transistor 1 is supplied. At the same time, the / ", - Kb characteristic curve of the transistor 1 is shown in this like this on the network 10 as a function of time when the capacitor 12 is not present. It is assumed that the base space and at the same time it is assumed that the resistor 13 of the transistor 1 is detached by the value Vb ₁ , ie the value from the connection point of the resistors 9 and 11 at which the collector current / _e , of the transistor 1 and on fixed potential is set. This ao cut is given. At the same time, in Fig. 3, α voltage Ve ₁ represents separated horizontal, smoothing ripple voltage 26 is shown, as this and vertical sync pulses 10 10 will occur. If the ripple voltage 26 were to produce a ripple voltage like this by: h the arrangement of the resistor 13 in the dash-dotted line 26 in FIG. 2 as the output signal is not superimposed, the angcist. This ripple voltage is during the construction given amplitude of the signal 4 and the possible stepping dei vertical Synchrontmpulse from the time Z _n as the applied bias voltage of the collector current i _r shown not entirely accurate, because the discharge of each at the occurrence of Synchronimpulsc abgedes capacitor 12 the resistor Ii be a conscience. Inclination takes place by superimposing the waviness constants. This tendency is in the time voltage 26, the collector current ι _{β |} but now sections Z, -> z _? , ie during a line time, or only truncated in the times /, and z _s , and in the time segments Z ₄ -> Z ₆ , Z «-> r», ie during which this is no longer half the line times for all other times , shown exactly and therefore in the case, as can be clearly seen from Fig. 3,6. Given time segments Z _n -> · Z ₁₁ or Z ₁₄ -> r _1B , that is to say that it is assumed that the ripple voltage 26 times in which reverse horizontal synchronous 35 is correctly indicated, then the one shown in FIG. 3,6 since impulses occur, not. However, this is shown in FIG. 2 set collector current / _Cl flow, which in turn is made for the sake of convenience, because otherwise in Vei a voltage drop across the resistors will result in this description of the effect of the invention, so that the signal at the collector electrode of the would be difficult to explain. Transistor 1 will have a shape like this one

In each case, it can be seen from Fig. 2 that the 40 is indicated by the voltage Vt _x in Fig. 3, c. Ripple voltage 26 to network 10 in time From Fig. 3, e it can be seen that in each case in the time segment in which the horizontal sync pulses each cut Z ₁ -> Z ₁ , Z ₁ -> / ₄ , Z ₅ -> ■ z , etc. occur to einschließnach a line time (where g in F i 2 lent the period Z ₁₅ -. »- Z _1, each peak-shaped only the time period U - * ■ Z ₃ is illustrated), a stress occurs, making it possible indicated by means of the mean value by the line 27. In 45 of the cut-off arrangement 2 a collector current i _Cr time segment Z ₄ -> t _t , ie the time segment in which, as indicated in FIG. 3, d , through which the smoothing pulses occur, the mean value transistor 8 is to be allowed to flow. Because the transistor Ϊ has this ripple voltage indicated by the line 28, regardless of the small voltage drop, and in the time segment z, - »■ Z ₁ , and following, resistor 9, at its emitter electrode a ripple, ie the vertical sync interval, would be in Active voltage, which is shown in FIG. 3, c by the dashed point the mean value of the ripple voltage is indicated by the dotted line 26. This comes ripple voltage is roughly indicated by the line 3 (from the fact that the capacitor 12 is indicated in the line return. Approximately because, as can be seen from Fig. 3, d , Z ₁₁ -> Z ₁₁ , Z ₁₄ - * ■ z _ls etc. It is almost impossible to discharge this mean value of the ripple voltage as well British patent specification 959 694 indicates that since a collector current first flows in transistor 8, the average threshold voltage would be if the voltage at its base increased by one for the amplitude filter during the occurrence of the amount K ₆ , Smoothing and vertical sync pulses fluctuate strongly 60 transition, in English called junction voltage, which means that the amplitude is higher than the level indicated by the line 30 separated sync pulses fluctuate. This is the transistor 8 will only be able to conduct current, to whom for the horizontal synchronization around the occurrence of the input signal at its base electrode V _be VoI

of the vertical sync pulses around fatal as this is higher than that indicated by the line 30

to the already mentioned effect of a skew 65 average level. That creates resistance '

leading to the top of the picture. Signal F _e , however, is at the base of the transistor '

In order to avoid this and that, after is effective, so that the threshold voltage Vt

According to the principle of the invention, the cut-off stage 2 between the transistor 7 must be taken into account. Dahe

it can be said that first the collector current, thanks to the small time constant of the network IC, will flow through the transistor 8 if the span would have an alternating amplitude, which, voltage Vc, is 2 Vt * volts higher than that through the as at the beginning explains an image depth on the upper line 30 indicated levels. That is, it will first bring about ropes of the umbrella. That is, i <collector current / V ₁ flow through the transistor 8, 5 the clipping stage 2 fulfills a double task when the signal V _{C [} at the base of the transistor 7 j _Sjc , _{by its clipping} effect between the lines indicated by the line 31 in Fig. 3, r indicated _{the p} , “ ₃ , _{and 32 that the amp} , _iludi level have exceeded w.rd. If further _{s | | s according to F. 3 rf or dcs From} ^K will come that the transistor 8 in saturation signals 24 are always the same, (bottoming) when the signal V _c , the through to

the line 32 exceeds the specified level, sees ² It separates the network 10 from the amplitude

one that from the signal Ve ₁ a strip is cut out limiter 1.

through the levels of lines 31 and 32.Therefore, the peak currents that cause the condensate

is determined. Therefore, the transistor 8 will have to charge the generator 12, always the same amplitude,

a collector current / <· ₂ and a current corresponding to this current is also not of an interaction between

corresponding emitter current flow, as shown in FIG . 7 i g. 3, rf network and amplitude limiter talk about what

is specified. is probably the case when the network 10 in the emitter

A consideration of FIG. 3, rf shows that actual conduction of the amplitude limiter, as in the British patent specification 959 694 see essentially only thin pulse-shaped currents, would be included. Because flow and that the broad vertical synchronizing pulses ao are then no longer in the signal according to FIG. 3, rf are present. Sync pulses the threshold voltage changes, that is, the signal / _ej according to FIG. 3, rf is at the output and thereby the emitter current, which again leads to an input resistance 25 to generate a signal 24 that does not lead to fluctuations in the threshold voltage, which is only always the same amplitude, but rather its effect of changing the threshold voltage in a width during the occurrence of the vertical synchronous »s such a circuit is much larger than it will change only slightly in the sound pulses. Therefore the direction according to FIG. 1 of the present invention avoids the image depth at the top of the screen. The case is because it contains the base current of transistor 1, In F iß. 3, rf is also indicated by the dash-dotted line that via the resistor 13 also through the network line 26, the ripple voltage that flows at 10 will occur with respect to the emitter current of the transi-resistor network 10. As a result of the 30 stors 8 is negligible. Because the last-mentioned relatively small value of the resistor 9 is the emitter current compared to the base current of the transistor, the capacitor 12 is amplified many times with the transistor 8 leading sistor 1, always charged up to the maximum value of the signal Peak voltage 26 at the base of transistor 1 effective the ripple voltage 26 against the level of 35 will be when the start of the circuit arrangement line 3Γ. However, since the time between two voltages of a vertical sync pulse is not directly line pulses (line time) is greater than the time blanked wildly, it can be seen on the basis of FIG. 2 explain in more detail between two smoothing pulses (half line time). On the basis of FIG. 2 an attempt is made to describe the duration of this start-up phenomenon in a vertical synchronization interval. For this purpose, in vertical synchronous pulses occurring, the discharge of the capacitor 12 in the time segment I _n - * ■ Z ₁₁ or / _M -► Z ₁₅ becomes the discharge of the capacitor 12 in the time segment l _t - * ■ t ₃ charging of the capacitor 12 via the resistor 11 must be greater than shown in the following time segments with an exaggerated slope, and therefore t _A - * ■ I ₆ etc. or I ₁₀ - * ■ I _n etc. This also enables the capacitor to be charged 12 over which the ripple voltage 26 in the times Z ₁ , resistor 9 for the time segments t _lt -> I ₁₃ or I _{3 has} a less positive value than in the times 45 Z ₁₅ - * ■ Z ₁ , ie the time segments, in which vertical-'s. r ?. t », tu and Z ₁₆ . The fact that the synchronizing pulses set forth in FIG. 3, rf are effective, is shown in a pronounced manner. Ripple voltage 26 in FIG. 3, α exactly drawn From this pronounced representation, net ist in any case, should emerge from the fact that it follows that in the time segments Z ₁₁ -> I ₁₃ or z _ls the level of the line 31 'is also indicated in FIG. 3, σ - + t _{lt is} a small collector current in transistor 1 and both in FIG. 3, α as well as in Fig. 3, rf 50 will flow because, as also for the ripple span, the ripple voltage will flow in the same way with respect to voltage 26 according to Fig. 3, rf was said to be a positive line 3Γ. This ripple voltage runs at the base

Since the ripple voltage in Fig. 3, rf under the transistor 1 the blocking of the Kollektoi current / _e ,

half of the line 31 ', the ripple as a result of the vertical synchronous

voltage 26 in Fig. 3, a on the left side which counteracts 55 pulses. The small peak currents that

Line 3Γ lie. The input signal is shown in Fig. 3, α occur in these time segments, although they are in

shown running negatively because the emitter beginning is not as large as it is in FIG. 3.6 stated

electrode of transistor 1 is placed. are, but they are already to some extent

Since, as I said, the collector current i _Ci as a result of the contribute that the small pulse-shaped currents

combined effect of the applied video signal 4 60 will flow through transistor 8. These little ones

and the ripple voltage 26 arises, you can see that pulse-shaped currents have the consequence that the

that the peaks of the current i _Cl in FIG. 3, b on a discharging of the capacitor 12 through the resistor

other levels occur in times Z ₁ and Z ₃ 11 over a somewhat longer period of time

than at times Z ₆ , Z ₇ , Z ₉ , Z ₁₂ and Z _1S . This can have an effect, so that the state is somewhat after

results in the collector voltage K _e , which occurs in FIGS. 65, 3, rf. This long unloading brings with it

named times different amplitudes, that again a larger charge over the

has, so that without using the cut-off stage 2 resistor 9 must be supplied so that the

also the output signal of the amp mouth limiter slope of the wave wedge voltage in the time segments

Ίιι -> 'is or i, ₆ -> / _l6 increases what. again results in somewhat larger pulse-shaped currents, etc. In the end, a state of equilibrium will have established itself, as shown in FIG. 3, d is shown.

From the above it can be seen that the output terminal 23 can only be taken from horizontal sync pulses because the vertical sync pulses have disappeared therefrom. Measures must therefore be taken to also separate the Veitikal sync pulses. As already mentioned at the beginning, this is achieved with the differential amplifier 3. Namely, the base of the transistor 14 from the differential amplifier 3 becomes the ripple voltage as shown in FIG. 3, c is shown, while the signal K _{C |} is effective. This has the consequence that a collector current U _{1 will} flow through the transistor 15, as is shown in FIG. 3, e. In the time periods I ₁ -> / "/ _a -> / ₄ , 's -►'". '? - * ■ ta, t ₉ -> t, "/" - * · /, 4 etc. the voltage K _{e will be} a good distance above the level indicated by the line 30. The current through transistor 15 is now taken over by the current through transistor 14 when the voltage at the base of transistor 15 is somewhat higher than that of transistor 14. As can be seen from a consideration of FIG. 3, c, this is the case this is definitely the case in the periods of time mentioned, which explains the shape of the collector current U _1.

The current i _e will cause a voltage across the resistor 21 which is phase opposite to that shown in FIG. 3, e is reversed, and with the aid of the integration by means of the capacitor 20, the integrated partial image signal 23 'is produced at the output terminal 22.

It is assumed that the input signal 4 has a certain DC voltage level, so that it lies in the base space of the transistor 1, as in FIG. 3, α is shown. Should this not be the case, for example by coupling the signal 4 via a capacitor, then, if necessary, by means of a additional bias at the emitter of transistor 1 ensures that the signal 4 on is brought to the desired level

It can further be seen from consideration of FIG. 3, c (line 32) that the upper side of the pulses according to FIG. 3, </ before the times / ₂ , / ₄ , t _t , t _B , tw, f ₁₃ and / _{lt are ended} due to the sloping trailing edges of the pulses in FIG. 3, c. As a result, the peaks of the ripple voltage 26 may also be shifted somewhat, but this is difficult to do in the

ίο different figures can be represented and for practice makes no difference.

In conclusion, it should be noted that, although in the embodiments according to FIG. 1 junction transistors are shown, also so-called MOST-FET trans-

is sistors can be used. In particular, this is for the amplitude limiter 1 is important because then there is absolutely no bast current through the resistor 13 will flow, so that the charging and discharging of the network 10 exclusively by the emitting current

ao of transistor 8 and the value of resistor 11 is determined. Incidentally, the same applies to transistor 14, because this too is partially connected to network 10 a base current is drawn, which is not the case in the case of a MOST-FET transistor. by the way

as remains the mode of operation of the circuit arrangement according to FIG. 1 same. One must pay attention to that in the case of MOST-FET transistors for base electrode gate electrode, for emitter electrode source and for collector electrode drain must be read.

It should also be mentioned that it is not necessary that the composite video signal always have smoothing pulses contains. With the English 405 line system for example, these smoothing pulses are missing.

The amplitude sieve according to FIG. 1 is particularly suitable for being integrated in a semiconductor (IC circuit arrangement), since there are only two capacitors (12 and 20) which cannot be integrated in the semiconductor body. This is probably the case for all other parts and that means that only two additional terminals (ground and supply voltage terminal + Vv must always be present) have to be arranged on the semiconductor body.

1 sheet of drawings

Claims (4)

output of the limiter and a resistance (ZJ) -Konden- Paient claims: satoi (C) network with a small time constant compared to the period of the vertical sync pulses 1. Amplitude sieve for separating syn- contains. chronimpulses from a composite S. Such an amplitude sieve is from the British Video signal with at least horizontal and patent specification 959 694 known. The application of the Vertical sync pulses, which amplitude-small time constant of the resistor-capacitor sieve is equipped with transistors, and an am- Networks »is in this well-known amplitude sieve plitudenbegrenzer, a cut-off stage, means necessary to ensure that at fast Feeding of the video signal to an input io fluctuations in the amplitude of the input signal the limiter and a resistor (/?) - Condeii- the threshold voltage generated at the capacitor Sator (C) network can follow these rapid fluctuations with a relative to the period. Is this of the vertical synchronizing pulses small Zeitkon- is not the case, when the amplitude is reduced contains stanten, thereby identifying the incoming video signal of the amplitude net, that the resistor-capacitor network 15 limiters can not do its job well, (10) via a first resistor (9) with the and video information appears in the disconnected Emitter of a first synchronous signal to the cutting stage (2). This affects the synchronous listeners Transistor (8) and a second sation. Resistance (13) with a control point of the ampli- The rapid fluctuations in the amplitude of the tudenbegrenzen (1) is connected. 20 input signals can occur as a result of inter- 2. Amplitude sieve according to claim 1, characterized in that referenced from television reflected on aircraft, that the cut-off stage (2) a transmission signals occur The automatic contains the second transistor (7) connected to the first amplification control circuit in the television receiver Transistor (8) connected in a Darlington circuit cannot follow these rapid fluctuations, is, the output of the amplitude limiter 35 whereby the amplitude of the demodulated video (1) with the base electrode of the second transistor signal is also exposed to fluctuations. (7) burn-Jen, whose emitter electrode is also called automatic when used the base electrode of the first transistor (8) gain control circuits can this phenomenon Bound is, while in the emitter line of the _m en occur. Then it will be known to occur first trans ^; stors {8) the first resistor (9) 30 of an unsynchronized state that is and the resistor-capacitor network (10) provided mechanical gain control circuit and drop in the collector line of the first transistor control voltage and the amplitude of the (8) whose collector a first output (23) video signal suddenly increase. This increased of the amplitude sieve, a signal that rejects the output can, for example, be given in dark places stand (25) are included. 35 of the image again an automatic gain 3. Generate amplitude sieve according to one of claims 1 control voltage, whereby the amplitude and 2, characterized in that the video signal drops again for the separate. If the th separation of the vertical sync pulses between two receivers is still in its unsynchronized state, which is switched as a differential amplifier (3), the amplitude of the transistor (14, 15) then rises in the amplitude filter. Signal again. The speed of these are taken, the base electrode of the fluctuations being dependent on the time constant of the first further transistor (14) with the resistance of the smoothing network in the automatic mind-capacitor network (10) and the base gain control circuit. The time constant of the electrode of the second further transistor (15) resistor-capacitor network in Amplitudenmit the output of the amplitude limiter (3) 45 sieve must be shorter than that of the smoothing network is galvanically connected, and the Kollektorelek- i _n the automatic Verstäikungsregelungsschaltrode of the second further transistor a device, since otherwise the amplitude sieve fluctuations forms the second output (22) for taking the vertical in the video signal as a result of this last-mentioned Uisache sync pulses. can not follow. 4. Amplitude sieve according to one of the preceding 50. However, reducing a time constant has claims, characterized in that the amplitude limiter (1), both transistors (7, 8), as described in British patent specification 959 694, has the consequence that with the vertical synchronization of the cut-off stage (2), both transistors (14, 15) interval! Vertical Synchronimpulfin occurring, the _ne of the differential amplifier (3), a resistor (H) _e i have much greater duration than the Horizo .. »aides resistor-capacitor Netzweikes (10), the 55 or the equalizing pulses, the threshold voltage of the first ( 9) and the second resistor (13), in one on the capacitor in the resistor-capacitor-network-semiconductor! bodies are integrated. work of the amplitude sieve., shows strong fluctuations. This also changes the amplitude of the separated sync pulses. This causes in 60 of the time of occurrence of the vertical sync pulses a change in that of a phase discriminator im The invention relates to an amplitude sieve line deflection part output control voltage. There- in the separation of sync pulses from a through a skew arises in the picture, immediately after Composite video signal with at least Hori termination of the vertical sync pulses (visible »Ntal and vertical sync impulses, which 65 at the top of the screen of the picture tube). this mplitudensieb is equipped with transistors, and is undesirable. NEN amplitude limiter, a cut-off stage, so that this skew is avoided, the inven- for feeding the video signal to a proper amplitude filter, the indicator