DE1935609C3 - Arrangement for impressing two oppositely variable direct currents, the sum of which is constant, in two separate consumer resistors - Google Patents

Description

The invention relates to an arrangement for impressing two oppositely variable direct currents, whose sum is constant, according to the preamble of the patent claim. Such an arrangement is in the DE-AS 11 75 281 described.

In telecommunications there is often a need to have a constant, predetermined direct current in to divide two oppositely variable currents. If one current increases, the other current should decrease and vice versa, true * the sum of both Currents should remain constant. For example, there is only a dual circuit of two indirectly heated thermistors possible if the heating currents of the thermistors change in opposite directions and their sum remains constant (cf. NTZ 5, 1963, pp. 263 to 268, "Dual circuit of two indirectly heated thermistors"). Even with automatic adjustable cosine equalizers (see. German Patent 11 30 002), which bridged as equalizer elements T-links with two counter-regulated, contain indirectly heated thermistors, two oppositely variable heating currents are also required, the sum of which remains constant.

There are also applications in which a resistance of a variable direct current should be flowed through, while the total power consumption must remain constant. This is for Example then the case when a variable power consumption of the circuit is affected by retroactive effect the supply voltage changes in an impermissible manner.

Electronic setting devices are known (cf. German Patent 11 18 831) which can supply two currents which can be varied in opposite directions. They contain a reversible digital counter, which consists of η transistorized, bistable multivibrators and is made to count up or down by continuation pulses. From the collectors of the m first transistors of the flip-flop stages, partial currents are decoupled via appropriately dimensioned decoupling resistors, the sum of which results in the step-wise variable heating current of a first thermistor. From the collectors of the respective second h, transistors of the flip-flops, partial currents are decoupled via appropriately dimensioned decoupling resistors, the sum of which results in the step-wise variable heating current of a second thermistor. The decoupling resistances R \, Ä2 ... R _{n of} the individual flip-flops are in the ratio

R _n IR _n .,; .., R ₂ IR ₁ = 2: 4 ... 2 »" ·: 2 «

staggered

The setting device acts as a variable series resistor to the heater of each thermistor, and if so the ratio of the voltage drop across the heater to the operating voltage of the adjustment device is very small, so the heating current is inversely proportional to the mentioned series resistance. With every step-up pulse, iler reaches the setting device, the heating current of one thermistor is approximated by one same constant amount and the heating current of the other thermistor decreases by the same amount. the Heating currents therefore change approximately linearly.

If the voltage drop on the heater of the thermistor is not compared to the operating voltage of the setting device negligible, the heating currents no longer change linearly, and the sum of the two heating currents is no longer constant.

DE-AS 11 75 281 provides an arrangement for impressing two oppositely variable direct currents known according to the preamble of claim, in which at least two transistors with Differential amplifier containing common emitter series resistor at one input (control input) by a control voltage that controls the current distribution and by a constant one at the second input Reference voltage is controlled, and the collector currents of the two transistors of the differential amplifier as the two oppositely variable currents are used.

This solution has the disadvantage that a voltage drops across the common emitter series resistor, which is the same is greater, the more constant the sum of both currents must be. That is the total voltage and power consumption great. In addition, the complexity of this arrangement is also too great.

In contrast, the invention is based on the object of the power loss and also the circuitry Reduce effort.

This object is achieved by the features characterized in the patent claim.

An arrangement with resistors in parallel emitter-collector circuits two transistors connected complementarily in two series-connected emitter followers are, wherein the resistors are arranged in the emitter lines, the base of the first Transistor with the control voltage source controlling the current distribution and the base of the second Transistor is connected to the emitter of the first transistor is in a different context per se known (DE-OS 14 49 441, Fig. 3). It is true that this arrangement inevitably results in the impression of two opposing directions variable direct currents in the collector resistors, but this effect is not there Generating a constant amount of electricity used. Rather, it is a sense amplifier there in arrangements for reading and writing information in a data storage system in which the collector resistors should act as current limiters.

An embodiment of the arrangement according to the invention is shown in the figure. Ts 1 is a

npn transistor, Ts 2 is a pnp transistor, R 1 and R 2 are the two load resistors and Ust is the voltage that controls the current distribution, if / 1 is the current through R 1 and / 2 is the current through R 2, then

/ 1 + / 2 = / g.

(1)

If the voltages dropping across the base-emitter paths of the transistors are referred to as UEBi and UEB 2 and if the arrangement is at the load voltage UB, then it is

/ 1 =

VAT - UEB 1

= Ig- II

/ 2 =

UB - UEBl - / IRl R2

(2)

(3)

Au: i equations (2) and (3) result

η = ig-

UB - UEBl - / IRl
R2

and by transforming equation (4)

UB - UEBl

Rl

Since the right side of equation (5) represents a constant value, this equation can only be satisfied when R 1 = R 2

The arrangement according to the invention is compared to the known arrangement with a differential amplifier also less expensive because the control voltage dividers and the common emitter resistor are no longer necessary.

1 sheet of drawings

Claims (1)

Claim: Arrangement for impressing two oppositely variable direct currents, the sum of which is constant, in two separate consumer resistors, which are each located in parallel emitter-collector circuits of two transistors, the base of the first transistor being connected to the control voltage source controlling the current distribution, in particular for use in pilot-operated ones Level regulators in multi-channel carrier frequency wide-area traffic systems, characterized in that the two transistors (Ts I ₁ Ts 2) are connected complementarily in two emitter followers connected in series, the load resistances (ÄI ₁ R 2) being the same size and arranged in the emitter leads, and the Base of the second transistor {Ts 2) connected to the emitter of the first transistor (Ts ί) is L