DE1932744C - Pulse generator - Google Patents

Description

1Θ32 744

ι a

The invention relates to a pulse generator · pulse series with a fixed pulse range and fixed

tor for generating pulse sequences in the nanosecond are able to emit pulse duration, so that they

the area in which a control oscillator has several sayings that are sent to pulse generators for checking

mutually parallel channels with delay sockets of data transmission lines and data processing tungeh with flank converging effect and impulse 3 tungeanlagon must be provided, not fully fair

Shaper stages for converting control pulses into.

Output pulses of a predeterminable form connected downstream Starting from this state of the Teohnik, lies

are. therefore the invention is based on the object of a

A pulse generator constructed in this way is the same as that of a simple pulse generator in the Swiss patent specification 457 549, any program is described in terms of the circuit structure. However, this known pulse generator is capable of modifying the pulse sequences it emits only to deliver double pulses, which can be varied in duration and with regard to pulse duration, pulse amplitudes and Im-Abstancl of the individual pulses, allows pulse spacing.

however, their number is limited to the value two. According to the invention, this object is based on remain. The generation of entire pulse trains, at 13 from a pulse generator of the type mentioned at the beginning

which pulse duration, pulse spacing and pulse type, solved in that each channel only one

amplitude can be varied as desired, as this single delay circuit and a single im-

z. B. for the review of data processing pulse shaper contains.

or data transmission systems desirable or required with the inventive structure of the pulse is, can therefore be connected to the pulse generator ao-type club gate according to the Swiss patent specification, which are required to the absolute minimum, Lent circuit elements leads, is based on

In principle and theoretically it would be conceivable to divide up the large number of such double-pulse generating tasks involved in generating pulses in parallel with one generator and with a common output with a steep leading edge and a steep trailing edge to provide, but these are not intended for two components within one and the same, and in practice such a channel would have to fail, with the input-side delay projects already failing because of the necessary circuitry for the steep , the output-side pulse shaper stages provide for the known double pulse generators after 30 steep pulse trailing edges,
the Swiss patent specification 457 549 each of the "One in the sense of the invention quite usable and channels inside the generator following a therefore preferred embodiment for the input-side delay circuit in two control oscillator consists in a square pulse sub-channels, each of which is divided among other things generator, with a further delay circuit as such a rectangle and a pulse generator containing an emitter-coupled astable multiformer & stage.

channels each pulse of different polarity, which are summarized again for the construction of the delay circuits in the output of the sub-channels within each of the individual channels of the pulse channels according to the invention, before generator is recommended according to a further development they at the output of the 40 of the common to all channels Invention of the use of at least one pulse generator in each case. One such step recovery diode per channel. For the construction of the circuit structure is with the use ^ ₁ ; ν c-ztSgerungsschaltunyen in the. "," A canal of very many expensive buildings.t.ui: .s; t ^; · ao nachgeschaiteien Impulsformerstuiüi komi.ifcn according to J ¹ ■■ ·. \ vs _r . \ - &><."v.;: - v ;: ..;. i the Swiss one u ^ ier development of the invention in particular on patent specification 457 549 under the same defect 45 other coaxial lines or Printed stripes also suffer, as is also the case with other known and in the lines, each of which is assigned a transistor magazine "Nuclear Instruments and Methods", Vol. 40 switch for their discharge.
from 1966, pp. 106 to 108 and 348 to 350, described. For the further explanation of the invention, the pulse generator »! adheres. This costliness in making more reference to the drawing, the manufacture has notwithstanding the great need for 50 in these shows

Pulse generators, which in the above manner arbitrarily F i g. 1 is a block diagram for illustration Able to deliver programmable pulse trains, the basic principle for the pulse of the invention practical use of the well-known pulse generator,

Generators of the type described above have been available so far. 2 is a circuit diagram for one of the

prevents. 55 pulse generator according to the invention can be used

A way out of these difficulties is possible with the control oscillator,

but also other known pulse generators are not shown in FIG. 3 shows a circuit diagram for a pulse generator according to the invention that can be used in the German Auslegeschriften according to the invention, as well as a delay circuit with an edge-spreading effect set in the magazine "Frequency", vol. 22 of 1968, 60 F i g. 4 is a circuit diagram for one in the context of the invention p. 112 to 117, are described. These pulse generators, which can be used in accordance with the pulse generator, are characterized by a substantial input stage,

fanned structure, because they have a tax F i g. 4a and 4b special circuit diagrams for some <

oscillator practically only a single channel with details of the in F i g. 4 pulse shown

delay circuits and pulse shaper stages follows, 65 shaper stage,

but this is also due to the performance of this FIG. 4c to the circuit parts of Fig. 4i

Impulse generators insofar as compared to the above and 4b associated characteristic field and

imagined pulse generators were limited when they were only F i g. 5 is a circuit diagram to illustrate the

with a jichstrom

.iiisB-slil

SSS ACTTiWA = tTÄ. " ^L

since they are used by

Overall structure of the pulse shaping door of the pulse generator according to the invention.

In the case of the FIG. 1, for the basic principle of a pulse generator according to the specification, the output of a control oscillator SO is followed by a branch point A, from which three parallel channels KI ₁ KlI and KUl emanate, each of which has a delay circuit Kl, KII or KIlI with flank control effect and one

pulse shaper stage Fl ₁ FII or nil and the to w «^ Y ¹ ^ _n J ₁ JjKf since ie for the from at the output of the pulse generator according to the invention opposite to the ^ ι ran""^ _see

are brought together again at point B. this diode «» «» »" ^h j ^c _The retroactive effect on

The circuit diagram of FIG. 2 illustrated large W ^^ eÄrangMchaHung is thus a light control oscillator is an emitter-coupled aita- d «n gngang of the delay young. ^^ _gchal .

biler multivibrator after Stromschalterprin- "5 nachläss.ghar they dall '" ^cn. _{ή control.}

zip works, which in the present case means that * ^ | » ⁿ J ^ "Ä ^ voÄder control lasi has between two transi oscillator ^s « »depending on c. ^ _{gt recovery} .

The switch "! Tpu nj _{p meter best} immen,

de ^ flank steepness and the "J ö

, sen

zip works, which in the present case,

an almost impressed current between two transi-

disturb TZl and throw 722 switched back and forth,

without these transistors in the saturation state ^^ ΑηΑ de Flankenst

reach. This allows a very high switching ao namely by * ^A ^ ^e ' ^u _n ⁿ «j" J _{ulses the} delay

Achieve speed, as the limit frequency amplitude of the input "JJJ ¹ " ^ _{to de8 Λ31} , through

«ÄS ^ HaSr ⁵ - with the ^{help of the} Sü 1ÄÄ ^Er · ^^ Sr ^ ss

The in F i g. 3 shown delay circuit is essentially on one

has as its main component a so-called Step Reco DC voltage source U ,, a Laufze.tle.iu g very diode or memory switching diode which is an epitome 30 an AtadUuflwidentt ^ \ K *. _voltage source ^ ₀

axial silicon diode having an abrupt doping profile of the saddle lter.J. ^ * '° * _t ^ _{u ntiaI} ^F _{nd si} "d with their

represents. Such a diode is characterized by the fact that «" ΚΚ, d? Re? F Sw via a charging resistor

that its impedance at the transition from the passband into each others> Pol direct ^^ ^bz * _he "° _{aufzeitleitung L to} -

d Sbtrib hft from a very low stand R, to an ' ^An * ^h ^ _h ^e , ^r _u J of _the delay line

^ & ^ ϊ i _Ä , with mass verJ _{ie Laufze} | t r and

that their impedance at the transition from the passage to the blocking operation jumped from a very low Value in the order of 10hm to a very high value in the order of 1 MOhm

As long as this diode is forward biased, it stores it in the immediate vicinity of the barrier layer, where the minority charge acts on the delay field and now the voltage of the diode from the forward direction; correct η de> r _f , .waertion switched, the diode remains conductive until the entire stored

«The ^

^ n wave resistance

the

led Fig. 4a

Mile of npn

_one

_{def def}

VeaSi.icrt is. , nies v * r.r, on

pnp-Trans, stor ver-PP

^^ T

The delay circuit shown in the fig lies in one of the three JCI channels. JII and JlH from Fig. 1, so it receives the output signal of the control oscillator SO at its input, i.e. for example the one in FIG. 2 multivibrator * shown. The transistor Γ31 in F 1 g. 3 is connected as an emitter follower and therefore loads the control oscillator has

Sl In

Parameter in / _E dta

or a, s printed

^ _{ienfdd des}

_{On di} f ^g _r ordinate is plotted on the abscissa of _{each υ,} the clamping _{Dio f (.}

Senfeld is the emitter base current edge. L ^ on «* g ^ B ^ ^ ^ _positive

-— ■ - ■■

Activity controllable coil L31 integrates the input pulse for the delay circuit of Fig. 3, so that a sawtooth-shaped pulse is fed to the step recovery diode SRD. The entire scarf

3t / cn \ ■ 1 d Ic I _Ib = const.

_{can the transistor in this te} Ceon

the current Ib is controlled. For negative values of A second special property of the pulse Ucb , the collector-base diode in the forward generator is that the fall time of the trailing edge of the direction is operated. In this range of characteristics , the nanosecond pulse that occurs at Re is practically very low in the conduction resistance of the transistor - only owing to the properties of the transit time. The output resistance can therefore be both high-resistance and low-resistance, such as stray capacitance, losses, homogeneity, 'ie, one, etc., is given. The trailing edge is so through the can use the transistor as a switch. Pulse shaper formed by himself.

The operating point of the transistor is a transistor of the essentially serves to decision "resistance line" W and whose intersection set with coupling of the circuit of the step recovery diode of a / c / i / cB characteristic. The slope of the io from the output circuit of the transistor and to the straight line of resistance is then the reciprocal of the strengthening. This allows the amplitude of a sum of the load resistances, formed from Re nanosecond pulses, continuously from 0 volts to and Z. Here, R ₁ is much larger than Re and becomes a maximum voltage that is neglected by the transmission. The point of intersection of the resistance voltage of the transistor is dependent on regulating, in that W is a straight line with the abscissa, the voltage U _{0 of} the 15, in the simplest way, the DC voltage U ₀ changes the DC voltage source. will. This makes it unnecessary to use very In the normal case, I _E = 0, ie the transistor blocks. costly high-frequency attenuators and the delay line L charges through Ar, on U ₀ on, high-frequency switches.

and the operating point Al is set in the characteristic field. The duration of a nanosecond (FIG. 4c) generated at R _E. The delay line then acts as ao pulse is determined by the length of the delay line L source to the electromotive force U ₀ and the internal resistance given and can thus in a simple stand Z. 'fashion with the length of the delay line changed when applying a control current pulse Zb ₁ which are . The temporal position of the nanosecond pulse generated in the pulse generator and generated by the step stage is supplied by the recovery diode, the transistor goes as the switching time of the step recovery diode, that is, the very quickly into the conductive state, and its delay compared to the edge of the pulse from operating point A 1 jumps along the resistance given to the common control oscillator. It is straight W on the working point Al. In this continuously adjustable by the storage phase operating point, the transistor has a very low step recovery diode is changed,
ohmic resistance, so that the delay line 30 D; r complete structure of one shown in FIG. 1 suddenly finds the terminating resistor Rb as a load channel leading to the absolute minimum of required resistance. A negative switching element arises at Rb , in that the tasks of generating sojj a steep leading edge as well as a steep one, which arise during the impulse voltage jump of the largest generation

U ₁ = U ₀ - - = U ₀ Il for Rb = Z. ₃₅ back flank on two components within one and the-

Re + Z are divided into the same channel. The one

This voltage jump is applied to the idle-side delay circuit for the time

running line end, there is after the running position and the steep leading edge of a nanosecond

time f fully reflects and extinguishes when the pulse returns and the pulse shaper stage on the output side

The beginning of the line is the 40 still on the line for the steep pulse trailing edge.

Shaft size (/ _0/2 in. If g multiple channels, as shown in F i. 1 ones shown,

\ After double the running time 2τ, the running time is set to a common terminating resistor

{The line is completely discharged and remains discharged, so let it work, so you get a pulse generator,

long the control current Ze ₁ the transistor in the conductive which with a very simple structure any pro-

j state holds. 45 programmability of the impulse it emits

A negative result in terms of pulse amplitude and pulse duration is thus formed at the terminating resistor

\ tive voltage pulse of size UJ2 and which enables and pulse spacing.

j duration 2τ off. F i g. 5 shows a section of the whole

A positive span pulse generator is obtained in an analogous manner. Pulse shaping stages are shown,

! voltage impulse of the same shape and amplitude, if on 50 the signals to the channels Ky to Ks or AV to Ks'

Use a pnp transistor in place of the npn transistor.

will be. Each channel contains a single delay

! ! line first special property of the inventive circuit and a single pulse shaper stage, whereby

moderate pulse generator is that the rise time of the outputs of the delay circuits with the

at Rk generated impulses practically through the SS inputs of the associated pulse shaping stages

Rise time of the step recovery diode itself are given bonding.

is when the amplitude of the control pulse contains several The pulse shaper stages ΑΊ to λ 's al

Volts, with a rise time of e.g. B. fewer switches each an npn Trensistor Γι to Ts, the ii

than 0.5 nanoseconds. Basic circuit are operated and their Kollek

The control pulse delivered by the diode delivers βο gates via a charging resistor Rl with one each

■ a very large current is connected to the resistor Rv, which is variable in the basic circuit. At the middle

^: If the transistor is driven and overdrives this tap of Rv so strongly, a direct voltage U ₀ , di, is formed

and quickly that its collector-base stretch is set between 0 and a maximum value

practically the same time from high to low.

The ohmic state goes, so that the rise time of the Ss The charging of the delay lines Lt to Li

, at Rh resulting nanosecond pulse which occurs via Ri. and diodes /> 2. they wipe one each

f speed of sound of the step recovery diode ent · pole of the Lnufzcitleiingen and mass inserted so »int

speaks. that they are permeable to direct current.

(η

When activating ζ. B. of the transistor T \ from K \ with a negative control current jump, which is supplied by the associated step recovery diode, a negative voltage pulse arises in the manner described above across the diode Dl , which is transmitted to the emitter via a correspondingly polarized diode Dl another transistor Ti operated in a base circuit arrives. The emitter-base diode of this transistor, together with the resistor of the diode Dl, represents a reflection-free terminating resistor for the delay line L \ .

The channels Kn to Kn also supply negative pulses in an analogous manner, the timing of which can be set with the aid of the individual delay circuits, via the decoupling diodes Dl to the input of the common transistor Tl, at whose collector a pulse train appears that consists of negative individual pulses. These individual pulses can therefore be shifted in time with respect to one another and have different pulse amplitudes and pulse durations.

With the help of the diode oil, the z. B. can be designed as a Zener diode, the collector direct current potential of the transistor Tl is shifted so that the terminating resistor Re which is common to all channels is negative with respect to ground potential.

The generation of an arbitrarily programmable pulse sequence, consisting of positive individual pulses from the channels Ki to Kn ', is carried out in an analogous manner as described above, assuming that all diodes and voltages are reversed, the npn transistors are replaced by pnp transistors and the The switches of the pulse shaping stages are activated with positive control current jumps (FIG. 5). Pulses of the same polarity are mutually decoupled with the help of diodes Dl, pulses of opposite pulses through the transistors TX and Tl . B. use mercury switches or avalanche transistors to generate pulses, the high repetition frequency and absolute freedom from jitter of the nanosecond pulses generated.

45

Claims (10)

Patent claims: I Pulse generator for generating pulse trains in the nanosecond range. in which a control oscillator is followed by several parallel channels with delay circuits with flanking effect and pulse shaping stages for converting control pulses into output pulses of a predefinable form, characterized in that each channel (K \, Kn, K _u i) only has a single delay circuit (Ki, Ku, Km) and a single pulse shaper stage (Fi, Fn, Fm). 2. Pulse generator according to claim 1, characterized in that a square-wave pulse generator is used as the control oscillator is provided. 3. Pulse generator according to claim 2, characterized in that the square-wave pulse generator is an emitter-coupled astable multivibrator. 4. Pulse generator according to one of claims 1 to 3, characterized in that the delay circuits each contain at least one step recovery diode. 5. Pulse generator according to claim 4, characterized in that the step recovery diode is a A transistor is connected upstream, the base branch of which contains a controllable resistor. 6. Pulse generator according to claim 4, characterized in that the step recovery diode is a A transistor is connected upstream, the emitter branch of which contains a controllable resistor. 7. Pulse generator according to claim 4, characterized in that the step recovery diode is a Coil with variable inductance is connected upstream. 8. Pulse generator according to one of claims 1 to 7, characterized in that the pulse shaper stages each contain a coaxial line and a transistor switch for their discharge. 9. Pulse generator according to one of claims i to 7, characterized in that the pulse shaper stages a printed strip line and a transistor switch for their discharge contain. 10. Pulse generator according to claim 8 or 9 with several pulse shaper stages connected to a common load resistor, characterized in that each of the pulse shaper stages is connected via its own diode to one of several branch points, each of which is connected to the common load resistor via a transistor in base circuit was connected. 1 sheet of drawings