DE1920077A1 - Capacitor overcharging device - Google Patents

Description

Pl-Tue. 31 ^.

ujo / rtJi

Df. Her.erl ScI, ο I «

p. _(t .u »wu 192UU //

kV. Philips ¹ Gloellompenfabrlek «
. Ak * NaMH * - 3182
vonu 21, Jpril 1969

Kon <iensatoru'berlad.e device.

The invention relates to a circuit arrangement for

Transferring the charge from a first capacity to a second capacity by means of electronic circuit elements. That kind of circuitry is often used in capacitor storage devices that are e.g. in arrangements for transit time delay of e.g. body and video frequency signals or use loads in a binary shift register. Ee is necessary that the energy of a first capacity as possible is transferred without loss and distortion to a second capacity in the memory arrangement.

In a known circuit arrangement according to FIG. 3 in "Electron! On, Letters", Des. Ί? 67, 3. Kr. 12, pages 544 to 546 di * «tjr Art one has the series connection between a first and a second capacitance a3 resistor, the Eoitter-Kollelctor-Streck · a

nc :. 3132.

Transistor and a diode attached, wherein a charge transfer controlling circuit source is provided between the terminal ends of the first and second capacitors applied by the resistor and the diode. The base electrode of this transistor i3t connected to a point of constant potential, üieae known circuit arrangement has the disadvantage that crosstalk occurs between successive 3signalaustastungen, mainly due to the presence of the stray capacitance between the collector and the base of the iiv.ncji stora, vaa ; oby during the transfer from Lacjung on a first capacity to a second capacity a part of the charge to be transferred in Fonr. from Streuladunj into the mentioned Streukara :: ität jrel-injt, which charge remains in the stray capacity during the transfer from the second capacity to a third capacity. During the subsequent overtraining, this ötreecharge is fed from the first capacity to the second capacity of the second capacity in question. This has the consequence that the separate signal blanking Lchos of the previous signal blanking are superimposed, which is caused by this echo effect. In an integrated memory circuit, where the ratio between the mentioned stray capacitance and the storage capacity cannot be chosen to be small, this tcho effect is detrimental to the usability of the integrated memory with a small number of storage units connected one after the other.

Another disadvantage of the known 3cha is 1-tungeanordnung of that Ladungsrerlust characterized occurs that the Ko11ektor-aiii "ter-current amplification factor Λ of the transistors used etwes ßied- _# engined than 1, whereby the charging current or Entladestrcm a first capacitance is gröeser than the discharge current or the charging current of a

909I45 / U6S

PHN. 3182.

tv «lt« ti capacity.

The invention aims to provide a circuit arrangement to indicate the type described, velohe does not have the mentioned Kaohteile Also particularly good, suitable for integration. the The invention is characterized in that a field effect transistor is provided between the aforementioned first and second capacitance iet, where the first capacitance in the feed electrode circle and the «Wide capacity are arranged in the drainage electrodes and« in « the charge transfer control voltage source between the Gate electrode of the field effect traces and that of the inflow electrode remote connection of the first capacitance is attached and the sound of the drainage electrode turned off the connection of the second capacity connected to the gate electrode of the Peldeffekt transistor

Torsuggest this circuit arrangement is inside Capacitor used, the successive, in the same White self-built circuits are included so that they take place from the outside Levels the second capacity of the first level, the first capacity of the second level and the second capacity of the «wide level first capacity of the third stage, etc. forms.

The invention further relates to a semiconductor device for use in such a gate device, the "in substrate ait one or more surface areas semiconducting «! Kateriala having. In such a device, the invention is characterized by that the field effect transistors of the device «in« Hehe and form the semiconductor zones of the field effect transistors Row are housed in the mentioned surface areas, where the drainage electrode of a pelde effect transistor of the series for over-

909I45 / U6S

SAO ORIGINAL

carry the charge with the inflow electrode of the subsequent field effect transistor in the series is connected and the capacitance present in the outflow electronics of each field effect transistor gate is formed by the internal capacitance between the gate electrode and the outflow electrode of this field effect transistor, and the gate electrodes create the field effect the transistors belong (s) of electrical input (entrances) door the control signals. · *

. As a result of the use of the inside '.: Capacity between gate

and drainage: trcde ala second capacity, i.e. as storage capacity, a capacitor store with a very simple structure is obtained, which a good uirkunc with a jeringer .. per storage unit necessary Surface combined, as each memory unit is formed by just one field effect transistor. It is also important that the The surface area per storage unit in a storage device according to the invention is generally smaller than in a comparable, integrated one Memory in which (bipolar) transistors are used, since when using field effect transistors the latter in the same surface

) ohe area can be accommodated, so that the use of

Isolation zones are unnecessary. In addition, the use of field effect transistors in the manufacture of an integrated memory using the methods customary in semiconductor technology, a «reduction in Comparison of the number of photomasking and diffusion treatments For the use of bipolar transistors ait bring itself. Both dl smaller surface per storage unit as well as simpler manufacture increase productivity «

Grounding; has the chosen structure of a capacitor » memory · according to FIG

109146 / Uli

PHM. 3182.

ι. al · storage capacity is used, the additional 1Αο & · Β advantage that · the wiping of the inflow and gate electrode before * and «tt ·. Str "ukftpa" not ita't the good effect of the capacitor store beeintrfichtigt as this · stray capacitance ausaerdain as Speicherkapazi- 't% effective. The same applies to the stray capacitance between the surrounding half-surface area and the inflow and outflow electrode. The reference level of the stray capacitance between the inflow, and gate electrode is equal to -Y "volts .

The circuit arrangement after the door can be

among other things, to delay the runtime of, for example, audio or video frequency »signals. A long delay time per storage unit and thus per field effect transistor is required. When using a number of peldeffect translators, a maximum delay rate per memory unit can be achieved if all gate electrodes are each connected to a switching voltage source with earth or another draw potential. get connected. In that the switching waves are chosen in such a way that they have ^{a value E volts during the t / n} · part of each sampling period T and a value Hull volts during the remaining part of the period, and if they also have a value of 1 / n. Part of the period T is shifted in time with respect to one another, so that first the n, field effect transistor and then the (n-1)., (N-2J. Etc. transistor become conductive, the delay time per memory unit is a maximum and equal to iS - * T β ο.

In practice, however, it is desirable to reduce the number of voltage sources required at the expense of some reduction to limit the delay time per storage unit. this can therefore be achieved that "a number of gate" iektrod * n of

909845/146 3 6AD o _fflGINAt

PEK. 3182.

Field effect transistors are connected to one another and a preferred embodiment of a semiconductor direction according to the invention It is therefore characterized in that a number of gate electrodes ▼ on field effect transistors of the series are connected to each other, welohe Number does not have two consecutive field effect transistors.

It turns out that as much as possible <younger> daily! Compromise

_k between the number of switching voltage sources to be used and the number of required field effect transformers is desired. It is important here that the delay time per memory unit also depends on the way in which the gate electrodes of various field effect transistors are connected in the series.

Although it is sufficient to act as a shift register, when connecting clay gate electrodes of various field effect transit gates Bit each other to meet the condition that two successive 1 Field effect transistors should not be conductive at the same time, after the decision, larger storage tanks will be aimed at guns

r jon Konrromiisea from a series of field effect transistors zu3air.nen-

built, "the oindeates3 two consecutive, adjacent groups of the same number of consecutive Peldefi'ekt-Transis" - gates contains »where the gate electrodes of the various troops to— belonging Felieffekt-Transist ^ ren, whose ordinal number in the group lieaelbe, are connected to each other,.

This structure makes it possible to achieve as long a delay as possible per storage unit with a previously beating number of so-called holding voltage sources. The number of field effect transistors per group is determined by the Ana & hl

909845 / U63

VlUi. 31: 2.

the switching pannum sources are determined.

The semiconductor device according to the invention cannot Tünnschicht-Tranaistoreii can be stocked, but is preferably through marked, daao the inlet and outlet electrodes of one or of several field effect transistors of the series are surface zones, between which one at the on the semiconductor surface with the (. surface zones Adjacent channel zone extends, being on the semiconductor surface an insulating layer is attached, on which the Ttelektnide that extends over the iCanalzone.

An important embodiment of the telephone, the semiconductor device according to the invention contains at least one Felieffekt-Trpnaistor with insulated Ibrelectrode, above the drainage electrode at the same time the inflow electrode of the next field effect tranais gate It forms a series, whereby a particularly important construction is obtained.

3 a further, important description of the leakage of solid conductors naoh the invention is characterized in that the Inflow and outflow electrodes of at least one field effect transistor A series of lights that are a conductivity type that through • ine -Lanaleone de · a LeitiShitfceitstype connected to each other, while the gate electrode adjoins the iCanal zone of the • The most recent guideline type is defined which zone through a transition from the canalson «is separated.

Ba will be evident that ·· the frequencies at which The memory can be used as well as the grotto of memory capacities are dependent. Ib general, the lower the applied The greater the storage capacities, the greater the prequents • «in * As a result, the mentioned internal capacity can exceed the usual

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"BATH

PHi :. 3132.

Field effect transistors e.g. when using low frequencies * u be low.

In another embodiment of the semiconductor device According to the invention, the gate electrode extends at least a «field effect transistor of the series not only over the channel zone but over part of the drainage electrode. On this tfeis «will the internal capacitance between the gate electrode and the drainage electrode « effectively enlarged, the surface area required per storage unit namely little is enlarged.

The internal storage capacity is shown in a list - shape of semiconductor device; according to the invention "rjrösaert in a different way, in the case of at least one field effect Transi a torl ^ ir Heine another surface zone of the the Drain electrode of opposite conductivity type3 is anjebraoht, which further surface zone is provided with a connection conductor. It is the capacity of a preloaded in the backward direction pn junction · used, which capacity in this case is a relatively requires little additional surface. The other surface areas can be connected directly through the aforementioned connection conductor be connected to the gate electrode of the field effect transistor *.

The invention is explained in more detail with reference to the drawing. Ee xeigeni

1 shows the principle of the invention,

Fig. 2 shows the course of the tension of the SohaltSDannune · * quell «naoh Tig, I ₁

Fin · 3 a device suitable for retarding, for example

electrical signals are suitable,

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PHlI, 3182.

• · Pig. 4 shows the voltage curve at different points

the torriahtting near Fig. 3,

"" "". 5 «ohenlatiBoh a plan view of part of a

Embodiments of the semiconductor device according to the invention and

Fig. 6 shows a cross-section along the line TI-VI in FIG. _5. 5, ·

Fig. 7 schematically shows a cross section through another Aüdfü * lirung3fon »the semiconductor device according to the invention,

8 schematically, a plan view of part of a ■ another embodiment of the semiconductor device according to the invention, and

9 schematically shows a cross section along the line IX-IX in Fig. 8,

Fig. 10 is a schematic plan view of a part Another embodiment of a semiconductor device according to FIG Invention and. '

11 shows a schematic cross section along the line Π-Π in Fig. 10,

12 shows a plan view of a further one Embodiments of a semiconductor device according to the invention and FIG

13 schematically shows a cross section through the semiconductor device 12 along the line XIII-XIII in FIG. 12.

In Fig. 1 T besaiohnet a field effect transistor Bit of an optionally insulated gate electrode, C ^ ₁ a first Ka-

pasitlt and C a wide lapasitit. 3 _Λ b * be a Sohaltapann without t ο.

source of energy, the s.B. a · supplies voltage, the waveform of which is shown in Flg. 2 is illustrated. From the latter figure it is evident that the «

909845 / U63

BAD OftIGINAt

FiDi. 31 ^ 2.

Voltage between the gate electrode Q and a reference potential ζ. 3. Earth during time T ^ equals E Vo ^ and during time ^ equals zero volts. The capacitance C _n in Fi ₁ ^. 1 lies between the inflow electrode D and the gate electrode 0 the field effect transistor

T. while the capacity C. on the one hand with the inflow electrode S η η— ι

and on the other hand via the switching voltage source ο with the gate electrode

of the field effect transistor T is connected. What is the time?

η. ι

the voltage between the gate electrode and a Be: ^r .iigspotential equal to E volts. The transistor is conductive during the time T ₁ * when the voltage across the capacitance is lower than (E - VJ volts, v: above V _{0 is} the spherical wave voltage of the Field-effect transistor T. A current flows through the transistor, which increases the voltage across the capacitance C. and decreases the voltage across the capacitance C. If both capacitances are equal, the voltage over the capacitance C, in at the same time in the same cash as the voltage across the capacitance C. At a given voltage E of the switching voltage source S, the final voltage across the capacitance C "is equal to (E - V_) volts, since when this voltage is reached the field effect -Transistor T. The end point across the capacitance C is consequently equal to (V - AV) volts, where AV equals the voltage increases across the capacitance C, and V equals the voltage across the capacitance C a n the beginning of the charge transfer between the two capacities. If the voltage (β - VJ volts as voltage level for the information -ÄV, which was present in the .Vanazitit C _., 30 shows that3 the information -AV has transferred to the capacitance C, while at the same time the ICa 'v.zit & ° i • η

C ^ ₁ to sum references ^ eyel charged i3t and acmit i.'ieder in eiaem Sw- =

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BATH ORIGINAL

PKIf, 3162.

• toad ateht, In de »1 · next · Information torn« in · «previous • yeioherelement ecpfangen kaaa.

: Tig. 3 contains a series of units, 3 a field effect transistor, vobe.1 the drainage electrode and the gate electrode a capacity is provided. The drainage electrode Each field-effect transistor "i * t galvaniaoh" rerbvmden with the inflow electrode of the next field effect iPranaistore. the

The drainage electrode of the field defect transistor is via a diode D.

■ it is connected to the switching source S. The output signal of the

Circuit series can each drain electrode d, er field effect transistors The inflow electrode of the field effect transistor

T is via the series connection of the resistor R and the source de ο "ο

Input ··! Gnale V. Bit a «Beeugapotenti.1 * .3. Brd · connected. The gate electrodes of the even field effect transistors are connected to a point of the reference potential via the source S bit, while the gate electrodes of the odd number of field effect transistors are connected directly to bits of a reference potential. • ■ ·

For a better · understanding of how the

Circuit arrangement na oh Fig. 3'vind in Fig. 4 the most important voltage levels of charge transfer plotted as a function of time . This iet • in · "yeietric a" ohteckapension bit of a VAxiaua of + rJ ToIt and • in «o llininuo of -E YoIt ₁ while its periodicity is equal to T see. iet. The periodicity must be at least a factor of 2 smaller than the periodicity of the maximum occurring signal frequency of the input voltage V * _f which is illustrated in FIG. 4b. Calibrating the time

iO9l4S / 14 $ S

T ¹ BB. 3132.

interrall · 2 ₀ t T ₂ t T ₄ and "^ has the point U _Q in Fig 3, d" r V "rbindungepunkt the gate electrode of the degree ^ hligen field effect IVanei · -. tors, a potential ron -E volts with respect to point B ₁ , the connection point of the odd-numbered field effect transistor "*! which point is connected to a" user potential. "The transformer T becomes non-conductive during the time intervals mentioned when the input voltage V ^ - ( E- V'j is, while the even-numbered transistors Vp, T-, and others are not conductive, while the voltages over the odd-numbered capacitances C, C, etc. are never greater than (E - V -) volts, which is described for the capacitance C. according to Fig. 1. The odd number translators T., T ,, .... become conductive during the same time intervals when r'ie .Ipannunj across the jre .dsahligen iCapacities C, Gp, etc. is less than E volts. The large number of ICapacities are charged until the voltage across these capacities equals BV- Volt is geuordon, '..' while the voltage across any odd-numbered capacitance will decrease to the same value as the voltage across its going, even-numbered capacitance sunimr.t. It is therefore assumed that all Kapa quotes are of the same size.

During the time in which the point B has a voltage of + E volts with respect to the point B ', which is also connected to a Bozugepotential, the information relating to the oroeee of the input signals V ^ is transmitted to the opacity C. , so after ilg. 4 «during the time interval T ₁ , T \> Te and T-. Dl · GrSeee · de · input signal during these time intervals, «tv * _{m is} equal to -K, 0, + E bsv. 0 volts. During these time intervals, a current flows through the transistor T which is equal to (E - V_ ~

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BATH

PH ». 3182.

- 13 -

• + r Amp «i * t and the existing voltage from (E - Vj / volts from the Xfcpasiiä't C _{Q has} decreased. During these time intervals you are through Trans ie tor T _A through it β end en currents 4o veraniohaulioht in Fig. and · the behavior of the voltage across the Kapatitit C. shown in Figure "4d. Au · latter figure seigt that the Spannungaabnahaen vfber the Kapaeität C during the tent intervals il, * t. 1 and Ύ -. extend linearly with d # r time, which only applies if the resistance S _Q many line grSsaer than the inverted slope of the field-effect Traosietors T · would decrease the grSsste voltage encountered during de * intervals * T ^ on that (LT - EV ^) volts, while the voltage decrease during the interval T _1. Equals zero volts, as a result of which leasehold is linear only for the input signals in the interval - (B * VL) Jt-T ₄ ^ t ⁺ (E - V_) volts Relationship «again

Spanmmgsabfalle AV over the capacity C and the mentioned iün ^ mg · -

• signal forward. The resistance d must be chosen so large that with an input signal of Hull volts dl voltage across the capacitance

C during the time the. Point B a potential of + E volts la

ο ^ .o

on earth, has just become 1/2 (E - V ^) volt. D «mean charging current 1 ■ (E -r O 2R, the dasu necessary ia-f, through the faöm · the capacity C and dl · time daaer Ύ every period T beetle **, if there“ potential de ”point · B _q fleioh ♦! Volt 1 · «. The charging metro» mentioned is equal to C ^ (I - V ^) 2 T »while 1/2 (S dl · 9p« .wmnn »i« sii «hM · UiMr d ·» JCspasity O ^ with a "SlngaBfnlfBjMl lull volt let. Bs it follows *" ·, since ·· for · 1μ sritatl «· IlMatellMM

of the bitter Udestrom must apply T- 1 / 2.C _qJ R _o . Ounetlg "values for the average charging current Bit Buckeioht" in good ·· Sigaal-Hauecb ratio and the required switching capacity are iwisoh ··

Wf _845/146 3 BADOB.G.NAU

I ¹ HK. 31o2.

1 uA and 1 bA.

Sa in the circuit arrangement according to Pig. 3 «lie stray capacitances between the drainage electrodes and the Ibrelei: troden der

Field effect transistors ran parallel to capacitances C to C,

on

does not cause the presence of this stray capacitance to Sch: - effect, because these scatter capacities are now at the same time as storage capacities Kirksan. In addition, the Vjerv / eniunj, 'van field effect transistors as a circuit 3 a means ensures that the charging

"or Itotladestroa a first capacity almost does not sound the üitlade-

or, Ladestroa a second capacity of the arrangement according to Fi 3. 3 is differentiated. In addition, the use of field-effect transistors provides the additional advantage that the low-electrical linear signal T. "can have a greater magnitude, since the breakdown voltage between the inflow electrode and Tot el ektrodi or atm substrate many times · higher than the entsnreohende PuroJibrualwpaamme between the Ätitterelektrode and the base electrode has a "IVmMIstors.

The semiconductor device naoh Figs. 3 and 6 ent

holds "in substrate 5 °» · ^Β · from Isolieraaterial as "provided with one or" ohrorejn OberfX £ height "areas of semiconductor material 1st or A & a $ as la the present version · for · can be made of semiconductor material itself. Maoa of the invention aind in a surface area of the substrate · 50 semiconductor clays 51 a loan · von Feldffek "t-Tra» sis $ e * g3 rorge go, whereby a drain electrode of a field effect ^ Tranaiflto ^ * the series of charge transfer with the inflow electrode of the niohs ^ following field effect transiatora of the series is connected, since each of the

5I illustrated zones both the outflow Electro d e a field effect

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BATH ORIGiMAL

PHN. 3102

Twin »ie tor · as well as the inflow electrode of the next following field effect trait forms. The Tbrelektroden 52 are connected to a ler Kvtallbahnaa 53 and $ 4 and characterized belong to the (Denj electrical input (inputs) the door control signal β to the duroh the "may be supplied tetallbahnen ·.

The semiconductor device has a compact, simple one Structure, whereby the surface area required per security unit is small iet, there. each opeioheinheit formed by only one field effect transistor will..

Through each of the conductive lines 53 and 54, the gate electrodes are $ 2 "iner number sound field effect transistors connected to each other, since a · β ·« olche number τοη field effect transistors nioht contains Awei consecutive field effect transistors. In the process, lower field-effect gates can be fed to the gate electrodes in the same time at the same time, so that an even more in-depth view of the switching voltage can suffice.

In d * r present Au "fi3hrungBfor · are the Torelelctroden nit 52 consecutive Teldeffekt-Traneietoren alternately Α · τ L 'itbahn 53 and illustrates conductive line 34 ^ rbunden. As a result, the series of F «ld * ff« kt transformers has n consecutive, adjacent groups of the same number of tone or two consecutive field effect transistor, the gate electrodes of the different quarters belonging to the same group but having the same order ^ having transistors are connected to one another.

This way of through-connection results in a favorable one Coordination between the number of switching voltage sources to be used on the one hand and the delay time per storage unit on the other.

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BATH

Hoof. 3132.

It should be noted in this context that the delay time per Storage unit is precisely proportional to the number of field effect transistors per group that simultaneously have information

The second or storage capacity is determined by the capacity formed between the gate electrode 52 and the surface zone 51, dl duroh the Isolier3Ohioht 55 are separated from each other, which the Semiconductor surface covered. The gate electrode is also located 52 over the IC channel zone 56 adjoining the semiconductor surface, the lies between the surface zones 51, which are the inflow and outflow electrodes the field effect transistors form.

The capacity between the Torelectr-.de 52 and the Surface zone 5I is the internal capacity between the gate electrode and Drainage electrode αββ field effect trameistore. This internal capacity is in this case it is enlarged that the gate electrode 52 oiok not only over the canal son · 56 but also over one? Part d «f Afc« · flux electrode 5I extends »

It should be noted that in field-effect transistors with an insulated gate electrode of the same type as the aforementioned effect transistors, the gate electrode usually overlaps the analaon, so that the gate electrode is slightly above the drainage hole as well as over it the inflow electrode extends, the beschr! · * enclosed field effect transistor with increased Innonkapazität lie _f jt di © FBR electrode but not aycuretrisoh to the Kam zone!, ao that ψ & β of • in®n electrode, a larger, forasiagaweiss® "in Significantly {gt $ Baos% v Toil is covered by the gate electrode than by the other Elatetoad · _β

Lie Hai blei tervon-ichttin ^ nac: den Fi ^ 5 ^u ^^ C can fully cor.:c.en iurcli a process usual in:! Cr 'I-.lblei tertechnik

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Pim. 3152.

The substrate 50 is made of η-type silicon, for example.

Ibliohe Rwtoiaaekierungp- and Diffueionetechniken can -then: (U, e Pr ^ T zones J1 be attached to with dimensions of 40 χ μη. The, width of the channel zones % is z »3. β jus. The pn-T transitions

. xvlsohen the zones 5I wn & ^da Ei S & festrai 50 «^ extend s.3» over a depth of -about. 2 ;; a ^ on der HftlM © itesa "overfliehe» Bie laolierscaioht 55. '' beatehf öiS. ' © ÄS 341iei% Bo ^ t? Si / ad © 3 »Silietwsmiteld und hut · und« e -dar ToTÜlfteüso & Q 52 Qla® Bisfe® tor 3 ₀ -B <, 0.1 ^ e ₀ Unter den

• LeitbaJSaen 53 "u« d-54 isis dio _5aoli @ ss © iii © bt 55. fsraugsweis® dieker, s, B -._ 0.5 riss «us uaejf ^ öneiabt © ^ nsl ^ ilduag aw veplißten. To this« Zveok know are nalunterbreoher used "u h Ka'n"lui3's"rbr®oiiss ^ sB ₈ diffundiert® K. the ^ orelektroden 52 have aB dimensions of .38 ζ 38 μ" _t while the LeitDehnen 53 and 54 have a width of eg 1Q μ " They consist of Al or some other sea-like electrode material such as Au and have a thickness of, for example, 0.3 μβ.

Another embodiment of a pelde effect transistor with increased internal capacity between the gate electrode and drainage electrode is described below at the end of FIG. The field-effect transistor contains a semiconductor body 70 in which, from the same surface, two flare zones 71 and 72 of the same conductivity type extend, which zones 71 and 72 are located on these surface zones and on the semiconductor web. flee adjacent canal zone 73 is located. An electrode 75 extends over the channel zone 73, which is provided by an insulating layer YES .

from separated i8t. According to the invention, at least one of the upper

—->: 949845 / US3

BATH ORIGINAL

- 16 -

PBH. 31G-2,

Flfiohenzonen, in this case, the drainage electrode 72, in the semiconductor body 70 * 1ηβ further surface areas-76f that of the surface zones 7 and 72 opposite to that is capable of being opened. Furthermore, the surface zone Tts with a connection! © lter 77 π ehe »:.

In this version, OS ¹ Di is “lie li & p &? Ats.t of the transition between iien Zoneia 72 and T'6 is used to ensure that this pE-tTbergjj & ng ins Betriebezws'iaEüd is always in

is biased. This can dadursii ersie-LT are ₅ iie.Bs - swisehen desa Anschlüssleii & r 17 unc the gate electrode 5 @ i ^ ®, po source provided aiai »Frequently iet jedosli _s S.-B.? fesi P sietoren with a low K "ScMwellenopaanung," the. The voltage between the gate electrode and the drainage is made in such a way that the pn-t transition in question is biased in the refiokwarteipiohtung, even if the gate electrode 15 and the connection conductor 77 are directly connected to one another (vi® in ed . 1 is shown) «

In the present ⁵ - ^? ? 'ihxungsforB r is still the inlet electrode 71 with a Anschlusβleiter 78 and Abfluaselek-

trode 72 is provided with an anachlus conductor 79. Also this pelde effect transit door can be completely through a common practice in the Kalbleitertecknlk Method made herds «

Sb will make sense of that with a number of field effect transistors naoh Flg. 7 in 4 «r on the basis of the Flg. 5 "described» V!! Ela semiconductor device constructed according to the invention can. Successive field effect transistors can be used here · » , the row are connected to one another via conductor tracks 78, 79 or dl · outflow electrode 72 can also be inflow electrode 7t

909845 / U63 BAD OfflG.NAL

PHIi. 3102

"de * form the next field-effect transistor. ■. . In the execution fora according to the Fir. 5 »6 and 7

4.8t the substrate is provided with a connection conductor not shown in order to be able to bias the pn-tTbergSnge between the supply and drainage electrodes and the surrounding semiconductor area in the reverse direction during operation. Such a connection conductor can, for example, be grounded on the top but also on the bottom of the semiconductor body or of the substrate. In the latter case, it is advantageous to use a substrate with a 10-bit low specific resistance on which a pitaxial layer of the same conductivity type but with a high specific resistance is applied (Pig. 7J.

Another execution forta a lialbleitervorrichftyng according to the invention, of which in Figs. B and 9 «shown in part · - It is, contains “in” series of field effect transistors, the .-; il Abflusaeleitroden binding a field effect transistor

rfliohensonen 81 and 62 de · "inen Leltf & higkeitstyps gebil- _{_:} di · by Kanalsone 83 of one conductivity type · · ■ it: ■ ^ are attached form v £ while the gate electrode 84, S6 at

the i .. do 3 ati-limiting zone of the opposite conductivity

typa ie ν * Ssn · 64, 36 duroh «in a pn transition 85, 37 ▼ on the

Channel zone c <5 ^ r ^ irWnnt is. ·

Bie Ibrelektrode 84, 86 has two parts, one of which • redder "ira ^ orfllehessone 84 iat _f di · at · HalbleiteroberflSoh 83 _S as d" r * HSII n® the Sa- &.? "= Ia? 4eselektroden 80 and 81 are applied, one & ΟΣ- two! © tztsenaanten ELek-iE ^: otä © n 80 and 81 i.e. the electrode 80 UEgSb'io Da-it; rc? Sa can be achieved in a simple manner that the 3 canal cone £ i the side facing the electrode o1 is wider than

909845 / U63

PHH. 31.32.-

on the side facing the electrode 00. Dice has the distribution that »· the internal capacity between zone 84 and the. Electrode 81 is higher as the internal capacitance between zone 84 and electrode 30 «

Preferably, in the semiconductor device near the Invention the electrode 60 as a feed electrode and the electrode Gi al · drainage electrode used, in which case the higher of the two Innwcapacities as a second or storage capacity is effective., Si ··· The feed and discharge electrodes also have the advantage that ic Operating condition the electric field strength in the area of the inflow bi * to the drainage electrode widening Xfiälzone 83 an equilibrium Has value, whereby the good effect of the field effect transistor is promoted.

The second part 86 of the gate electrode G4, C6 gives the area of the one conductivity type in the semiconductor surface area, since it is formed by the channel zone 83 and the inflow and outflow electrodes 60 and 81. The svelte part G6 is separated by the pn-tTb «r & uig & f ntlMi ervChntea area of the« iaea conductivity · type *

This is the equivalent of what is customary in field-effect transistors In this embodiment, the method becomes the form of the semiconductor device After the invention, part 86 of the gate electrode was not an active part de «field effect tranaistors are used. This allows the part ß6 a Form a surface area or a substrate in which different fields « Effect transistors can be added without further precautions being necessary, including those field effect transistors «· other to ioolieren, the zone S4, which is connected to a connecting conductor 89 is provided, used as an active gate electrode, d & r duroh the L-eitbahxien 90 and 91 di itertxGrnale can be met.

. · PHN. 3182.

The substrate 86 can be connected via a connecting conductor, which is not shown ■ It can be connected with any potential. The substrate can also not.connected and thus floating, that means.not with one Point of the circuit connected by which connection the potential of the substrate of the value that the substrate without this compound would have been, would deviate, be left.

. There is one on the EalbleiteroberflSfrhöS Insulating layer. 93t on. the Leitba) inehS9 to 92 are attached. the Conductors 92 each connect a drainage electrode 31 of a field effect transistor » of the row with the inflow electrode 80 of the next Field effect transistor · the series.

It should be noted that the gate electrode 84 also has a erohmal ·, ring-shaped or otherwise closed · geometry can, where s.B. ortlioh a widening is provided to the The gate electrode bit can be provided with a connection filter. On this· In this way, the canal zone 83 can at least locally have a very small length which increases the resistance between the inflow and outflow electrodes low ssin came "

Another embodiment of a semiconductor device according to the invention, of which in flg. 10 and 11 a part is shown is, also contains field effect transistors, in which the inflow and outflow electrodes Surface sensors 100 and 101 of one conductivity type are. These zones are of the conductivity type due to the channel sonic 1C2 connected with each other. Si «gate electrode is duroh» la · Zone 103 adjacent to cannon zone 102 is the opposite of the type of capacity and through a communicating with the zone 103 · OberflSohensone 104 formed, which also have the opposite conductivity type

BADOR ₁ G ₁ NAL

γη ::. 31'-2.

is. This embodiment makes use of the fact that in the Arrangement of the gate electrodes of several FeJ ^ effect transistors with one another are connected. Such interconnected field effect transistors can be installed in the same zone IO3. The different Zones I03 are thereby 'mutually independent' in the usual way isolates that a substrate 105 of the one conductivity type uses on which a "pitactic layer 103 of the opposite conductivity type is attached, further isolation zones 106 des

a conductivity type up to the substrate'IG5 are diffused. Dio

Zones 103 ″ are surrounded by the isolating zones 106 like islands.

_ The zones I03 are also marked with a not shown

Provided connection conductors, duroix the control signals to the Texelectrodes can be fed.

To reduce the series resistance between the

Gate electrodes of different transistors may Peldefrekt the zones 103 nit uiederohmigen a part are provided I07, preferably nieht aa de · substrate IC5 angremt, ilen "wipe since, otherwise dl" Kapazitätt \ Zones K 3 tmd the 3 substrate IO5 by the presence of the low-resistance

Part IO7 is also ver ^ T ^ ssert. The semiconductor surface is covered with an insulating layer

108 provided, on which a sexton of conductor tracks 109 is attached, through windows in the insulating layer dt the inlet and outlet electrodes 100 and 101 share a contact. Gown of the ladder tracksa

109 the field effect transistors are arranged in a row, with each of the conductor tracks I09 the drainage electrode 101 of one in a zone Field-effect transistor 3 pit of the inflow electrode lying on island 103 100 of a field effect transistor located in another zone 103 «

^wMnd "· 90984

■ '' Oils using the field effects described in Fi ο 10 and 11

~ Transistors have a typical structure. This means that the Internal capacitance between the gate electrode and the inlet electrode equal to the internal capacity between the gate electrode and the Abflueselelttrade or even larger than this. Although this is the good one Effect of the semiconductor device is not or almost not impaired, field effect transistors of asymmetrical structure are preferably used in which the internal capacitance between the gate electrode and the drainage «. electrode is the bigger one. This can be a, 3. can be achieved in that the field effect transietars in the direction of the gate towards don Piζ. 10 and 11

be replaced by field effect transistors, of which FIGS. 12 and 13 a seigern In these FIGS. 12 and 13, corresponding parts are for the sake of clarity old denotes the felloaen reference as in the Figs. 10 and 11. In this embodiment, the inflow electrode is 100 significantly smaller than the drain electrode 101, while the JCaaslBone 102. on the side facing the drainage electrode 101 »is wider than on the other side facing the inflow electrode IOC.

It will be clear that the invention is not restricted to the examples shown and that many variants are available to those skilled in the art within the scope of the invention. Ee can BB both field-effect transistors it a _D η-type channel region as AUOH • it a p-type KanalKone.verwendet be. Furthermore, both field effect transistors of the enrichment type and of the storage type can be used. Furthermore, the circuit shown in FIG. 3 can advantageously be used to form a filter for electrical signals tu in the usual manner. If a large number of units are used in the circuit arrangement according to FIG

■: Ώ \ 31-2.

one or more usual charge amplifiers in series compensates will. In combination with the circuit series described Input and output circuits of the usual type can also be used. Furthermore, two or more of the mentioned series of circuits can be parallel with; ^ isolated inputs and / or shared outputs will.

Furthermore, with field effect transistors with eiaer the gate electrode separated from the channel zone by a pn junction "'Capacity between gate electrode and drainage electrode through use additional surface zones, e.g. in a

Part of the surface of the gate electrode. Or completely or partially in the drainage electrode and connected to the drain or gate electrode are.

Other semiconductor materials can still be used.

All V
.Germanium or 1 ü compounds τβη / end and also others

Arrangements are possible.

The canal zone can be rejuvenated locally by the Bringing more Ilalbleitersonen eo that the canal zone 'by the de® pn-t junction of the gate electrode belonging to the transition soils is blocked at the rejuvenation point. On the '..' otherwise the DuxqIi can «' Pinch-off point in sighting of the outflow electrc> d® the inflow electrode can be moved, reducing the capacitance between the gate electrode and the inlet electrode in favor of the between gate · » electrode and drainage electrode is reduced.

• SAD ORIGfNAL 90984S / 14SS

Claims (1)

■ · ■ '. 'PHN. 3182. · ■ - · ■ ' ^: "·" PA ₁ , TSHTANSP 5 Ü CH E. 1. "Circuitry for transferring charge from a . he «t« n capacity to a »wide capacity through electronic 3ohal- • tungemitt «l daduroh marked that zvisohen the first capacity and the second capacitance is a selde-effect transistor, wherein the first capacitance itself in the inflow electrode circuit and the .2VeIi * capacity is located in the drainage electrodes and one di · lAättageöbertragung controlling «switching voltage source between the ^ r «lektorod · d« i field effect transistor «and that of the inflow electrode« »Bgewandt ·» Inephluse of the first capacity is provided and that of the drain electrode turned off connection of the second capacitance bit the. 'iferelelctrod · d · «field effect tranaistore. 2. Device for using the circuit arrangement according to claim 1, characterized in that the device contains successive devices, constructed in the same way, so that stages dl follow each other "" wide capacity of the "rate stage" »Di ·«? * T · cape '' itÄt dor 'reiten Stuf' and the second cape ·, - % \\ & t d «r KKwiUm. Level «« uMode · di «eret · Kep ** i« td «r third atuf«, ueV. Ifi «. 3. l »lJ> l« t * er »x> rriohtua« ear Y «rv« n & tng la one Vorriobttm ^ aaoh Anspruoh 2 dl »« la sub * entered, since «one or more surface area« semiconducting · »Jutterial» has daduroh gekenneeicfenet, the "" e di · P * la «ffokt ~ Transietor« n of the device form a · Heihe, whereby the semiconductors of the pelde-effect transistors of the row are accommodated in the surface areas mentioned, whereby the drainage electrod · A pelde effect transistor of the series for the charge transfer ;; «i'fc /; d«: r inflow electrode de «next pelde effect tranei · * S098A5 / US5 BAD ORJGfNAl. tora of the series is connected, while the one in the drain electoral circle each field effect transistor's existing opacity due to the internal capacitance between the gate electrode and the drainage electrode of the relevant Field effect transistor is formed, the gate electrodes being the Field effect transistors your (the) ele-itrischen Hin ^ an ^ 'Jinputs) for the control signals. 4. Semiconductor device according to claim 3, characterized in that that the contact electrodes of a number of field effect transit gates the xteihe are connected to each other, what number of field effect transistors does not include two successive field effect transistors. 5 · Semiconductor device naoh claim 4, characterized in that the row of field effect transistors contains at least two successive, adjacent Orup.en icit the same number of field effect transistors, the gate electrodes of the different groups belonging field effect transistors in the group have the same Ordnungssshl, together comparable y are prevented. 6. Semiconductor device according to one of claims 3, 4 and 5, characterized in that the inflow and outflow elitrcden of one or more field effect transistors of the series are surface zones, between which a channel zone extends which is adjacent to the semiconductor surface to which the surface sensors adjoin, an insulating layer being applied to the semiconductor surface, on which the gate electrode lies, which extends over the canal zone. ft. Semiconductor device according to claim f., (characterized in that the drainage electrode of at least one Pöldeffekt-Transiü- 909S4S / U65 bad original tor ·, which also forms the inflow electrode of the next following field- • ■ - «ffekt ^ TraMietorg in the series.
8th". . . Semiconductor device naoh Aaspruoh 6 or 7, dahuroh marked that the gate electrode of at least one field effect tran- sistora der leihe not only calibrate over the X & nalspne but also over 'Part of the drainage electrode * to increase the innon canal capacity between • ohen the gate electrode and the drainage electrode. . ^ * Hai lead tvorricktune according to claim 6 »7 or ϋ da. lurch f * # k nnseiclinet, daso Abflueaelektrode within the at least one field effect Trftnsistore of Heike another Qberfläohenzone a de "der.AbfluesileKtrode entgegengeeettten Conductive ^ eitityps mounted i 't _e is which further" Oberflfiohensone with a Anaohluseleiter Tervehen · 10. Hslbleiterrorrioiitune nAoh claim "?, Thereby (jekenn- «Calibrates, since» α the further Oberfllohensone over the Antohlussleiter ■ with the gate electrode of the relevant field effect tranaiatore rerbun— that is » 11. Folblsitervorrieatung BAoh one "of claims 3 ₉ 4 and 5 thereby g * ks £ iu" lQZiBet, dut the 8u uad drain "IeVctrod" at least one "field effect transistor · of the series Oberflichenionec de · a" conductivity type are are rerbuaden through a channel of one conductivity type, while the gate electrode is a zone of the opposite conductivity type adjacent to the channel, which is separated by the transition tone of the channel tone " 12.. HalbIeitervurrichtunj: according to claim 11 thereby;: ek «nnteichnot, dao? lic 'ranalzone de- related to the Feldefrekt transit gates 90984 S / UGE- PHS. 31 ü2,. on one of the two electrodes of the one conductivity «type · facing applies is broader than on dejj, other, the other this side facing both electrodes. - .... 13. The semiconductor device according to claim 11 or 12 _t characterized in dasii the gate electrode of the relevant f'eldsffekt-Transistora comprises two parts, of which a eroterer part »is in · Oberflachenzcne provided on the semiconductor surface, which was also di · supply and Drainage electrodes are applied, one of the last two electrodes gives up. - 14. Semiconductor device according to claim 13, thereby each '<enn- draws that the second part of the gate electrode is covered with a area in which the field effect transistor is installed, the Area of one conductivity type, formed by the channel zone becomes 1 and surrounds the inlet and outlet electrodes. 15. Semiconductor device naoh claim 13 or 14 thereby identified that the first part of the gates 1 ei: trod β with one, ancillary is provided. ^BATH