DE1811988B1 - Process for analog-digital conversion according to the step conversion process - Google Patents

Description

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The invention relates to a method for analog, the corrections can during the encryption-digital conversion according to the step conversion process, selungsvorganges can be carried out, so that an exact comparison in which the measurement voltage iteratively with the sum is no longer in the first steps of partial voltages is compared, which is necessary after the. The step times can therefore be used Code graded and reduced to one digit of the 5, since in the first steps the Codes are assigned, whereby the next accuracy is no longer limited to the smallest unit, Smaller partial voltage is switched on if the sum depends on the size of the correction point is smaller than the measuring voltage and the ordered partial voltage is set. It results In each case the partial voltage switched on last is therefore shorter despite the larger number of digits switched off and the next lower partial voltage ok overall encryption time.

is switched on when the total voltage is greater The Verals achieved with the new method is the measuring voltage, and in which the coding time can be switched by one from the USA Partial voltages assigned points patent specification 3,182,303 known measure still a "1" is written into the code. Such can be further shortened. This measure exists Conversion methods are characterized by their high 15 in that the times for the comparison steps The transfer speed and its relatively shorter, the smaller the effort involved. voltages are. Accordingly, with every comparison-The The invention is based on the object that the longer the step is to be waited until a rich conversion speed to increase without the term decision is available, the greater the advance effort is enlarged considerably. The voltage jump that went to solution 20 was. Because of the This task is based on the knowledge, step by step, increasingly smaller Spandaß the conversion speed of a step change can therefore be determined by the times of the encryptors can essentially be shortened by the performance equalization steps. It is not required of the discriminator is limited, which is such that the times for each step are shortened Measurement voltage with the sum of the partial voltages will be 25, but the times for compares. Since for each comparison step one voltage and several comparison steps must be selected the same, jump precedes must because of the finite tape The shortest total encryption time is very wide of the discriminator and the sum thing is achieved when the step times at voltage-generating digital-to-analog converter can be shortened for each step, with the steps after Accuracy requirement for a certain period of time proportional to the number of times that have already been waited through until the switching fault has subsided. Is exemplary and a correct decision can be made wise the code used is the dual code, then can. This waiting time forms the lower limit of the voltage jump in the second step only half available for a comparison step as large as for the first, and with each subsequent step Time. The total encryption time is then 35 steps, it is reduced by a factor of 2. Ways the product of the time of a comparison step of the increasingly shorter step times and the number of digits of the digital value. The biggest one compared to the encryption method Occurring switching disturbance is halved at the beginning of the with constant step times Transfer method in which the voltage jump equals the total time without a loss of accuracy to have to take half of the largest occurring measurements.

voltage is. After this is with the known on hand of the drawing are the following

Level encrypting the time for a comparison invention as well as other advantages and additions

step determined. The time for a comparison step is described and explained in more detail,

is the greater, the more precisely the measurement is to be carried out, F i g. 1 shows the basic circuit diagram of an arrangement

d. H. the greater the number of stages of locking 45 to carry out the new procedure,

beers and thus the number of digits of the digital value in the F i g. 2 and 3 is the new procedure

is. This time for a comparison step is illustrated proportionally.

tional to the square of the number of digits in the digital In F i g. 1 is a discriminator descriptive with 1. On the other hand, the runtimes increased by net. which is the input voltage U ,. _: with a span setting of flip-flops in a shift register and compares voltage U ₁ , which arise from a digital-analogue result register, only linearly, so converter 2 is supplied. This is connected to a Ergebnisdaß their influence on the entire encryption register 3, which not only can be neglected at time steps in converters with large word lengths verschlüsseiern usual positions 1, 2 ... n / 2. n +1 contains / 2 ... η, but an additional According to the invention, the above-described up having 55 point K. In the exemplary embodiment, this would be achieved in that, after each, a predetermined digital value is represented in the binary code; the number of codes, corresponding to a correspondence, are the valences of the code cut of the conversion process, a correction point make the steps assigned to the result register with a partial voltage assigned to it -Digital- 60 zen graded. The output signal of the discriminatory conversion by a value that corresponds to the sum of the nators 1 is fed to a sequence control 4, the individual voltage assigned to the correction point depending on whether the input voltage is greater than or, if necessary, an additional voltage less than the comparison voltage U ₁ , only that speaks, is changed when the sum of the partial next digit of the result register turns on voltages of the codes and the correction point 65 or the last digit switched on again and the possibly additionally switched off. The step times are determined by a voltage that is smaller than the measuring voltage. Determined by clock generator T , the addition of one or more control points at the beginning of the encryption process, which is with

3 4

a start signal supplied to terminal S and codes 1 and 3 are switched on, so that

is conducted, not only the position 1, but the comparison voltage is set exponentially to the value also the position n / 2 + 1. The comparison chip "10" approaches. However, because of the short voltage U _v , this value is 1/2 + 2 ~ ⁽ " ^{/ 2 + 1)} . Up to and including the step time is not reached, so that the comparison with borrowed the point n / 2 runs the encoding process 5 of the measurement voltage As usual, the value "8" starts. After that, the correction point is K The discriminator reports to the sequence control that

set whose weight is expediently not yet the same as the measured value from the comparison voltage

that the position adjacent to the left in the result register has been exceeded, and position 2 is switched on,

is, therefore equal to 2 ~ " ^{/ 2.} Simultaneously with the setting The comparison voltage U _v approaches exponentially

at the control point K , the point n / 2 +1 is deducted from the value "14" and exceeds this until the point in time

switches. If the comparison voltage U _{v is} greater than the value "12" in the comparison, so that position 2

the input voltage U _E , the correction point K is switched off again. Now the correction

switched off again; if, on the other hand, it is smaller, then K remains on and code 3 remains off, see above

it is switched on, and the result of the comparison voltage being equal to "12"

Steps 1 ... n / 2 in a not shown »1« -Ad- 15 approaches. Before the value is reached, the

who adds a "1". The remainder of the comparison is carried out, the correction point K remains

The coding process proceeds as usual. When switched on, code 3 is switched on again.

Number of digits of the level cipher can be switched with this. It is found that the measured value exceeds

Procedure, compared to known steps, so that position 3 is switched off,

The number of keys is almost halved. Position 4 is also switched off again. That

recovery time can be achieved. This time may be due to the preliminary result of the encryption process

Inserting several correction points is therefore still 10 (1) 00, the correction point in

be shortened. Brackets is set. The content of the correction point

According to a further development of the invention, the two front codes are added

the step times for the positions 1 ... K not equal, 25 added, so that the final result 1100 = 12

but graduated. Likewise are the step times for is. In this example, for better illustration

the places «/ 2 + 1 ... η graduated. On the other hand, the switching off of the positions in a separate

the step times of digits 1 and n / 2 + 1, 2 and th step are carried out. However, it goes without saying

n / 2 + 2 etc. appropriately the same. The shortest borrowed that one body was shut down and the next

The total encryption time is achieved if the 30 digits are activated in the same step

Step times are equal to (n / 2 - χ +1) In 2 · T , where can.

with h / 2 the number of digits, with χ the respective digit. 3 another process and with T the time constant of the transient encoding process is described, in which the gear is encoded after switching on a digit denoted by the analog value »7«. There is in the first. Such a gradation of the step times can be achieved with a reducer 5 if the measuring voltage is exceeded 35 steps. This switched off digit "1" again. The digit »2« can, for example, remain switched on like a ring counter. Be built with the switch on the Korgebaut, which is a pulse rekturstelle with each revolution, in contrast to z. B. according to FIG. 2 emits and from which the measured value is exceeded after each cycle, so that the Kor is also switched off, so that the cycle times with a 4 ° correction point are switched off. Shorten digits 3 and 4 each cycle. As a coaster it can also remain switched on. The result is 01 (0) 11, and a binary counter with decoding circuits is used as the end result, one obtains Olli = 7, since the addition, from each of which the pulses for adding the content of the correction point, no step time of a point are taken. It's change more results.

not always necessary, a special step time for each step; it can also be modified. So it is possible for two correct groups of levels to have the same step time. In this case, the number of stages of the reducer comparison voltage with the weight 2 ~ " ^{/ 2} and can be reduced Depending on which output pulses remain the step times for the position, the result will be a "1" with a corresponding 1 ... n / 4 or n / 2 + 1 ... 3/4 η , Value added or subtracted from it. Even during the step times of the levels n / 4 + 1 ... K it is possible to set a constant, non-controllable span or 3/4 η +1 ... η equal to the clock pulse period, the polarity of which is the This method can of course be set to the comparison input of the 55 and which has the same amount as the graduated step times also with converters one digit n / 2 +1, which has no corr control point included. To switch the discriminator. At the beginning of the

In the one shown in FIG. The diagram shown in Figure 2 is the coding process, this tension is caused by

the output voltage of the digital-to-analog switch-on of level n / 2 +1 is compensated. With the

setter 2 for an encryption of the analog value 60. Setting the correction point is level n / 2 +1

12 with a level encryptor with four code-dropped. If the correction point remains switched on,

and a correction point illustrated. the result will be a "1", again with the

The values of the codes are added according to the corresponding weight, otherwise

Graded dual code, d. In other words, position 1 has subtracted the one "1" from the result. In the case,

Value "8", digit 2 the value "4", digit 3 65 to ensure that errors only occur after one

the value "2" and the digit 4 the value "1". The direction to occur only needs one correction point

The value of the correction point is the same as that provided, without any other point

Code 2 and thus equal to »4«. Correction must be used at the beginning.

Claims (8)

Patent claims: 1. Method for analog-digital conversion according to the step conversion method, in which the measuring voltage is compared step by step with the sum of partial voltages, which are graded according to a code and each assigned to a digit of the code, the next smaller partial voltage being switched on when the sum is less than the measuring voltage and the last connected partial voltage is switched off again and the next smaller partial voltage is switched on if the total voltage is greater than the measured voltage, and a "1" is written in the digits of the code assigned to the connected partial voltages, characterized in that after a predetermined number of code digits (n / 2), corresponding to a section of the conversion process, a correction point (K) with a partial voltage (2 ~ " ^{/ 2} ) assigned to it is switched on and the result of the analog-digital Implementation is changed by a value that corresponds to the part assigned to the correction point If the sum (U _v ) of the partial voltages assigned to the codes (1 ... n / 2) and the correction point (K) is less than the measurement voltage (U _E ) . 2. The method according to claim 1, characterized in that at the beginning of a portion of Umsetzverfahrens is switched on, an additional voltage (2 ~ ^{"/ 2 + 1)} which is equal to half of the correction point (K) associated with the partial voltage (2 ~ ^{n / 2} ) and which is switched off when the correction point (K) is switched on. 3. The method according to claim 2, characterized in that the additional voltage (2 ~ " ^{/ 2 + 1} ) is the partial voltage assigned to a code position (n / 2 + 1). 4. The method according to any one of claims 1 to 3, characterized in that the partial voltage (2 ~ " ^{/ 2} ) assigned to the correction point (K) is equal to that of the partial voltage of the code point (n / 2) , which in the last comparison of the total voltage ( V V) with the measuring voltage (U _E ) was switched on before the correction point (U) was switched on and that in the event that the total voltage (U _v ) is made up of the individual voltages of the codes (1 ... n / 2) and the correction point (K) is less than the measuring voltage (U _E ) , a "1" with the value corresponding to this code is added to the result. 5. The method according to claim 1, characterized in that when the sum (U _v ) of the codes (1 ... n / 2) and the correction point (K) associated partial voltages is greater than the measurement voltage (U _E ) , the Partial voltage of the correction point is switched off and an equally large partial voltage with opposite polarity is switched on and the result is reduced by the value corresponding to the partial voltage of opposite polarity. 6. The method according to claim 5, characterized in that a non-controllable partial voltage with the other partial voltages Λ opposite polarity of the sum voltage is added, which is initially compensated by an equally large voltage of opposite polarity that when the correction point is turned off the compensation voltage and a Voltage of double magnitude is switched on, which is switched off again when the sum of the partial voltages and this voltage exceeds the measured value. 7. The method according to any one of claims 1 to 6, characterized in that the times for the Comparison steps are selected to be shorter, the smaller the partial voltages and the required Accuracies in comparison are. 8. The method according to claim 7, characterized in that the time for the comparison steps decreases proportionally to the number of comparisons made. 1 sheet of drawings