DE1772991C3 - Method for generating tones of a well-tempered scale - Google Patents

Description

7. Device for performing the method according to claims 2 and 3, characterized in that the main oscillator (O in F i g. 9) with a first input (1) of a first blocking circuit (B ₁ ) and a first 20 divider (Z) ₁ ) is connected to a second input (2) of a third blocking circuit (B ₃ ) and a first output terminal (AT ₁ ), the output of the first blocking circuit (B ₁ ) being connected to a first input (I) of a second blocking circuit (B ₂ ) and connected via a second 20-Tciler (D ₂ ) to a second input (2) of a fourth blocking circuit (B ₄ ) and a second output _{terminal (AT 2} ), the output of the second blocking circuit (B ₂ ) leads to a first input (1) of the third blocking circuit (B ₃ ) and via a third 20 divider (D ₃ ) to a second input (2) of a fifth blocking circuit (B ₅ ) and a third output terminal (AT ₃ ), while the output of the third blocking circuit (B ₃ ) with a first input (1) of the vie rten blocking circuit (B ₄ ) and a first 5-divider (D ₄ ) is connected, on the one hand with a first 3-divider (D _r ,), the output of which leads to a second input (2) of the first blocking circuit (B ₁ ) , and on the other hand is connected to a first 4-divider (D ₆ ), the output of which leads to a second input (2) of a sixth locking switch (B ₆ ) and a fourth output terminal (AT ₄ ), the output of the fourth blocking circuit (B ₄₎ having a first input (1) of the fifth inhibit circuit (Q ₅₎ and a second 5-splitter (D ₇₎ is connected, on the one hand via a second 3-divider (D _H) at a second input (2 ) the second blocking circuit (B ₂ ) and on the other hand via a second 4-part (Z) ₉ ) to a second input (2) of a seventh blocking _{circuit (A 7} ) and a fifth output terminal (.K ₅ ), the output of the fifth blocking circuit (B ₅ ) with a first input (1) of the sixth blocking circuit (S ₆ ) and a fourth 20 divider (D ₁₀ ) is connected to a second input (2) of an eighth blocking circuit (Bg) and a sixth output terminal (K _e ) , the output of the sixth blocking circuit (B ₀ ) being connected to a first input (1) of the seventh blocking circuit (Zi ₇ ) and a fifth 20-divider (D ₁₁ ) is connected to a second input (2) of a ninth blocking circuit (A ₉ ) and a seventh output terminal (AT ₇ ), while the output of the seventh blocking circuit (B ₇ ) is connected to a first input (1) of the eighth blocking circuit (B ₈ ) and via a sixth 20 divider (D ₁₂ ) to a second input (2) of a tenth blocking circuit (B ₁₀ ) and an eighth output terminal (AT ₈ ), the output of the eighth Blocking circuit (S ₈ ) with a first input (1) of the ninth blocking circuit (Zi ₉ ) and a seventh 20-divider (D _n ) with a second input (2) of an eleventh blocking circuit (B ₁₁ ) and a ninth output terminal (AT ₉ ) is connected, while the output of the ninth locking switch aging (B _a ) leads to a first input (1) of the tenth blocking circuit (B ₁₀ ) and via an eighth 20-divider (D ₁₄ ) to a tenth output terminal (AT ₁₀ ), the output of the tenth blocking circuit (B ₁₀ ) is connected to a first input (1) of the eleventh blocking circuit (B ₁₁ ) and via a ninth 20 divider (D ₁₅ ) to an eleventh output terminal (AT _n ), the output of the eleventh blocking circuit (B ₁₁ ) via a tenth 20 Divider (Di ₆ ) is connected to a twelfth output _{terminal (AT 12} ).

8. Apparatus according to claim 6 or 7, characterized in that the divider circuits (D ₁ to D ₁₄ or Z) ₁ to D ₁₆ ) are assembled from blocking circuits.

9. Apparatus according to claim 7 or 8, characterized in that the output terminals (AT ₁ to AT ₁₂ ) are each connected to an η divider (C ₁ to C ₁₂ ), where η is at least 4, the output signals being the tones of the are the highest desired octave.

10. Device according to one of claims 6 to 9, characterized in that the main oscillator (O) is continuously and / or gradually detuned.

11. Device according to one of claims 6 to 10, characterized in that the lower Octave tones can be derived from the tones of the highest octave using 2-divisors.

The invention relates to a method for generating the tones of a scale in an electronic musical instrument by means of three signals, each assigned to a tone of the scale, whose frequencies / ,, / ₂ and / _{3 are given} by the relation /, / ₃

= ίο are linked.

In a known method, it is assumed that a number of free-running oscillators is equal to the number of tones per octave, which oscillators are tuned to a different pitch are, whereby the one or more octaves lower lying tones by means of 2-divisors from the tones of the Oscillators can be derived.

Of course, detuning one or more of these oscillators would detune all of them tones derived therefrom and ultimately the instrument.

The object of the application is therefore based on a method for generating the tones of a scale in an electronic musical instrument of the type described in the introduction to prevent detuning of the instrument from occurring.

This object is achieved in that the first signal is a first input of a lock. circuit is supplied and at a second input thereof the w-th part of the frequency of the third signal is fed and this blocking circuit blocks a single period of the first signal after m periods of the third signal and this signal obtained in this way at its output as a second signal Provides.

By a suitable choice of the number m , the frequencies of the other tones of the octave are fixed in relation to the frequencies of the free-running oscillators, so that the mutual frequency ratios, which require the correct tuning of the instrument, remain more constant.

If you choose z. B. in a system of 31 tones per octave, where the intervals between two successive tones are equal to J / 2, the divisor m is equal to 37, then

/ 10 - / · - V74 / ₃₂ = 1/37 /, = 0.0270270.

which value only deviates by 1.3 - 10 ^s from the correct value of 0.0270405, which deviation is not noticed by the ear. The frequency / is chosen as the norm equal to 1.0.

Depending on the type of scale and / or the circuit used, it can be advantageous not to choose m to be the same for all tones. It can e.g. B. for the tones of an octave according to the pure tuning m can be chosen in sequence equal to 12, 9, 5, 4, 3 and 2, so that the following relationships result: "

fc, =

fli =

ft =

rfi =

c ₂ - 1/9 rf,
c ₂ - 1/4 /,
b, -1/3 d _x
ft-1 / 12c,
C ₂ - 1/2 S ₁
/ ι - 1/5 b _x

In another form of the method according to the invention, in particular for generating tones According to an almost well-tempered 12-note scale, the derived notes are each off two other tones received according to the relationship:

where π denotes the ordinal number of the tone in the scale.

In a well-tempered 12-note scale, the ratio between the frequencies of neighboring notes is equal to | 2 · Becomes the lowest of the FrCqUCnZCnZ ₁

Assuming the norm equal to I, the other frequencies of the tones are the chromatic ones thus constructed Scale equal:

Λ ---- ι, οοοοοο

/ ₂ = 1.059 463

= 1.122 462

· = 1.189 207

= 1.259,921

= 1.334 840

= 1.414 214

= - 1,498 307

= 1.587 401

= 1.681793

= 1.781 797

= 1.887,749

= 2,000,000

/ ll

/ 12

/.3

Here / “is the octave of f _v

A closer look at the frequency values shows that the difference between / „and / _{10 is} practically equal to 1/10 of the frequency of the fundamental / or 1/20 of the frequency of the octave / ₁₃ . Since the frequencies form a geometric series, a corresponding relationship applies to all other successive frequencies in the scale.

Using the above relationship, we get the following set of equations:

/ ,, = /, 3 (Main oscillator) - / » -i'io /, / n - / » - ι / ίο /, /, 0 = - "/ n - 1/10 /, = / "- l / 20 /, 3 / 9 - Ao - 1 '20 /, ₂ /. - l / 20 / π ^f f = Λ - 1 '20 / ,, f. - h - l''20 / I A. - f 1/20 f. - 1 '20 /, / ₂ = / ₃ - 1 _20/5

The solution to this theorem gives the following frequency values and those given after them Deviations in 1/1 000 000 of the frequencies by applying the approximate relationship and the ideal frequencies:

/ 2 - 1,059 460 - 3.1 / 3 ■■ = 1.122 455 - 6.2 = 1.189 196-9.3 Λ = 1.259 905 - 12.4 = 1.334 819 - 15.5 } -. = 1.414 187 - April 18 / η ■ = 1,498 275 -21.3 /. - 1.587 366 - 22.4 / ίο = 1,681,753 - 23.5 / π = 1.781 809 + 6.2

60 / _1S = 1.887 754+ 3.1

The largest deviation occurs between / _n and / ₁₀ , but this too is less than 30 · 10- ^s .

In a further method according to the invention for generating an almost well-tempered 12tö-

Some scales are the derived tones respectively of two other tones according to the relationship

, _, 1 / 1W f ^ MWf

Jn- 3 = J _n 2 unj «-, ./ r-, i / Juy _{B + 7}

receive.

/ '"_ ₅ is the fifth of /" _ i2 or the fourth of fn, which intervals are practically pure in tempered tuning. Therefore _1/15 / Λ ~ _{6 is} almost equal to 0.1 J _n i2 or 1/20 / «. The deviation from the ideal frequency is then somewhat larger than in the previous case, but the result is entirely useful.

For non-sinusoidal signals such as B. pulse-shaped Signals, the frequency is understood to be the pulse repetition frequency, which is again can be thought of as the number of pulses per second. You don't think about one anymore precisely regular series of pulses. Whether this series of pulses subjectively as an acceptable tone perceived depends on the extent to which the pulse spacing changes. Will the frequency / by the number of pulses / V during a certain Replaced time, the previous formulas are still valid if / in it by TV is replaced.

Starting from the relationship

the series N _{n 2} is supplied to a first input of the blocking circuit and the pulse series; V "is supplied to a second input via a 20 divider. At the N _{n 3} output, the series of pulses Λ ',, _{2 appears} until the pulse series N _{n has reached} a multiple of 20, whereupon the blocking circuit ensures that a single pulse of the Λ'π-2 series does not lead to , V _n -3 output is passed.

in one embodiment of a device for performing the method according to the invention the blocking circuit has a first input to which the first signal is fed and which has a first input of a first AND gate is connected and its second input to a first Output of a bistable flip-flop is connected, of which a first input to an output of a w-divider, the input of which is the third signal is fed, while a second output of the flip-flop with a second input of a second AND gate, whose first input is also supplied with the first signal, during the Output is connected to the second input of the flip-flop.

In another embodiment of such a device, the blocking circuit consists only of logic circuits with a number of inputs and an output at which a voltage at two levels can occur, the voltage at the first level occurring when the voltages at the inputs all one have first value and one of the voltages occurs at the second level when the voltage at the inputs has a second value, the second signal being fed via a first input terminal to a first input of a first logic circuit, the output of which is connected to a first input to a second and third logic circuit is connected and wherein the output of the second logic circuit leads to a second input of the third logic circuit, the output of which is connected to a first input of a fourth logic circuit, the output of which leads to a second input of a fifth logic circuit, a first entrance of the same auc h _{the second signal} . _{The output is} connected to the first output terminal and an input of a sixth logic circuit, the output of which leads to a second output terminal, while a second input terminal is connected to a second input of the fourth logic circuit and

xo leads to a first input of a seventh and eighth logic circuit, a second input of the seventh logic circuit being connected to the output of the second logic circuit and the output of the seventh logic circuit leading to second inputs of the second and eighth logic circuits, while the output the eighth logic circuit with a first input of a ninth logic circuit, of which a second input leads to the output of the fourth logic circuit

ao circuit and the output to a third input of the fourth logic circuit, a second input the first logic circuit and a third output terminal leads.

The advantage is that this circuit can easily be in the form of an integrated circuit and that these circuits continue in a further embodiment of the invention to build the subcircuits can serve so that a whole generator can be assembled from the same individual parts can.

According to a further feature of the device for generating an almost well-tempered, 12-tone The scale is a master oscillator with a first input of a first lockout circuit and over a first 20-divider with a second input of a third blocking circuit and a first output terminal connected, while the output of the first blocking circuit with a first input of a second blocking circuit and a second 20-divider with a second input of a fourth Blocking circuit and a second output terminal is connected, the output of the second blocking circuit to a first input of the third blocking circuit and via a third 20 divider to one second input of a fifth blocking circuit and a third output terminal leads, and the output with a first input of the fourth blocking circuit and a fourth 20-divider with a second Input of a sixth blocking circuit and a fourth output terminal is connected, the Output of the fourth blocking circuit to a first input of the fifth blocking circuit and over a fifth 20-divider with a second input of a seventh blocking circuit and a fifth Output terminal and the output of the fifth blocking circuit with a first input of the sixth Blocking circuit and a sixth 20 divider with a second input of an eighth blocking circuit and a sixth output terminal is connected, the output of the sixth interlock circuit with a first input of a seventh blocking circuit and a seventh 20-divider with one second input of a ninth blocking circuit and a seventh output terminal is connected while the output of the seventh blocking circuit to a first input of the eighth blocking circuit and via an eighth 20 divider to a second input of the tenth blocking circuit and an eighth output

9 '10

output terminal leads, the output with a third 20-divider to a second input of a fifth

first input of the ninth blocking circuit and via blocking circuit and a third output terminal

a ninth 20-divider with a second input and the output of the third blocking circuit

an eleventh locking circuit and a ninth output, a first input of the fourth locking circuit and

output terminal is connected and the output of 5 is connected to a first 5-divider, on the one hand with

ninth blocking circuit to a first input which is connected to a first 3-divider, the output of which

tenth blocking circuit and a tenth to a second input of the first blocking circuit and

20-divider leads to a tenth output terminal, on the other hand leads to a first 4-divider whose output

whereby the output of the tenth locking mechanism goes to a second input of a sixth locking

a first input of the eleventh blocking circuit and io circuit and a fourth output terminal leads,

via a first 10-divider on the one hand with a second with the output of the fourth locking mechanism

Input of the first locking mechanism and on the other hand a first input of the fifth locking mechanism and

A first 2-divider is connected to an eleventh output and a second 5-divider, on the one hand

terminal is connected, while the output of the via a second 3-divider to a second input

Eleventh locking mechanism via a second 10-divider 15 of the second locking mechanism and, on the other hand, via one

on the one hand with a second input the second second 4-divider to a second input one

Lock Schahung and on the other hand a second, seventh Lock Schahung and a fifth exit

2-divider leads to a twelfth output terminal, whereby the output of the fifth blocking

that is. circuit with a first input of the sixth

In each locking circuit, pulses 20 locking circuits and a fourth 20-divider are also locked, and the resulting signal is fed to the next, second input of an eighth locking circuit, in which again and a sixth output terminal are connected pulses from the resulting series be blocked. and the output of the sixth lock with the result consists of twelve series of pulses, a first input of the seventh lock with the ratios between the central 25 and a fifth 20 divisor with a second number the frequency ratios of the tempered input of a ninth lock and correspond to a mood and the pulse distribution is connected to the seventh output terminal, while the lower tones have an increasing irregularity - the output of the seventh locking circuit has to a moderation, since its impulses have passed an increasing first input of the eighth locking circuit and a number of locking circuits. The 30 a sixth 20-divider to a second input signal Z _1, which is not obtained effectively in this manner, a tenth locking saddle Hung and an eighth Ausda it is the octave of / ₁₃ has a number of import through terminal leads, wherein the The output of the eighth pulses is equal to half the number of / ₁₃ . In the ideal locking circuit with a first input of the ninth case, one could expect that after each pulse locking and over a seventh 20-divider a pulse would be omitted. However, practice shows approximately the following with a second input of an eleventh blocking circuit: 6 pulses, 5 blocked pulses, and a ninth output terminal is connected to 2 pulses, 6 omitted pulses, etc. This irregularity and the output of the ninth blocking circuit make one very unpleasant impression first input of the tenth locking circuit and over on the ear. As the signal is fed to the dividers, an eighth 20-divider is fed to a tenth output, these irregularities are strongly reduced, whereby the output of the tenth block is reduced, circuit with a first input of the eleventh block.

As a result of the effect of capacitances and re-switching and a ninth 20-divider with one

the circuits have a delay time. eleventh output terminal is connected and the output

The delay times are in the sequence of the eleventh lockout over a tenth

the following circuits are added together, and with the 45 20-divider with a twelfth output terminal

(If a certain value is exceeded, it must be bound.

little pulses are omitted, so that the level of the irregular distribution of the

Pulse frequency is limited. Impulses that are very unpleasant in the ear

Consequently, a sufficiently high impression cannot be made by the supply of the signal number can be divided in order to obtain a good quality of the tones 50 at 2-divisors, so that at the highest octave of the piano. The use of the outputs of the 20 divider and, if the delay time is influenced, is a maximum between the binding of the output terminal with one «! Divider each, the outputs of the 10 divider and the input (m --- at least 4) signals of the thereby controlled blocking circuits. of the device according to the invention, whereby the embodiment of a device for output signals are the tones of the highest desired generation of an almost well-tempered 12-tone octave, these irregularities on a scale can have this influence reduced by an acceptable size. Since the frequencies that a master oscillator with a first of the tones of the octave are uniquely determined by the frequency of the input of a first blocking circuit and a main oscillator, it is advantageous first 20 divider with a second input of a third 60 according to a further feature of the Device according to the locking circuit and a first output terminal according to the invention, the main oscillator is continuously linked, while the output of the first locking and / or stepwise detunable form. This circuit with a first input of a second locking device can be used to adapt and / or transpose the pitch of the oscillators to another circuit and a second 20-divider with an instrument. The second input of a fourth locking mechanism and a continuous detuning also enables a second output terminal to be connected, which generates special effects 7. B. to imitate the output of the second locking mechanism to a first of a Hawaiian guitar. The lower octave tones entering the third lock and above one are each from the tones of the highest octave

derived by means of a 2-divider. The above will be on hand the following figures explained in more detail. It shows

F i g. 1 a blocking circuit with two AND gates and a flip-flop circuit,

F i g. 2 the voltages at different points in this circuit,

F i g. 3 a blocking circuit with logic circuits and

F i g. 4 the voltages at different points in this circuit,

FIG. 5 a shows the blocking circuits of FIG. 3 as 2-piece,

F i g. 5 b the associated voltages,

F i g. 6a the same circuits as 3-divider, FIG. 6 b the associated voltages,

F i g. 7a the circuits as 5-part,

F i g. 7 b the associated voltages,

F i g. 8 a complete oscillator with 10 and 20 dividers,

F i g. 9 a similar oscillator with 15 and 20 dividers,

10 shows the ideal pulse distribution and the distribution after the circuit and

11 shows the improvement in the momentum distribution after passing through 2-divisors.

According to FIG. 1 the first signal is fed to terminal 5. The terminal .S "is connected to a first input Y of a first AND gate, which consists of the diodes D ₃ , D ₄ and the resistor R _2. The second input of this AND gate has a first output 3 of a bistable flip-flop FF is connected. the first input 1 of this flip-flop FF performs a "j-divider M, whose input the third signal S ₃ is fed to the output. a second output 4 of the flip-flop FF is connected to a second AND gate having a second input, which consists of the diodes D ₁ , D ₂ and the resistor Zf ₁ , the first input of which is also supplied with the first signal S, while the output of the second AND gate is connected to a second input 2 of the bistable multivibrator FF . In this case, the? j divider is constructed in such a way that its output voltage changes when the input pulse changes from voltage level 1 to voltage level 0. In the normal state, the pulses of signal S ₁ from the first AND gate are allowed through, since the output 3 of the bistable multivibrator ff is 1, so that the voltage at the point / changes in the same way. Since the voltage at the output 4 of the bistable multivibrator is FFO , the point χ also remains 0, regardless of the signal S ₁ .

It is assumed that the output of the w-divider Λ /, ie the input 1 of the flip-flop FF changes from 1 to 0: at the moment when the pulse series S _{1 is} 0, the flip-flop FF goes into the other state over. Point 4 becomes 1 and point 3 becomes 0, so that diode D ₄ conducts and D _{2 is} blocked. In the case of a subsequent pulse in the pulse series S ₁ , the point ν remains 0. so that this pulse is not allowed to pass. Point χ, on the other hand, is followed by the voltage of the input pulses, so that at the end of the next pulse from S ₁ χ from 0 to 1, the change in voltage is transmitted to input 2 of the bistable flip-flop FF , which returns to the initial state at point 3 1 and point 4 is 0, so that the next pulses are again allowed to pass from the first AND gate to point /. After a certain time, the output of the m-divider M changes from 0 to 1 again, but this does not affect the state of the flip-flop FF, since it only responds to the back flank of the pulses. This is in FIG. 2 shown individually.

F i g. 3 shows a blocking circuit that consists only of logic circuits with a number of inputs and an exit at which one

ίο voltage can occur at two levels 0 and 1, the voltage at the first level 0 occurs when the voltages at the input all have a first value 1 and a voltage at the second level 1 occurs when one of the voltages at the inputs has a second value has 0. The first signal S ₁ is fed via a first input terminal A to a first input 1 of a first logic circuit L ₁ , the output H of which is connected to a first input 1 of a second and third logic circuit L ₂ or L ₃ , and the output / the second logic circuit L ₂ leads to a second input 2 of the third logic circuit L ₃ , the output C of which is connected to a first input of a fourth logic circuit L ₁ , the output F of which leads to a second input 2 eini fifth logic circuit L ₃ , a first input 1 of the same is also fed the first signal S ₁ and the output is connected to a first output terminal O and an input 1 of a sixth logic circuit L ₆ , the output of which leads to a second output terminal G , while a second input terminal D, which the third signal S _{3 is} fed to a second input of the fourth logic circuit L ₁ and a first input 1 of a seventh and ei Ner eighth logic circuit L ₇ or L ₈ leads, a second input 2 of the seventh logic circuit L _{7 is} connected to the output J of the second circuit L ₂ and the outputs of the seventh logic circuit L ₇ to the second

4 "input of the second and the eighth logic circuit L ₂ or L ₈ leads, while the output B of the eighth logic circuit L _{8 is} connected to a first input 1 of a ninth logic circuit L ₉ , from which a second input 2 to the Output F of the fourth logic circuit L ₁ and the output to a third input 3 of the fourth logic circuit L ₁ and a second input of the first logic circuit and a third output terminal E leads.

The truth table associated with this circuit is as follows:

ABCDEFHJKOG

Al 10 0 1 10 1/4/1
(A is any 0 or 1)

0 0 1110 10 110
(the third signal S ₃ becomes 1)

111 110 0 10 10

(a new impulse from S, comes)

0 10 10 1110 10

(Impulse from S ₁ ends)

1 1 0 1 0 I 1 1 0 0 1

(a new impulse comes from S ₁₎

etc.

4? ς

O 14

01100110110 Blocking circuit A ₅ and a third output terminal

(Pulse from S ₁ ends, and the third leads and the output with a first input 1 dei

Signal S ₃ becomes 0) fourth blocking circuit B ₄ and a fourth

2-7eiler D _x with a second input 2 a sixth

11100110101 ⁵ blocking circuit B ₆ and a fourth output

(the next impulse comes from S ₁ ) terminal AT _{1 is} connected and the output of the fourth

^{ö Locking} circuit B ₄ with a first input 1 dei

fifth split circuit B ₅ and over a fifth

^etc. · 20 divider D _s with the second input 2 of a seventh

ίο Blocking circuit B- and a fifth output

The voltage forms at the various output terminals A _{5 are} connected, while the output is shown in FIG. 4 illustrates. It can be seen that the fifth blocking circuit B _b to a first input 1 that the occurrence of a pulse S _{3 of} any length of the sixth blocking circuit B ₆ and via a sixth at the input terminal D the next Im-20 divider D ₆ to a second input 2 a eighth pulse of the signal S ₁ at the input terminal A blocks 15 blocking _{circuit fi s} and a sixth output and lets the pulses appearing on it again. terminal A ₆ leads, the output being the sixth

In this figure, two cases are indicated: ie the blocking circuit B ₆ with a first input 1, the case in which at time Z ₁ the voltage at input A is a seventh blocking circuit B ₁ and a seventh is just 0, and the case in which at time i ₂ the 20-part D ₇ with a second input2 of a ninth voltage at input A is just 1. It can be seen, 20 blocking circuit B ₉ and a seventh output that in both cases the first positive pulse is connected to terminal K ₁ and the output of input A is blocked. seventh blocking circuit B ₁ to a first input 1

F i g. 4 shows how a blocking circuit according to FIG. 3 an eighth blocking circuit ß _s and can be connected via an eighth as a 2-divider, by the initial divider 20 D ₈ connectedness to a second input 2 of a tenth gear O to the input D of the third signal 25 Spcrrschaltung _{B] u} and an eighth output den and the output E leads the signal taken from terminal A ₈ , while the output becomes one. By the signal E being fed back to an input A first input 1 of the ninth blocking circuit ß, unc a second blocking circuit and the span via a ninth 20-divider Z) ₉ to a second input from the output E of this circuit is taken from output 2 of an eleventh blocking circuit B _{becomes n} and eini results in a 4-divisor. In FIG. 6a, the ninth output terminal A ₉ is shown and the output is the same as with two blocking circuits according to FIG. 3 of the ninth blocking circuit ß ₉ can build a 3-divider to a first input by the output C, the tenth blocking circuit O ₁₀ and a tenth of a first blocking circuit S ₁ with the input A ₂ 20-divider D ₁ ,, to a tenth output terminal K _{11 of} a blocking circuit B _{2 is} connected, the execution of which, the output of the tenth blocking circuit! output O _{2 is} connected to input D _{2, the} device O _{1n being} connected to a first input I of the eleventh blocking signal of output E ₂ to input D ₁ of first circuit B _n and via a first 10-divider D, blocking circuit B _{1 is} supplied and the input signal, which is divided by 3 on the one hand with a second input 2 of the first blocking input signal from the output E _{1, is} taken from circuit B ₁ and on the other hand via a first. The voltages occurring at various points in this circuit 2-divider D ₁₂ with an eleventh output terminal K ₁ are connected to the relevant 40., While the output of the eleventh blocking graphic representations in FIG. 6b indicated. circuit B ₁₁ via a second 10-divider D ₁₃ an Ind between the output C _{1 of} the first blocking side with a second input 2 of the second blocking circuit B ₁ and the input A _{2 of} the second blocking circuit B ₂ and on the other hand via a second circuit a third 2-divider D _1. , connected as a 2-divider, with a twelfth output terminal A ', blocking circuit B _x , results in e; n 45 is connected.

5-part according to F i g. 7a with the tensions according to the effect of capacities and cons

Fig. 7b at the various points of these switch positions, the impulses with a certain tion. With these blocking circuits it is possible to have a delay line passed through the elements. This By means of just one type of individual parts, a complete delay times count towards each other gen oscillator for an electronic musical instrument 50 following circuits together, and when about including all dividers. exceeding a certain value become too much

Such an oscillator is shown in FIG. 8 shown. Skipped impulses.

This oscillator produces the tones of an almost well- The influence of the delay time is maxima

Tempered, 12-tone conductor by means of a main between the outputs of the 10-TeUCrD ₁₁ and D ₁ oscillator, eleven blocking circuits, ten 20-dividers and 55 and the input signal of the two 10-dividers controlled by them. The signal of the main oscillator O becomes blocking sounds B ₁ or S ₂ . The result is that a first input 1 of a first locking circuit O ₁ cannot be divided by a sufficiently high number and _{a second input via a first 20-divider D 1} to generate the highest note of the piano ft, and a first heat of the device according to FIG. 9 to the production

Output terminal A ₁ supplied, while the output 60 of an almost well-tempered, 12-tone conductor came to the first blocking circuit B ₁ with a first input Ϊ the influence of the delay time thereby reducing a second blocking circuit S ₂ and a second, that in those in which dii 20-divider D ₂ with a second input 2 of a fourth signal of 10-divider D ,, or D ₁₃ to the first uik split circuit B ₁ and a / wide output second blocking circuit B ₁ or B ₂ fed back who terminal A ₂ connected is. whereby the output of the 65 den, the third signal is not routed from these 10-divisors divider circuit B .. to a first input I, but is taken from the outputs of two others of a third blocking circuit S ₃ and a third blocking circuit, whose Frequen 20-Tciler D _x / u the / wide input 2 of a fifth is divided by 15. The accuracy of the si

(ο

obtained frequency lower, but sufficient for the intended purpose. In the circuit according to FIG. 9, a main oscillator O is connected to a first input 1 of a first blocking circuit B ₁ and via a first 20 divider Z) ₁ to a second input 2 of a third blocking circuit B ₃ and a first output terminal / :, while the output of the first blocking circuit B ₁ with a first input 1 of a second blocking circuit B ₂ and via a second 20-divider D ₁ with a second input 2 of a fourth blocking circuit A ₄ and a second output terminal X _t and the output of the second blocking circuit B _t with a first input 1 the third locking circuit B ₃ and a third 20-divider D ₃ with a second input 2 of a fifth locking circuit B ₅ and a third output terminal K _t and the output of the third locking circuit B ₃ with a first input 1 of the fourth locking circuit B _t and a first 5-divider Z) _{4 is} connected, on the one hand with a first 3-divider D ₆ , from which the output leads to a second input 2 of the first blocking circuit B ₁ , and on the other hand is connected to a first 4-divider Z) ₆ , the output of which leads to a second input 2 of a sixth blocking circuit B _t and a fourth output terminal K _t , the output of the fourth blocking circuit A _{4 being} connected to a first input 1 of the fifth blocking circuit Zi ₆ and a second 5-divider D _{7 is} connected, which on the one hand leads via a second 3-divider Z) ₈ to a second input 2 of the second blocking circuit Zi ₂ and on the other hand via a second 4-divider Z) ₈ to a second input 2 leads to a seventh blocking circuit B ₇ and a fifth output terminal K _b , the output of the fifth blocking circuit Zi ₅ 'having a first input 1 of the sixth blocking circuit B ₉ and a fourth 20-divider Z) ₁₀ having a second input 2 to an eighth Blocking circuit B _s and a sixth output terminal K _{t is} connected, the output of the sixth blocking circuit B ₉ to a first input 1 of the seventh blocking circuit Zi ₇ and a five th 20-divider Z) _{11 is} connected to a second input 2 of a ninth blocking circuit B _t and a seventh output terminal K ₁ and the output of the seventh blocking circuit B ₁ to a first input I of the eighth blocking circuit B _s and a sixth 20-divider Z) ₁ , leads to a second input 2 of a tenth blocking circuit B ₁₀ and a right output terminal A ' _e and the output of the eighth blocking circuit B _s with a first input 1 of the ninth blocking circuit B _% and via a • seventh 20 divider Z ) _{18 is} connected to a second input 2 of an eleventh blocking circuit B _n and a ninth output terminal K ₉ and the output of the ninth blocking circuit B _t to a first input 1 of the tenth blocking circuit B _ia and via an eighth 20-divider Z) ₁₄ to a tenth output _{terminal AT 10} leads, the output of the tenth blocking _{circuit U 10} with a first; Input 1 of the eleventh blocking circuit B ₁₁ and a ninth 20-divider Z) _{15 is} connected to an eleventh output terminal K ₁₁ and the output of the eleventh blocking circuit B _{11 is} connected to a twelfth output terminal K ₁₂ via a tenth 20-divider Z) ₁₆ .

In each blocking circuit, pulses are blocked, and the resulting signal is fed to the next blocking circuit, in which any other pulses from the resulting series of pulses are blocked again. The result is twelve series of impulses, in which the ratio of the middle numbers corresponds to the frequency ratios according to the tempered mood and the impulse distribution in the lower tones shows an increasing irregularity, since the impulses have passed through an increasing number of blocking circuits. Would z. If, for example, the signal J _{1 is} generated in this way, which actually does not happen, since this is the octave of / ₁₃ , then this would have a number of pulses which is on average equal to half the number of / ₁₃ . Ideally, it could be expected that one pulse would be dropped after each pulse. In fact, however, the following can occur: 6 pulses, 5 pulses blocked, 2 pulses, 6 pulses omitted, etc. This is shown in FIG. 10 illustrates, in which the ideal pulse series is also shown. This irregularity makes a very unpleasant impression on the ear. By supplying the signal to 2-dividers, these irregularities are greatly reduced, which can be seen from FIG. 11, where the two signals according to FIG. 10 are led by such a 2-part. The intervals in the pulse train, which are pulse widths in FIGS. 10, 11 and 13, respectively, are reduced to 6 and 7 pulse widths, respectively. A further division by 2 reduces the number (see also Fig. 11) to 3.5 or 4.

In the F i g. 8 and 9 _{these additional dividers are designated with C 1} to C ₁₂ , in which the output voltages are taken from the terminals S ₁ to S ₁₁ . In this case, the divider C ₁ to C _lt 8-divider so that the frequency of the main oscillator under the condition that the sound C ₆ is to be still reproduced at a frequency of 4186 Hz, is equal to 8 x 20 x 4186 = about 670 kHz . The other 2-divisors are connected to terminals S ₁ to S _{11 in} order to achieve the lower octave tones.

The main oscillator can be detuned continuously and in stages. By gradually detuning is made equal to each semitone can easily be transposed. The continuous Detunability enables the pitch of the whole apparatus to match that of other instruments exactly to adapt, with whom it may be played together, it is also possible by this detuning is carried out over a certain range when a key is pressed will, special effects z. B. to achieve that of a Hawaiian guitar.

For this purpose 2 sheets of drawings

Claims (6)

Patent claims: 1. A method for generating the tones of a scale in an electronic musical instrument by means of three signals, each assigned to a tone of the scale, the frequencies / ,, / ₂ and / ₃ linked by the relationship /, / ₃ = / ₂ are, characterized in that the first signal is fed to a first input of a blocking circuit and at a second input thereof the m-th I part of the frequency djs third signal is fed and this blocking circuit a single period of the first after every m periods of the third signal Blocks signal and makes this signal obtained in this way available at its output as a second signal. 2. The method according to claim 1 for generating an almost well-tempered 12-tone tone ao ladder, characterized in that the derived tones each consist of two other tones accordingly the relationship can be obtained, where η is the ordinal number of the tone in the scale. 3. The method according to claim 1 for generating an almost well-tempered 12-note scale, characterized in that the derived tone from two other tones corresponding to the relationship / n-3 ⁼ fn-2 - 1/15 / n-5 = _{fn- 2} ~~ l / 30 / _n + ₇ is obtained, where η is the ordinal number of the tone in the scale. 4. Device for performing the method according to one of claims 1 to 3, characterized in that the blocking circuit (F i g. 1) has a first input (S ₁ ) to which the first signal is fed and which is connected to a first input ( Y) of a first AND gate (Z) ₃ , D ₄ , R ₂ ) is connected, at whose output the second signal is available and whose second input is connected to a first output (3) of a bistable multivibrator (FF) , of which a first input (1) leads to an output of an? M-divider (M), whose input (S ₃ ) is supplied with the third signal, while a second output (4) of the flip-flop circuit with a second input of a second and- Tors (Z) ₁ , D ₁ , R ₁ ) is connected, whose first input (Y) is also supplied with the first signal and whose output (A ^ is connected to a second input (2) of the flip-flop (FF). 5. Device for performing the method according to claims 1 to 3, characterized in that the blocking circuit (F i g. 3) consists only of logic circuits with a number of inputs and an output at which a voltage can appear at two levels, The voltage at the first level occurs when the voltages at the inputs all have a first value, and the voltage at the second level occurs when at least one of the voltages at the inputs has a second value, the first signal (S ₁ ) is fed via a first input terminal (A) to a first input (1) of a first logic circuit (L ₁ ) , the output (H) of which is connected to a first input (1) of a second and a third logic circuit (L ₂ and L, respectively) ₃ ), the output (J) of the second logic circuit (L ₂ ) leading to a second input (2) of the third logic circuit (I ₃ ), the output (C) of which with a first input (1) of a fourth logical en circuit (L ₄ ) is connected, the output (F) of which leads to a second input (2) of a fifth logic circuit (L ₅ ), the first signal (S ₁ ) also occurs at a first input (1) of the same, and the output of which is connected to a first output terminal (O) and an input (1) of a sixth logic circuit (L ₆ ), the output of which leads to a second output terminal (G), while a second input terminal (D) leads to a second input (2 ) the fourth logic circuit (L ₄ ) and a first input (1) of a seventh and eighth logic circuit (L ₇ and L ₈ ) leads, a second input (2) of the seventh logic circuit (L ₇ ) with the output (J) of the second logic circuit (L ₂ ) and the output (K) of the seventh logic circuit (L ₇ ) are connected to the second input (2) of the second and the eighth logic circuit (L ₂ or L _a ), the output (B) of the eighth logic circuit (L ₈ ) having a first input (1) of a nine th logic circuit (L ₉ ) is connected, of which a second input (2) to the output (F) of the fourth logic circuit (L ₄ ) and the output to a third input (3) of the fourth logic circuit (L ₄ ) a second input (2) of the first logic circuit (Lj) and a third output terminal (E) leads. 6. Apparatus for performing the method according to claim 2, characterized in that a main oscillator (O in F i g. 8) with a first input (1) of a first blocking circuit (Zi ₁ ) and a first 20-divider (D ₁ ) is connected to a second input (2) of a third blocking circuit (A ₃ ) and a first output terminal (K ₁ ) , while the output of the first blocking circuit (B ₁ ) is connected to a first input (1) of a second blocking circuit (B ₂ ) and a second 20-divider (Z) ₂ ) is connected to a second input (2) of a fourth blocking circuit (Zi ₄ ) and a second output terminal (K ₂ ) , and the output of the second blocking circuit (B ₂ ) to a first Input (1) of the third blocking circuit (Zi ₃ ) and via a third 20-divider (Z) ₃ ) to a second input (2) of a fifth blocking circuit (Zi ₆ ) and a third output terminal (Zv ₃ ), while the output the third blocking circuit (B ₃ ) with a first input (1) of the fourth blocking r circuit (B _t ) and via a fourth 20-divider (D ₄ ) with a second input (2) of a sixth blocking circuit (Zi ₆ ) and a fourth output terminal (K ₄ ) , the output of the fourth blocking circuit (B ^ ) is connected to a first input (1) of the fifth blocking circuit (B _b ) and via a fifth 20 divider (D ₅ ) to a second input (2) of a seventh blocking circuit (B ₇ ) and a fifth output terminal (K ₆ ) , while the output of the fifth blocking circuit (B _b ) to a first input (1) of the sixth blocking circuit (S ₆ ) and via a sixth 20-part (D ₆ ) leads to a second input (2) of an eighth blocking circuit (B ₈ ) and a sixth output _{terminal (AT 6} ), the output of the sixth blocking circuit (B ₆ ) having a first input (1) of the seventh blocking circuit (B ₇ ) and a seventh 20-divider (D ₇ ) with a second input (2) a ninth. Blocking circuit (B ₉ ) and a seventh output _{terminal (AT 7} ) is connected, while the output of the seventh blocking circuit (B ₇ ) is connected to a first input (1) of the eighth blocking circuit (B ₈ ) and via an eighth 20-divider ( D ₈ ) leads to a second input (2) of a tenth blocking circuit (B ₁₀ ) and an eighth output terminal (AT ₈ ), the output being connected to a first input (1) of the ninth blocking circuit (B ₉ ) and a ninth 20- TeHe ₁ - (Z) ₉ ) is connected to a second input (2) of an eleventh blocking _{circuit (B n} ) and a ninth output terminal (AT ₉ ), while the output of the ninth economy circuit (B ₉ ) is connected to a first input (1) the tenth blocking circuit (B ₁₀ ) and via a tenth 20 divider (D ₁₀ ) to a tenth output terminal (AT ₁₀ ), the output of the tenth blocking circuit (B ₁₀ ) to a first input (1) of the eleventh blocking circuit (B ₁₁ ) and via a first ΙΟ-divider (D ₁₁ ) on the one hand to a second input (2) of the ers th blocking circuit (B ₁ ) and on the other hand via a first 2-divider (D ₁₂ ) to an eleventh output terminal, e (AT ₁₁ ), while the output of the eleventh blocking circuit (B ₁₁ ) leads via a second 10-divider (D ₁₃ ) is connected on the one hand to a second input (2) of the second blocking circuit (B ₂ ) and on the other hand via a second 2-divider (D ₁₄ ) to a twelfth output terminal (AT ₁₂ ).