DE1563649B2 - CIRCUIT ARRANGEMENT TO INFLUENCE THE TRANSMISSION CHARACTERISTIC IN THE FORWARD OR RETURN CIRCUIT OF CONTROL DEVICES WITH CARRIER FREQUENCY - Google Patents

Description

The invention relates to a circuit arrangement for influencing the transmission characteristic in the forward or feedback loop of control devices with carrier frequency, where the signal is transmitted in the form of an amplitude modulation of a carrier frequency, with a quadrupole with Ohmic resistors and capacitors, which are arranged in at least one shunt impedance branch and are dimensioned so that the envelope of the carrier frequency signal has a predetermined amplitude and / or phase frequency response and in the case of the quadrupole controlled by the reference signal, non-linear Switching elements are included in the bridge circuit.

Such a circuit arrangement is already known from US Pat. No. 3,025,418. she enables the frequency response of the control deviation signal modulated onto the carrier frequency signal to influence in a manner corresponding to the DC regulators. The well-known However, the circuit arrangement has a relatively complicated structure, since it contains controllable non-linear switching elements in the form of transistors, Contains four-layer diodes or thyristors, at whose control electrodes the reference signal with the corresponding Phasing must be created separately in each case; however, it only provides a transfer function

the form that is common to many control systems

1 +] <»P ^{& &}

is insufficient.

The object of the invention is to provide a

Circuit arrangement of the type specified at the outset which, with a simple structure, has a transfer function of the form that is significantly more favorable for control devices yields, where τ and τ 'are time constants,

which determine the frequency interval in which the influence takes place.

According to the invention, this is achieved in that the bridge circuit has a rectifier element in each branch in series with a resistor and that its one diagonal is fed by a reference voltage and the other diagonal from a transformer arranged in the shunt impedance circuit is fed, at its center tap a on Ground capacitor is connected.

The circuit arrangement according to the invention contains only simple rectifier elements and resistors in the bridge circuit, and the reference signal is applied only once to a bridge diagonal; the structure is therefore very simple. The time constant τ ' contained in the transfer function is determined by the resistance contained in each bridge branch together with the capacitor connected to the center tap of the transformer; this time constant can easily be changed to adapt to different operating conditions.

Further advantages of the circuit arrangement according to the invention are:

complete lack of thresholds and non-linearities as a function of amplitude of the input signal,

Elimination of settings, adjustment potentiometers, etc.,

Great operational reliability, as the material used is made up of passive circuit elements and transistors is formed in a collector circuit,

Relatively low impedance of the circuit and accordingly insensitivity to electrical interference fields,
The same circuit can be used with appropriate adaptation for control devices with different carrier frequencies, for example 50, 60, 800 or 2000 Hz,
the time constants of the transfer function of the circuit can be changed as required,

the attenuation of the door circuit, the modulation frequency zero, can be set at will by appropriately dimensioning the resistor R 1.

563 649

The invention is described below by way of example with reference to the drawing. In it shows

F i g. 1 is an overview circuit diagram to explain the arrangement of the circuit arrangement according to FIG Invention in a control device,

F i g. 2a shows a circuit arrangement of a known type for a control device that does not operate at a carrier frequency,

F i g. 2b shows the characteristic curve of the circuit arrangement from FIG. 2 a,

F i g. 3 shows a detailed exemplary embodiment for a circuit arrangement according to the invention,

F i g. 4 shows a simplified equivalent circuit diagram of the circuit arrangement from F i g. 3 and

F i g. 5 shows the arrangement of the circuit arrangement in a sequence control device.

F i g. 1 shows a quadrupole 1 which is inserted in the forward circuit of a control device in order to influence the transmission characteristic in such a way that the accuracy conditions and the stability conditions are met at the same time. The quadrupole 1 receives the signal e expressing the control deviation and possibly amplified, and its transfer function is determined in such a way that the desired influence is obtained. The quadrupole 1 is preceded by an amplifier circuit 2 with a low output impedance so that any disruption in the operation of the upstream circuits is avoided. In a corresponding manner, an amplifier 3 with a high input impedance is connected to the output of the quadrupole 1 in order to prevent the downstream circuit from affecting the quadrupole 1.

It is assumed here that the correction takes place by means of a phase delay. The conventional one Phase delay correction circuit for use in control systems whose control deviation signals are not chopped by a carrier frequency is by the quadrupole of F i g. 2a shown. In symbolic notation, the voltage transfer function of this quadrupole can be as follows to be written:

■ = ™ = ^{fl +} 7TT27

- ^{1 + τί} Ρ

~ 1 + τ2ρ

with ρ = jw, where ω is the angular frequency of each harmonic of the system deviation voltage ε . Furthermore applies

= rly rl

^a - rl + rl

b = \ - a.

The attenuation g (p) given by this transfer function is a function of P, ie the frequency of the relevant harmonic, through the asymptotic curve of F i g. 2b shown. Between the circular frequencies 1 / rl and 1 / τ2, the curve asymptotic for damping g (p) is a straight line with a slope of -6db per octave on a logarithmic scale. The effectiveness of the circuit is given by the ratio between the damping at low frequencies and the damping at high frequencies, i.e. t2 / V1.

The aim is to create a quadrupole 1 which acts directly on a signal e with the high carrier frequency / _0, which is amplitude-modulated by the control error voltage f, in such a way that it emits a signal at the carrier frequency / ₀ which is amplitude-modulated by a signal f "which is derived from ε is derived by such a relation that:

where the transfer function F (ρ) is comparable to the transfer function f (p) of the conventional circuit, ie it has the following form:

F (p) = a +

1 + τρ

A quadrupole 1 implemented in this way is shown in FIG. 3 shown. The signal e is fed between the terminal 10 and ground. The output signal S is taken from terminal 11. The quadrupole 1 contains a resistor Rl, which is connected in the series impedance branch between the terminals 10 and 11, and in the transverse impedance branch behind the resistor R 1, a capacitor Γ large capacitance, which is used for direct current decoupling, in series with the primary winding of a transformer Tl it is assumed that the transformer T1 is an ideal transformer. Its windings have a very high inductance and a very small DC resistance with respect to the circuit resistances. The secondary winding of the transformer T 1 has a center tap 12 which is connected to ground via a capacitor C. The ends of this secondary winding are connected to the opposite corner points 13 and 15 of a bridge circuit, which in each of its four branches 13-14,14-15,15-16 and 16-13 contains a resistor Rl and a rectifier element, which through the diode Dl , Dl, D3 and DA is shown. The corner points 14 and 16 of the bridge circuit are connected to the two ends of the secondary winding of a transformer T 2. The center tap 17 of this winding is connected to ground. The primary winding of the transformer Tl is fed between the terminals 18 and 19 with a reference voltage υ . This voltage ν is a pure sinusoidal voltage of frequency / ₀ , which is in phase or out of phase with the carrier frequency of the signal e .

To examine the mode of operation of this arrangement, it is initially assumed that the signal e is modulated with a direct current signal; its amplitude is then constant. For each half cycle of the reference voltage υ , either the diodes Dl,

D 4 or the diodes Dl, D 3 are live, while the other two diodes are blocked at the same time. For example, the diodes Dl and DA carry current when the terminal 16 is at a positive potential with respect to ground, the terminal 14 then being at the opposite negative potential. It is assumed that the voltages fed to terminals 13 and 15 by the transformer T1 are small compared to the amplitude of the voltage υ , that is to say that the amplitude of the signal e itself is small compared to the amplitude of the voltage 1; is what can be easily achieved. The secondary winding of the transformer Tl therefore behaves like a single one of them for each half-wave

Winding halves 12-13 or 12-15, with the terminals 15 and 13 alternately become ineffective. Due to the resulting switchover, which is in phase with the signal induced by the primary winding of the transformer T1 is the Voltage between terminal 13 and point 12 for a given half-wave is the same and of the same Sign like the voltage between terminal 15 and point 12 at the next half-wave. It follows that the current in capacitor C always flows in the same direction, regardless of the direction relevant half-wave. The capacitor C is therefore charged to an average DC voltage.

For reasons of simplification, the case is assumed that the transmission ratio between the primary winding and a secondary winding half of the transformer Π has the value 1. F i g. 4 shows the charging circuit of the capacitor C, where the source is represented by | e | is represented, ie by the rectified signal e, the rectification being positive or negative depending on the phase ν. The direct voltage U ₀ appearing at the terminals of the capacitor C is, apart from the sign determined by the phase of the voltage υ , the mean value of the voltage | e | equal, ie equal to 2 / ^ times the amplitude of the signal e. Accordingly, the DC voltage generated at the terminals of the capacitor C reflects the modulation DC voltage of the signal e in the assumed case, except for the proportionality factor 2 /.- i. The voltage CZ ₀ occurs at point 12, and it is transferred to the primary winding of the transformer Γ1, ie between the clamping part and ground, once from the secondary winding half 12-13 and the other time from the secondary winding half 12-15, these two winding halves at work alternately on each half-wave and, due to their opposing arrangement, generate voltages with opposite signs in the primary winding of the transformer Tl.

The resulting voltage at point 11 is therefore equivalent to the modulation voltage U _{0 taken and again chopped with the frequency / 0.} This square wave voltage obtained at point 11 is the voltage returned by the secondary winding of the transformer T1. An alternating voltage of frequency / ₀ also appears at point 11, which comes directly from the voltage divider supplied by resistor R1 and the primary winding of transformer T1. As soon as the charge on capacitor C has developed, it behaves like a short circuit _{for the current of frequency / 0.} As a result, the load transferred to the primary winding of the transformer T1 has the value R 2, since the forward resistances of the diodes are very small compared to R 2. The voltage divider formed by the resistor R1 and the primary winding of the transformer T1 thus results in a voltage R2 at point 11

of value

e. Finally, the

Terminal 11 output DC voltage obtained by superimposing the square wave voltage with the amplitude 2 U ₀ from peak to peak and the sinusoidal

D 2

tension · E formed. _fi

In the general case, the modulation voltage of the signal e, which expresses the actual system deviation signal ε , is any low-frequency voltage. They can always be equated to a sum of sinusoidal voltages, the frequencies of which are the spectral frequencies of the system deviation signal r . In order to determine the characteristic of the circuit for such a modulation voltage ε , it is sufficient to examine its behavior with a modulation voltage of the form E sin Cf) ₁ 1 , where O _{1 represents} the angular frequency of any harmonic. The voltage e can be written as follows:

e = £ sin W ₁ Jsinojjji = y4 (t) sinc-Joi

A (t) = E sin W ₁ f.

In this case the amplitude of the signal e is not constant, but changes over time with the lower | j

frequency

like the function e

sin o> i rj. As a result, the outputs on the terminals of the
capacitor C appearing voltage U the sinusoidal fluctuations of this amplitude again, but with a certain phase shift due to the time constant τ = C (Rl + R 2) of the in FIG. 4 shown loading circuit. As a result of the time constant τ , the modulation voltage taken from the terminals of the capacitor C is not directly proportional to the modulation voltage of the signal e. The low-frequency voltage U generated at the terminals of capacitor C can be written as follows, except for the sign:

where the function A ' (i) can be derived from the function A (i) according to the following symbolically written equation:

1 + τρ "

with P =

The voltage U, which is associated with the limb

represents the corrected amplitude of the modulation voltage ε _{, appears at the center tap 12 and is again chopped up with the frequency / 0} due to the alternating action of the two secondary winding halves of the transformer Tl, so that at point 11 an essentially rectangular alternating voltage of the frequency / _{0 is} generated, which has a peak-to-peak amplitude 2 U , which is thus variable over time with the frequency / i. This square-wave voltage can also be approximately equated to an amplitude-modulated sinusoidal voltage on the basis of the following consideration, because the phase shifter cells mentioned later seek to make them sinusoidal. If this simplification is assumed, the output voltage finally obtained at terminal 11 for the relevant input voltage e is obviously given by the superposition of two amplitude-modulated sinusoidal voltages of frequency / ₀ . The first of these voltages has the value determined by the voltage divider from the resistor

stood R 1 and the primary winding of the transformer T 1 given amplitude

or

Rl

Rl + Rl

and the second voltage has the instantaneous amplitude transmitted by the secondary winding of the transformer Tl

il · '«·

The resulting instantaneous amplitude can thus be written as follows:

This equation can be written in symbolic notation as follows:

K2 - 2, 1
Rl + Rl π Ι + τρ

Accordingly, the transfer function of the circuit in relation to the control deviation of the Modulation voltage expressing the form

F (p) = a +

1 + τρ '

where the constants α, β and τ are given by the following relationships:

Rl "2

F (p) can also be put in the following form:

F {p) =

1 + τ'ρ

1 + τρ
K = α + β

α + β

The time constants τ and τ 'appearing here determine the frequency interval in which the correction caused by the circuit takes effect. The relationship between the attenuation of the Circuit at low frequencies and the attenuation of the circuit at high frequencies that the Effectiveness of the correction is given by

τ '_ α + β τ α

1 +

2 (Rl + Rl)

The various expressions mentioned above show that the constants α and τ of the circuit can be determined as desired by the choice of the values of the resistors Rl, Rl and the capacitor C. On the other hand, the relationship between the attenuation at low frequencies and the

ίο Attenuation at high frequencies only depends on the ratio R l / R 2. It can therefore be measured independently of the values chosen for the time constants τ and τ '.

Finally, it can be seen that the circuit just described for the modulation voltage of a carrier frequency signal e plays the same role as a conventional direct current circuit, the circuit parameters being able to be changed just as easily as in a conventional circuit.

An example of the arrangement of the circuit of FIG. 3 in the forward circuit of a slave control device is in Fig. 5 shown. The in F i g. 1 illustrated circuits 2 and 3 are here each by a Transistor amplifier formed in a collector circuit.

This circuit has the advantage of great stability over time and temperature. The carrier frequency signal modulated with the system deviation signal and emitted by the simulation element 4 of the follow-up control device is applied to the base of the transistor 20 after amplification in an amplifier 5. The purpose of the amplifier 5 is to give the carrier frequency signal a sufficiently high level so that the interference voltages caused by the possible irregularities of the quadrupole 1 are negligibly small compared to this carrier frequency signal. In particular, the accuracy requirements with regard to the values and the equality of the resistors R1 are reduced if a sufficiently large gain factor is provided for the amplifier 5. The transistor 20 is fed by a direct voltage source 21, and it is loaded with a resistor 22, the value of which is dimensioned for the correct adaptation of the input impedance of the amplifier 2. In general, the resistor 22 has a very much smaller value than the resistor R 1, so that the quadrupole 1 has no influence on the effect of the stage 2. The four-pole terminal 1 described above is connected between terminals 10 and 11. The output signal of this quadrupole is fed to the base of the transistor 30, which is fed by the direct voltage source 31 and is loaded with the resistor 32. The value of this resistor 32 is dimensioned such that the input impedance of stage 3 is so great that this stage does not interfere with the operation of quadrupole 1. Finally, the output signal of stage 3 is transmitted to the subsequent circuits of the forward circuit of the slave control device via a phase shifter cell 6. This cell is used when the carrier frequency signal is to control a two-phase motor. It causes a phase shift of the carrier frequency signal by π / 2, so that the control voltage of the. The motor is phase-shifted by 90 ° with respect to the reference voltage with the frequency / o. This phase shifter cell also has the property that it converts the substantially rectangular signals supplied by the terminal 11 into substantially sinusoidal signals.

309 533/174

1 sheet of drawings

Claims (5)

563,649 claims: 1.Circuit arrangement for influencing the transmission characteristic in the forward or feedback loop of control devices with a carrier frequency, in which the signal is transmitted in the form of an amplitude modulation of a carrier frequency, with a quadrupole with ohmic resistors and capacitors, which are arranged in at least one shunt impedance branch and are dimensioned so, that the envelope of the carrier frequency signal is given a predetermined amplitude and / or phase frequency response and in the four-pole controlled by the reference signal non-linear switching elements are included in the bridge circuit, characterized in that the bridge circuit in each branch a rectifier element (Dl to D 4) in series with contains a resistor (Rl) and that its one diagonal is fed by a reference voltage and the other diagonal is fed by a transformer (Tl) arranged in the shunt impedance circuit, to whose center tap (12) a grounded capacitor (C) is connected . 2. Circuit arrangement according to claim 1, characterized in that the quadrupole (1) in the series branch contains an ohmic resistor (Rl) which forms a voltage divider with the primary winding of the transformer (Tl) and that the transformer (Γ1) is designed so that the resistance resulting in the primary winding is equal to the resistance (R2) of one branch of the bridge circuit. 3. Circuit arrangement according to claim 2, characterized in that the resistor (R2) in each branch of the bridge circuit is large compared to the direct current resistance of the windings of the transformer (Tl). 4. Circuit arrangement according to one of claims 1 to 3, characterized in that the Four-pole (1) isolators (2, 3) with great temporal stability and temperature stability upstream and downstream are. 5. Circuit arrangement according to claim 4, characterized in that each of the four-pole (1) Upstream and downstream isolating stage (2, 3) through a transistor direct current amplifier in a collector circuit is formed.