DE1549439A1 - Data processing system - Google Patents

Description

Dr.-lng. Or. Jur. Volkmar Tet; «Ir / Λ # *» Λ

Attorney and patent attorney. I 5 H 9 H 3 9

Munich 71, Van-Sogh-Stt. 3

Ruf UOB11) 70 ββ OS Q

General Precision, Inc, Glendale / California

Data processing system

The invention relates to improvements in a data processing system.

S »sit calculating machine saliva · were developed that can store large amounts of data, systems have been developed the 'selected data parts on the basis of controlled • ter search for or restore requests from a user. Some systems have been suggested where stored data (hereinafter referred to as "records" ~ records) can be retrieved or restored by the content of the records in relation to a requested calibration content is processed * at In other systems, records are retrieved or restored, by making stored characters recordable istika are searched for, which provide reference values for the locations in the recording memory that determine certain Contain combinations of characters which form the basis of the user's request. The invention takes a look Primarily on this latter system. Bs acts This is a data processing system in which the investigation is of Aufzelchmmgeplätze on the basis of a

! BATH ORIGINAL

109884/0236

the same occurs between stored characters and characters that form the user's request. May be because the number dor stored records may be very large, and since the total number of possible characters in connection with a single recording also considerable, _e tem srguben n is relatively complicated and costly devices with undesirable in dan known Sy ^; large data processing space., The main fus-sachi: for this Ii in the fact that every character of each record must be compared with each of the characters forming the query before the record, which is alia item number, is not determined.

The invention is therefore based on the object of creating a new data processing system that will work through A particularly fast data search and processing is characterized by a relatively simple system for recording and evaluation of records, which in

is able to store a large number of recordings, where the position of each record can be found as a puncture of characters which describe the record and are assigned to it. The invention is also intended to create a system for storing and evaluating recordings which is cheaper than the known designs and has a higher operating speed when carrying out comparable operations. Another object of the invention is to develop a system in which a

SAD 109884/0236

A multitude of recordings simultaneously with a multitude of

according to the number of different query parameters Comparison criteria are compared so that the time it takes to find the location of each is reduced Record that meets the various criteria is required.

To achieve this and other objects, a memory is provided according to the invention, in which aiii 'one A large number of memory tracks records Ging are stored, for example a disk memory (which is also the is based on the following description). Feeding one or more recordings into each track takes place by means of a magnetic write head that is assigned to the track and stores bits one after the other, on which the signs of each record exist. The Tracks are also assigned read heads, one after the other evaluate the bits stored in the tracks. An associated storage system is also provided, since at the same time parallel the dita tones, those of the ones

I «

Reading bits of the memory chip are supplied to the bits a group of characters In a multitude of Schills, registers are compared according to one or more search criteria. The bit in each stream or from each track will be one after the other, bit by bit, with the bits of each

Characters; compared in the SchlOsseXregittern. During each Bit comparison intervals a bit each of the In under «

109884/0236 bad original

recordings stored in the form of traces of memory compared with one bit of each of the many characters, allowing a simultaneous review of a plurality of records with a variety of query cells.

Αία end of the comparison of a fixed number of Blfea, which form a character will be the result * of the comparison between the zoiohun mlfc taken one after the other from the track one or more characters in the registers determined and stored as a binary digit in the associated memory. At the end every recorded · record will have its characters with a particular combination of query characters compared. Falls If the comparison is positive, a specific signal is stored at the end of the recording in question. If then the entire memory is queried, the rewards marked with such signals are removed and correspondingly further process for the purpose desired by the user after these records are those that contain the selected combination of query characters.

An embodiment of the invention is shown in the drawing illustrated in more detail. It «own

Fig.l a simplified block diagram of the invention » according to data processing oysteaee;

Fig. 2-5 diagrams to explain the comparison

a variety of characters according to a variety of criteria;

109884/0236 "^ ° ^{R 'G' NAL}

Pig. 6 a block diagram of a logic circuit for carrying out the comparison a variety of characters according to a variety of criteria;

Pig. 7 and 8 tables to explain the different Working phases of the logic circuit of Fig. 6.

Pig.I shows a simplified scheme for explanation the mode of operation of the invention. With dom reference oak is a disk storage system, which is referred to below for short "Disk" is called. This disc contains a number of tracks on which the records to be stored take place. The records consist of characters of fixed length. The signs of every record like their contents and are therefore also referred to below as descriptive symbols. According to the invention, these are descriptive Characters used to locate and locate the address of the recording. The number of descriptive Characters can vary from recording to recording. However, each recording ends with the same terminator.

The disk 11 is coupled to an associated search processor 15, which receives the parallel bit streams from the disk tracks and carries out a simultaneous search for a large number of records with many characters. The system 15 contains a logic level D ₁ for each track of the disc 11. The ones supplied by the disc

Bit streams are parallel, one bit at the same time, in the

109884/0236

BATH ORIGINAL

logical levels D. read. If one assumes that the records stored in the disk 11 are a final character by a combination of bio au n-1 characters, ie a total of alcc by η characters, oharakterJoicrt, oo contains the "ugonous system 15 η key, the In PIg.1 with the reference seicheη Xl his Kn b & Keichnet are. The key registers Kl to KCn-1) _3, which are closed shift registers at their ends, are used to hold the η characters or descriptive elements, of which the user's question-character combination can contain any combination. The register Kn contains the recording key. A separate key register is provided for each of the different characters. The bit length of each key register is identical to the bit length of a character in the disc 11

An associated memory word W _{1 is} connected to each logic level D _1. W ₁ consists of two character fields T and T ¹ . Perner contains the word W ₁ a tail field f with one bit. The two character fields contain each η flower, so that the entire length of the word W _{1 is} equal to 1 2n + 1. The bits from the Schiassel registers are compared bit for bit with the bits In the logic levels D ₁ ; the comparison results are stored in the bits of the T field. These comparisons are all made for any number of records and , any number of keys, simultaneously. The number of " records" corresponds to the number of tracks on disk 11; the number of keys is linked to the number of keys.

10988A / 023S bad original

At the end of the comparison of a 3 complete character, the content or binary status of the 3 bits T * indicates the status of the comparison between the character in the key register K. and your special character, that of the? the track assigned to the word W- was read. At the end of the comparison of each character, the status of bit T _{1 is transferred} to bit T ¹ ^, which is bit T ₃ , where the search status of characters ru characters is monitored. After the status transmission, the bit T is set to a desired state so that it can then respond when comparing the character in the register K ₁ with a character subsequently supplied by the logic level D _1.

The state of field T ¹ . is queried by comparison with the binary states of the bits In of a multibit interrogator register 20, which stores the correspondence of characters sought. The register 20, so that the T'j field can be coupled via a template regulator 22, is connected with the T ¹ j field to a control circuit 60, the function of which, printed out, consists in the content of the register 20 or a part of the sas registers with the T '^ field or a corresponding part of each of the memory words eu and to provide an output signal if the T'j field corresponds to a spoofword with the content of the Afofrageregiaters.

BAD 0R! 0 < K '.: ■ "· [

109884/0238

At the end of a recording that the positive comparison of the final character circulating in the key register Kn and a final character supplied by the logic level D .., the bit η in the character field T ^ is brought into a predetermined state. This Zuctand is transferred to the n-Bifc in the field T ^, which is queried in order to determine whether the query, ie the special combination of characters in register 20, was present in the relevant record. If this was the case, then the bit f in word W is brought into a special state, for example to a binary ¹¹ I ", which causes the storage of a preselected end signal or symbol at the end of the recording sought the whole T '- field of the relevant word is reset to ^M 0 ^M , so that the character-fttr-character comparison of a subsequent evaluation record is accumulated. If, however, the character combination in register 20 is not found in field T * £ If the state of the field T '^ old does not match the state of the register 20, the f-bit remains in the state "0" and the T ^ -FeId is reset. After each transmission of the states of the T ₁ -FeId- The last-mentioned field is queried until the T ¹ ^ field. However, only if a final character is determined, i.e. if the η bit in field T ^{1 is} in a certain state, the T ', field is reset and the State of the f-bit brought to "i" or "0", depending on whether or not the particular combination of characters is present in the recorded recording.

SAD ORIGINAL '

109884/0236

154943B

Aai Pig ,, 2 'is used for a better explanation of the system in accordance with the invention. Ea be assumed. that the recordings in the disk 11 can be dei'Jabaren by one or more descriptive characters D ^, D _ß , D _ß and D _D , the final sign being given by the character D. Inventory stores the keys ^ lrs ^ Lstev Xl to K ^ 3omit dykes

i>. to D ₀₃ while the character D, in the key register Kn AD ^J η

is stored. It is also assumed that the disk three Seheib ":" contains spu * en 21, 22 and 23, of which the

Pi j Pa or? 3 parallel, character for character, can be sleaen, although practically every "eichen air. A" rim of bits will read. In FIG P2 recording of two tieschr ^ ibcnden characters while recording P3 vitei- bu3ßhro &> € ligand D logo contains _n-D. Since three

A D

Traces, present -are and dlo maxissal number of characters k

-If the final character D comes, it contains

3pe.ieh99P dr ^ i Spöichervorte Wl, W2 and ϊ [3, consist of 2je5 * J BlSs, »I.h» 11 Blta. In every word

<3.i "" in both digit fields T and T * five bits each; grain «* i'ei» x * er iifjeh an additional bit f.

before a »search process the T-Bite Speiehori / et't'ö to the binary state ^w i ^>? brought,

All T "-bit as well as the f- bit are led into the binary state" O ⁷⁷ (. Then, during each character comparison interval a daa of "Each track, characters supplied are compared with the characters in all key registers

BATH ORIGINAL

103884/0238

LO -

Such a comparison *; ino Obere ins tlminung established, so remains the relevant T-BIt, that of the relevant key register assigned 1st., in the binary state "1", while all other T bits are brought to the "O" state. At the end of a character comparison interval, the states of the Bit3 in the T-PeId follows the states of the bits Ira T 'field linked to the following logiseiiev oxe sieving:

If the J ¹ bit or the T ^r bit is a binary "1", the T 'bit ίύ is brought to the binary state "1". Only if the bits are in both fields? ¹ * are a binary "0", the bit in the field T ^f remains a binary "0".

It is suggested that before the time t ^ all T-Eits are in the state "?." and all T - * ^{bits are in the binary state rt} 0 ". It is also assumed that during a character comparison interval3 t ^ the characters Dg, D, Oq of the records P1, P2, w.? 3 are displayed at the same time and with the characters in the various Schiasü <* lregisfcern vergllohä-n Since D _ß de "word Pl nit Dg in SöhlGsselregiater k2 Übereinetiiaait," remains a end "of Zeltlntorvalles t ^ ift the bit b2.. T field (ie the word Wl) in the biological state "i"

as a result of the "comparison of D ^ from P2 ait D, in the key register: the Kl dao bit bl in the field T (T ^ ₁ de" words "S2) in the bi & Iren 'state ^N l ⁿ " Eibengo remains auoh T ^ in the word W3 im binary state ¹¹ I ", aa dor comparison swisohen D _D of ? 5 D ^? .ei Regioter K ^? 5 positive fails. All endors Bitn iw

-I-

Character field T are brought to the binary state ¹¹ O '", since a comparison between the different characters in the opposite direction does not result in a match here _e

The states of the various bits in the character field T are then transferred to the bits in the character field Y ^f . According to the above-mentioned logical equation ^? 'taP * ^T ' bi ^{lin <?} " ^Tv > * l ^ ^er for to ^W1 » ^ ^{2 Ußd W} 3 tn brought the bin & ron status "1", while all other bits in the PeId T * remain in the binary «state" O ",

For the example shown in! 'ig-S it is assumed that the search criterion consists of determining records which _{contain the descriptive characters D., D ß} and D _ß , while the precedence or failure of D ’is not essential . This search criterion is entered into the Abirageregister 20 and the Maakenregister 22. In register 22, the bits corresponding to bits bl, b2, bU and bn In T ¹ α are set to a binary "l ⁿ , while" the bit corresponding to bit b3 is brought to the state "O ¹¹ , in order to assume that the The presence or absence of the descriptive character D _c has a control function. Xtn query register 20, the bits corresponding to T * bi, ϊ ^ 2, T'bif and T ^f bn are in the "1" state, while the bit corresponding to T'b3 in can be one of both states ♦ (which is indicated in the drawing by the lack of "0" or ⁿ i ⁿ .

BATH ORIGINAL

109884/023 «

After the states of the T bits have been transferred to the T * bits, the content of the query register 20 is compared to the T * fields of all words W1, W2 and W3 via the register old in the same way as is done with known memories. As long as the T'bn bit of one of the words is not in the "1" state, which means that <Ss9 end of recording P1, P2 bBWx P3 has not yet been reached, the '!' »Fields of all words remain unchanged _s and the system is switched so that ee di "following descriptive character of the three records compares how by way of FIQ. 3 will be explained further <

Before D 1, D 1 and D g of records P1, P2 and P3 are compared, the states of the T ¹ fields of V / 1, VJ2 and W3 are divided as shown in FIG dftr three words are rolled back to the binary state "1". Then be in dej? Time span t ₂ which the describing characters D ^ ₁ D _ß and D ^ compared with the characters in the Scblüoselregiatern Kl to Kn. As a result theeea Vergl & iohia remain in the end of. t? the bit * TbI, Tb2 and Tb3 xov WI, W2 bsVf "W ^ in state * 1" while all other Ϊ-Ditt? are reset to ¹ O. ⁴ '. Bie states of the T-Mts be tfarm d "n Status of the T'-bits after the acquired gloicion on Bull read, so that after transmission (See statuses "dl © bits T'bl unr! T'b2 and T'b2 of WI., I" and W3 ftuf the status "1 "are set, while Ψ. » fc2, t'bi and T'bi of Wl, \\ 2 and WJ remain in state "1", Xn <\ en ₅ ; _{e is} already »interval t ^ (see PIg. 2) It was noted that all other T'-Blts remain in state "0". The βία were initially set.

Then do T bits are brought for the next drawing Enver * is again in the state "1", and ea are the ¹ S * bits Durah comparison old the contents of the query register SO queried · Since jadoch at the end of the period t ₂ no T ¹ Un-Bi * 1 »State" 1 "is located (which means that the high does not reach the end of a series of three records;) the" T "fields remain unchanged and the search process is continued.

Dia föish choosing, abßpi & landing processes are in Pig. ¹ !

ver & as & h & hlieht. Ee become D _n , IX ₁ . and D. won Pl, P2 bew. P3

υ η α

Bit compared to the g © ieh @ n in doo Schlftaseireglstera. D in P2 beöeutat, fee end of the recording Pu. The "result of the comparison remains Tb k _t Tb", and TbI of Wi ₁ ¥ 2 and W3 in state "i", while all other bits change to state ^M 0 read the T 'bits to zero according to the whole logic equation, so

result as 3λ Φί% Λ assumed state »* The, reset to the state" 1 ".

Intestinal ^nine field is interviewed dun T. Since the T'bn bit of "2 e.ino" Γ ^! Is, "as the end of the on reward on the"? Track Z2

the contents of the T 'field of W2 Alt dea the contents of Abirasörogistera 20 compared. However, since T'b ^ i of W2 1 is "Suatariv * ' ¹ C, which means that the record P2 % 9 does not contain" f Ettichim Dp, bo remains the f-bit of VH 1st. Zastfina ⁿ O ⁿ and the whole T 'field of W2 is set to "O"

This makes the word W2 for the comparison * 109Ö84 / 0236 bad original

a later recording on the track Z2, which is assigned to the word W2, prepared. The resetting of the T * field of W2 to the state ^w 0 "is illustrated in Pig.5. The T * fields of W1 and W3, on the other hand, remain unchanged, since the final characters for recordings P1 and P3 have not yet been determined.

During the following character comparison interval as t ^ (see FIG. 5), the final characters D of Pl and D "of P3 are compared with the characters in Kl to K ¹ * and Kn. It is assumed that no signal is supplied to * W2 from track Z2. As a result, at the end of t ^ only Tbn of Wl and Tb3 of W3 remain in the "1" state, while all other T bits are set to "O" * After the transmission of the states "1" of Tbn of Wl and Tb3 of W3 on the corresponding bits Ira T'-Paid, these bits have the states according to FIG. 5 · & a T 'field of W2, all ¹ bits have the state "O". Then the T-PeId is asked «Since T'bn of Wi is in the state ^R l", which means the end of the recording of Pl, and since the bits 7 ¹ Ol, T ^l b2 and T ^f h4 of Wl are the bits 1 »register 20, a * l ⁿ la f bit of Wl is stored, which means that the record Pi meets the comparison criteria, ie contains the descriptive characters D _A , Dg and Dp. The setting of the f-Blt of Wl In the "1" state, "in Sihiufeejnnbol" can be used to write in the recording P1 by means of the "in" write head, so that in a subsequent cycle for restoring the recording, all * recordings with such slack symbols can be restored.

109884 / Q23S ⁸ AO original

Also in the Ί? · ~ Τ'ν1ό of W3 are located: the bits T ¹ Ol, *; ^is b2 and T * b'J in the state "1" and then correspond to the suoiikrlterien. Since no "1" is stored for the f-bit of W3, the T ^f bn-Blt of U3 is in the state ^{! I} O ^M _S w3 £. means daft the iintsrauchurig the recording is not yet abgescfrloaseu * Only when! ', D _n during dos time intervals compared by P3, one ßtellt the end 6 Aufseichmmg of P3 feet, no that dae f-bit felngastellfc of W3 and miößhl- There was a closing symbol in the record: F5 is saved, which means that the record also fulfills the comparison criteria. φ * aei h-srvorgchobea, that PJ also fulfills the search criteria _a although-ca daa bsBclireihend «contains characters D ^, since the" 0 ⁿ Sa Bit t> 2 of the mask manager 22 indicates that the content τon? »b> has no meaning Let "Would it have been, on the other hand, the content of determining records that do not contain D" (what can be reproduced & Λ * D _ "" Dj ₁ -D _c .Dq. i wot "i. the UMD function and - that Koni-ρ eaent itu-stellfc) so would have been gospajehert in b3 de * »Reginter 20,22 cine ^Π Ο" b * »,« ine "I". In this case ai.ü i'chlandc t'b ' srsi inst immune from b3 iaa P.egietpre 20 and T ^f b: 3 v * v. W5 anzöigen ^ tf? iß P? not dan search criteria met; Ln öiii ^^ jii Failu vfürde so & tt no entopi'cchcndes synbol in P3

Bai. Be se br ai exercise of JE? Ig.2 hiß 5 was suigenotiraeu. a complete character of each track is compared with sineia vol characters of each register Ki-K ² J and Kn-. In Premium, however, each character contains a number of Eif.8 _f

V »9 H 8 ü /" 0 ** ->, fi

BATH

which are taken in serial form from Spslcherseheibs 11. The comparison is then not made character by character, but bit by bit. The above-mentioned time span for a character _% comparison accordingly contains y intervals for one bit comparison each, where y is the fixed number of bits per character. .

Before the memory extracted character werdon compared with the characters in the Resiefcwrn an "r bit-by-bit basis, the whole ϊ-PELD of all words in the state ⁿ l" is placed. Dann'wird during each one bit Bitvergleiehsintervalles each * track is compared with a bit of each character in the registers and this ^{controls the state of the associated Tl?} eld-Eit 3. Only at the end of the y-leaf comparison interval, i.e. at the end of the comparison of a complete character, the each T-Bifcs with the state of ontsprechenden T ¹ bits as uuvor described to zero read. the various registers ssuiiQordnet a logic circuit, ho ön & am Bnde each <! it signs comparing the state of each T-Bita the result of the comparison between the two signs that have been frozen against each other, that is, the signs of the spore therapy and of the associated register

0 _ä of P2 (see Fig. 2) and D ₄ in Kl Hultlblt- i _r wob «! Their bits are compared in series. "The Suatanä * l ⁿ of TbI ft" end of t ^ "then divides the comparison of ganaon mul ^ lbit characters and not just the comparison of bits thereof.

6 shows a block diagram of an exemplary embodiment of a circuit for controlling the states of the T-Bifcs as a function of the comparison between the bits supplied in parallel by the memory 11 and the bits for drawing in the key registers. In Fig. 6 it is assumed that the T-field parts of the control rooms W1, V / 2 and W3 contain plated magnetic wires which can store binary states as punctures of the directions of the circumferential flow at various points along their plated magnetic surface. Deraroigs wires and their ability to store binary signals are well known in the art.

Each Spöleher word (VJi etc.) can consist of a non-magnetic wire 25, for example copper, which is plated with a thin magnetic film 26. During the placement process, a current is flowed through the wire, "o & aß la dom PlIm 26 a" light "magnetization" * axis is generated in Uemf & Rgsriohtung. Each of the plated "resting" is vaa of a number of digit lines crossed, wherein the Kreuzungsefcellön represent the positions of bits. In Fig, 6 MXdefc examples, the intersection of Ziffemleitungeii Oi to CH and Cn with Wi the bits TbI to Tb4 and Tbn of Wi. Each bit is controlled to store a binary signal as a function of the direction of the circumferential flow

of currents in the 2 digit line (from the Speloequelle D _c pl to DDn) and a current polarity in the wire 25, which is from a wordspelse-

to which the wire 25 is connected.

BATH ORIGINAL

109934/023 6

The current of the digit operating source is unipolar while the current of the power source is bipolar.

The Kort supply source has an input "1" and an input "0 ^tf . If the input" 1 "is actuated, the word supply source supplies a current of a first polarity, if the input" 0 "is actuated a current of the opposite polarity ;, a" 1 " is stored in one of the bits as shown in TQI of Wl when-in flows Cl current and the current has a first polarity in the wire 25th a ¹¹ O "is stored on the other hand, if at the same time occurring current in Eq the current in the wire 25 has the second polarity. In order to bring all the bits in the T-PeId to the "1" state, as required before the start of the character comparison, 1st, only the digit supply sources and the "1" inputs of all word memory sources need to be actuated.

According to the invention, the output of each track, for example Z2, is connected to the word feed source WD2, which is connected to the associated storage word W2 via a logic level L2 is; assigned to the relevant register aiwi. So , for example, S1 represents the logical level that the register Kl with the Zlfferaspeisequelle DDl connects "dl * in turn with the. Tbl-Bite d »r different spinner words coupled 1st. The logic levels L and S 3in <5 also have a control and program sequence unit 30

109884/0236

connected, which the different circles of L and S with Control signals during a multiphase program sequence provided·.

The multi-phase program sequence is illustrated in table form in Pig. 7. At the beginning of each bit comparison inter- "•» everything, during phase I. The unit 30 closes a flip-flop 3 ^ in the logic stage 12, so that the output, - •? .T5jr with an input of each of the AND gates 35 and 36 connected did, not actuated. In the following, the non-actuated and actuated switching states are identified by "0" and "1" binary signals, teaching phase II is then the 3chlUBselregS.3t.er Ki by one of the unit 30 g-eliefe.vth sling pulse so that the bit content advances by one bit and a new bit is stored in a flip-flop 40 £ «* £ · logic stage Si. The two outputs T and F of the flip-Fl .?. op β 40 ßlnd "It ever an" input 3 ITSD-Toi-u kl bsm 4 connected Is I therefore "&ΐ" β "3," In Au8fi; angsbit ä * 3 Heßist; © »Kl _one that is at the entrance of the flip-flop " i '* i _t as in FIG one "0 ^M is fed.

The flip-flop Jk is »it the output of the memory track Z2. ? is it is .ungeordnet connected via an amplifier 45, * 1cr "3QN utiirt: ion <* lar in there, the flip-Plop ltin a" l ⁿ eJnzi'nte .- 3 ^ who · η carrion Ausgangssi & ns. .l the track is a "1" and IUi ei.n « ¹ · ⁿ D ^{! l} , the output signal of the track is a" 0 "1st, D.1 <r Eiriai-ellurtf; ö.« p Plip-FJopa 3 ^f i air. Function of the Ausfra.nes.T-

BADORJGINAL

15A9A39

Signal of the track takes place during phase II. The logical »unit S1 contains the Plip-Plops 46 and 47. The outputs T and P of 46 are connected to an input of the AND gates 42 and, respectively , while the T and F Outputs of 47 are connected to an input of the UIJD gates 4i and 44, respectively. For a comparison crteriura, the equality, i.e. if the bits of the track and the key register :! sturgeon?; Ki are compared to determine whether they are identical slnd _s vrerden üie flip-flop 46

and 47 are set so that they o a "0" bsw. Store an "I * ¹ , so that the F-output of 46 and the T-output of 47 are activated VI is actuated. The outputs of the gates 4i ble 44 are connected to the inputs elnos {»ER gate 48, the output of which activates the digit keys D, Di when one of the inputs receives a signal.

As calibrated from FIGS. 6 and 7, during each of the phases IXIι and VI a B ^ activity El signal is fed to another input of the AND torus 35, so that when both inputs are activated, the AND- Gate 35 receives a signal at the input "1" of the VJortöpoiserjutll «WD2, which causes a current in the wire 25 and. If it writes "1" in one of the bits d © 3 words MZ , if the digit line of the B3ts is globally current * In the same way, during the phases IV and VII .sin E?: Jn * .i & ungs-S? .an input d «J3 AND torea 36 'in% i :: i' ^{ . \ hvt, while wätoond the phase V titxa flip-flop 34 from the unit 30 receives a complementary signal.

109884/0236

If slcn the flip-flops * l6 and k7 are in the state "0 ^M and" 1 ", in which they have been set for an equal comparison, no current is present in wire 25 and in digit line Cl simultaneously during any of the phases; as long as the two compared bits of track Z2 and the key register Ki are identical. Each Tbl bit therefore remains in the binary state "1". At the end of the comparison of a MultibIt character, each Tbl bit remains in the state "i ^IF (i®v dans is transmitted to dae sntsprechonde T ¹ bit If, however, no match ,, so performs the Ziffernstromque lie current w & nn ^{dor;. ι} 0 "input of the word supply source operated vird, so that the corresponding Tbl- Bit is brought into the binary code "0". If one assumes, for example, that the bit of track Z2 is a "1" and the bit of the register Kl is a "0", then during phase IV the "O" -Entrance • 3 word feeders Λ1, Ό · 2 actuated, while the gate h3 is open and over he presses the dead 48 the number tape source "D" D1. As a result, a ^B 0 ^{w is} stored in TbI of W2 * The T bit remains in the state ^w 0 ^Sf , even if the following bits correspond to one another. Is selected from represent track 12 auagewsrtets bit is a "O ¹ and as" bit of Kl a "l ^tt, oo occurs during Phaae VII equilateral Stroa to, D & R bit TbI from ¥ 2 in don state" O "brings.

In the example, Flg. 6 it is assumed that the "recording PÜ (Pig. 2) character for character" and bit for bit out of the track ZZ ;! will. The two first Zaiülmn D * and D _ß contain bit 10. *., 01 bs; w. OO ... Oi, read by right

BATH ORIGINAL

109 ** 4/0236

* ■

to the left. The character D _A is illustrated in the register K1. After the bit-by-bit comparison of the character D. the bit TbI remains in the "1" state. However, if the last bit ("ine * 0") of the character D _ß from the track Z2 is compared with the most plumb bit of D. in the register K!, A lack of agreement is found, so that the bit TbI changes to the state " 0 "is brought.

The logic circuit shown in FIG. 6 is not limited to the control of the T bits with a bit-by-bit comparison of the characters for equality - Characters wit dom multibit characters in each key register on the basis of different verifiability criteria are compared ο VJenn. the characters Multlbit ~ Zanlen contain, both.Flip-Flopa 46 and 47 are set to a binary "1", the T-bit associated with the relevant logic levels L and S remains in the binary state "1" as long as the character or the number from the memory is equal to or greater than the character or number Im Schlüsaelröglster 1st; the comparison is carried out bit by bit Baals and begins with the bit of the smallest significance. On the other Seifco gate by setting flip-Fiops remains 46,47 to the binary state "0" the T bit in the binary state "1" as long as the number of the memory register let equal to or less than the number of entaprecihönden SchliJ & sö!. Will the flip-plops

109884/0236

-23-. ι vt ν? w

46 and 47 are set to the blue state "1" and "O", respectively, 3Q the T-BIt remains in the binary state "1" regardless of the comparison between two multibit numbers compared with one another. FIG. 8 shows a simple table in which the binary settings of the flip-flops 46 and 47 are indicated for the various pre-comparison criteria between the characters or numbers taken from the memory and the characters or numbers contained in the key register. In FIG. 8, the symbol # means insignificant comparison criteria, the T-EIt remaining in the "1" state, regardless of the numerical ratio between two compared multi-bit

Since each character is at the same time as the character each the 3chlfiSRföi, i * eei3t. «ir is compared bit by bit and there the FIip-Flopo 46 and 4? in every logical level S. subordinate information can take a single character from memory also compare with different signs according to different comparison criteria or examination methods Bs can also contain a multitude of characters from memory in parallel with the characters in the registers according to different Verglöichkrlterien has been compared to what an essential one Reducing the time it allows for comparison the content of a spoke ?? with many characters with one Large number of characters according to different comparison criteria {for example, equality, equal to or greater than, equal to

109884/0236 bad ofuG'MAL

or smaller than usv ;.) is required.

In summary, the system according to the invention can be characterized in that it contains a large number of multi-bit memory words, the bits of each word ^{being subdivided into T and T f} fields and each word being assigned a different track of a memory from which the characters n & oheinanäer B3t for bit are denominated, while each bit in the word is assigned to the character content of a different Rögistei'ß. A logic circuit connects each track with each word and each register with its BUgeoröneton bits in the various memory wcpten. The logic circuit can be set so that a character in each register can be compared with each character taken from the memory according to one of many comparison criteria.

At the > inda of each character comparison interval, the results of the comparison of each character from the memory with all characters of the register are stored in the form of the states of the T bits of the relevant memory word. These states are then transferred to the T 'bits of the memory word a, where the comparison results are accumulated from each <m calibration comparison interval to the next.

Is a complete record, consisting of a number of characters, taken from the memory, εο the states of the T '- ^ bits with the states An of an interrogation register compared, tua to determine whether the record

10988/0236 ' ^BAD original

1549435

contains a certain combination of characters identified by the ■ search criterion. If this is the case, a corresponding signal is stored at a specific point in the memory containing the relevant recording. At the end of the examination of all memory recordings, those recordings which contain such signals, ie which contain the character combination sought, are restored.

The T field of every word, for example from W2, is used to display the end of every character comparison interval the result of the comparison between one character from the memory and the one of its characters in a variety of Sehlüsaelregisfcern, while the associated! "Field of the Word is used to accumulate the results dßv slni && lnen comparisons from one character comparison interval sum to the next su. Only when the final seichen Dn is detected _9, which indicates that a complete record has been taken from the memory, the content of the T 'field is included compared to the content of the query register 20 and thereby almost ascertained whether the extracted Aufselchnung.die particularly character combination contains that of the investigation

The comparison of the content of the query register 20 the? 'fields are made in a variety of words same way as with an assigned or content *

Storage system in which a variety of im

BATH ORIGINAL 109884/0236

Memory stored words are compared in parallel with a single address word. In general, in such a system, each of the words in memory that match the particular address word is identified and provides an output signal. The evaluation technology with such content-adaptable memories and the circuits used for this are known and therefore do not need to be explained individually. For explanation, however, the block denoted by the designation 60 in FIG. 1 represents such content adjustable control circuit which is required to transfer the content of the T ¹ idea of each word with the content of the query register 20 compare the mask register 2U.

In the same way, the currently known techniques for signal transmission can be used to transmit the content of the T bits into the associated T bits. For example, if a memory with plated wires is used, the T bits of the word W2 can be converted into the T ^f bits of the same word through the. Unit 30 (FIG. 6) has been transmitted, supplies a number of control signals during a multi-phase sequence, during which the status of each Tr-Bita dos word W2 is read out one after the other and stored in the corresponding T'-bit. The bit TbI of W2 can be transmitted, for example, by adding the digits ^

speiaeiqualle D.D 1 is actuated and a current to the Line C1 supplies, se da &, the status of the bit TbI of W2 * on word line 2? » feetgeetellt and «to capture amplifier

45 is performed. Depending on whether TbI is a * 1 "or a" 0 ", the flip-flop 34 is either activated or not activated. Then a signal ^{E1 is fed to the AND gate 3 1} *, so that either the"! " Input or the "O" input of the word supply source WD2 is actuated, which results in either a "1" current or a "0" current on the word line 25. This current can coincide with a current from a digit supply source (not shown) cause the storage of a "1" or a "0" in the bit T ^f bl d «3 word W2. Since the line Cl couples the bits TbI of all words: Wl, W2 and W3, all bl bits can be read out at the same time and in ^{the corresponding bits are transmitted in the T T} field. Then the bits Tb2, Tb3 etc. can be read out one after the other from 6e & T-PeId and transmitted into the corresponding bits in the T 'field.

The above description of the transfer of the content of the T field into the T 'field is just one example which is particularly suitable when using a memory array with plated wires. The memory words can, however also contain other types of storage elements, so that different transmission techniques are used accordingly can.

A new data processing «β jr» tea was thus described, in which a multitude of records

, is evaluated early from a large number of memory tracks, wobol the records equilateral nil »a multitude of

BATH ORIGINAL

Characters are compared according to any criteria in order to determine which records contain a certain combination of characters, which forms the subject of the query. If the characters that make up each record contain multibit digits, each digit can be compared with each of a large number of multibit digits in the Schlttsaelregister. The comparison between the evaluated digit and each of the digits in the key register can be carried out in accordance with different comparison criteria, e.g. equality, equal to or greater than, equal to or less than, etc. In this way, the time is reduced,

üle to determine the content of the various recordings and only marking the selected records is required.

Claims (1)

Claims 1.) Dafcenververarbeitungsy3tem with a memory in which at least one multi-bit character is stored, which is evaluated bit by bit, furthermore with a system for comparing the character with each of η characters and for displaying the comparison result, characterized in that η memory elements each with two binary states are provided, furthermore η shift registers, which contain one of the η characters with which the characters read from the memory are compared, furthermore devices that connect the memory elements with the shift registers and the memory from which the sign is read out sequentially coupling and the logical elements include means responsive to each bit of the extracted memory character and each corresponding bit of the character contained in the one a registers and thereby control the states of the η memory elements, so that at the end of the comparison of the character taken from the memory, the binary state of each memory element mentes daa shows the result of the comparison between the character extracted from the memory and a character in an associated register. BATH 109084/0236 2.) 3system according to claim 1, characterized in that the memory contains a multiplicity of multi-bit characters which are evaluated in parallel, each character being read bit for bit, that a number of groups of η memory elements are also provided are, the one to one elements in each group being assigned to separate shift registers and each group of η memory elements each of the characters taken from the memory is so arranged that the logic elements also contain a first number of .logischen stages, each bit by bit on a 3 address the characters read from the memory and control the binary states of the η memory elements assigned to this character, and also a second group of logic levels, each responding bit for bit to the character in one of the shift registers and the binary states or corresponding elements in the η mentioned Groups to which the register is assigned control, so <2aS the binary state each memory element in said plurality of groups of η memory elements is controlled as a function of the comparison of the character taken from the associated memory and the character in the shift register to which the element is assigned. 3 «,) System according to claim 2, characterized in that. jedo ^ locic stage in the second group of logical "Bistable" level: contains elements that make the person respond the logical level of this "broad group on the starting point 109884/023 $ «ad original control the signal of the associated shift register and thereby influence the comparison criterion which the character in the shift register is compared with each of the characters taken from the memory in parallel will" i ».) System according to claim 3, characterized in that the bistable elements contain a first and a second flip-flop, which can assume two holding states, the combinations of the switching states of the two flip-flops determining at least three comparison criteria, namely "Equality", "equal to or greater than" and "equal to or less than", after which the characters?. In a shift register are compared with each of the characters extracted from the memory. . ■ * System according to Claim 4, characterized in that a multibit query register is present, each bit having a first and a second binary switching state, and circuit elements which respond to the switching states of the memory elements are also present Address the group and display the result of the comparison between the character assigned to the group and each of the characters in the η registers, r.wecka comparison of the states of the η memory elements each group with the states of a selected bald of bits of the query regiatera, BATH ORIGINAL 109884/0236 6.) A data processing system with a memory which contains a little data track in which multiselchen records are stored, each record containing an arbitrary combination of a VIo1 number / on characters including a terminating character, and the memory also having circuit elements which successively each zoichon bit read out for bits, characterized in that there are η registers which store η characters of the plurality of characters of the records including the final character, that furthermore at least a first group of η memory elements is present, with one of the η registers J · a different storage element is assigned, that furthermore at least one "gsrelt" group of η storage elements is provided, the elements of which correspond to a "bleaent" in the first group of storage elements, i.e. a device is also provided which "jocrcr; Inductively couple the storage element in the first group of storage elements with a register and with the device for successive evaluation and contain logissh * circuit elements that respond to the bit Control the state of each storage element in the first group of storage elements as a function of a preselected at V <? Comparison crit; erium8 between that from the 10S884 / 02J8 Such removed memory and the character In the Register, the dom storage element; is assigned that There are still controls that are at the end every character comparison interval sä the binary state * the second group of the η element «as a puncture of their States and the Items in the first group still control that din query register old η bits present 1st, the can be operated so that they represent a certain query criterion, and that finally a device is provided that with the query register and the second group of storage elements is coupled and includes elements representing the binary state of the bits of the query register with the binary state of the second Compares the group of η elements and provides a first signal if the state of a specific group of η elements in the mentioned second group of elements with the state of a corresponding group of Bits of the η bits of the query rule match. 7 *) SyeGen according to claim 6, characterized in that Each number contains a fixed number of bits that -the control elements furthermore with the logical elements contain coupled devices which then compare each character extracted from the memory with each in the η registers bit by bit stowing, with the status of each SXeKumtes in the first Qruppe am End of the comparison «ines complete, from the "'BAD ORIGINAL 10983A / 023S - ■ 3 * - Character removed from memory is an indication of the comparison between this extracted character and the character in the dttm register, since it is assigned to the element, the terminating character being stored in one of the registers mentioned. 8.) System according to claim 7, characterized in that the comparison elements said first signal only deliver if dl «elements In dsr first and second ElötnentengruppCj assigned to the register, in which the final character is stored, are in a predetermined state that the evaluation of a Display the final character from the memory and the $ die Switch «ustäade the preselected group of the η elements in of the second multitude of elements the switching state ««! correspond to a corresponding group of bits of the η bits of the query register. 9.) data processing;} oysteia with a multi-track storage device, where a variety of records in χ tracks of the memory and each record contains any number up to η characters, where jadsa Character includes y bits and the last digit of each record is a key & character lot, farner with facilities 109884/023 * for parallel, bit-by-bit evaluation of the characters of the χ tracks, the characters forming parts of χ different records, furthermore with a device sum simultaneous comparison of each of the χ evaluated characters with each of η characters, characterized in that η shift registers are provided, with different ones Register the individual of the η different characters, with which each of the characters taken from the memory must be compared, that a first plurality of bistable elements is also provided in an arrangement of χ rows and η columns, the elements in the individual rows of the individual Tracks of the store and the elements in the individual columns are assigned to one of the registers. There are also devices that couple the elements in each row with the elements that evaluate the characters from the track and are assigned to the row of elements in question, as well as contain logical row elements that distant r devices are present which couple the elements lh of each column with the associated register and contain logical column elements and that finally control devices are provided which are coupled to the logical row elements and feed these control pulses, ao that never control the state of each element as a function of Comparison between the character that is fed to the logical row elements from the assigned storage track and the character in the hienait 109884/0236 «D onaiNAL coupled register, so that at the end of a character comparison interval the states of the elements in each row corresponds to the comparison between the character that corresponds to the logical relhen elements that the Series of elements are assigned, supplied, and each of the characters in the η shift registers. 10c) system according to claim 9, characterized in that said elements by the control devices can be controlled in such a way that they are in a first state at the beginning of a synchronization comparison interval are located, the control devices supplying control pulses to the logical row elements and the logical column elements in such a way that at the end of the character comparison » intervalles Each element, whose row and column were supplied with matching characters, remains in the first switching state, while all other elements are are in the second switching state. 11.) System according to claim 10, characterized in that the logical column elements contain separately adjustable devices to meet the comparison criterion wrong the characters in the register that corresponds to the logical Column elements "(ordered 1st, and'den from the memory to control evaluated characters " BATH ORIGINAL 109884/023 « 12.) System according to claim 11, characterized in that the separately adjustable elements can be set in a first, second or third switching position, the comparison criteria "equality", "equal or define greater than ale "," equal to or less than ", so that each of the χ characters taken from the memory in parallel with jadötn the η characters in the η registers after at least one dor · three comparison keys before 13 «) System according to claim 12, in which one of the registers stores the terminating character, characterized in that an interrogation register is present which contains a plurality of bits which, each with two switching states for determination, contain a search criterion, and also one A second plurality of bistable elements is provided which are each assigned to a corresponding element in a first plurality of bi3table elements, the control devices containing circuit elements, including the switching states of the elements of the first plurality of bistable elements at the end of each character comparison interval? with the switching states of the corresponding elements of the disputed multiplicity of bistable elements, and that devices are provided, ile the switching status of the bits of the query register and the switching states of the elements of the second multiplicity 109884/0236 »AD original compare of elements corresponding to the individual rows of elements in the first multitude of bistable Elements are assigned so that an output signal ^ is delivered if the comparison is positive and the bistable element is in the series of elements of the first plurality of bistable elements, the assigned to the registers storing the final character is in the first switching state. Data processing system with a memory for storing multi-character recordings made on End contain a terminating character, each character consisting of a fixed number of bits, also with χ Reading devices for parallel evaluation 'of ζ records, character by character and bit by bit, weit.arbin ait finer facility for generating a Output signal when an evaluated one occurs Record which contains a predetermined combination of characters which fulfills a search criterion, characterized in that A η shift registers are provided, which store different characters with which the recorded character is to be compared, furthermore χ Storage words are available, each with a T and a Determine Ϊ'-field, where each field η element «m ^ t has a first and a second non-switchable switching state and the individual elements of the T-field gas-sent shift registers are assigned that further s logiaahe series stages are provided, each one Lots of setup with Jo a separate store-109884/0236 BATH ORIGINAL worfc couple that there are also η logical column levels, each of which has a register with the corresponding Elements of the associated T-Pelder couple that further the χ logical row stages and the η logical column stages are assigned first control devices which The operation of these logic stages during a large number of bit comparison intervals, which determine a character comparison interval, control, so that at the end of the character comparison interval the state Every Element in the T-PeId is a function of the comparison between the number in the associated register and the character that was supplied by the reading devices coupled with the memory word, the first control elements at the end of each character comparison interval supplying control signals which the switching states of the η elements des T 'field of each word as punctuation of its state and the state of the corresponding elements of the T field control that there is also an interrogation register with η bistable elements, the combined switching states of which define a search criterion, and that finally second control devices are provided which the switching states of at least some de? Compare η elements of the interrogation register with the display find of the corresponding elements in Jedora of the : i T ^f fields and deliver an output signal assigned to the T * field £ 3 if the maintenance access EttirKle ödr element of the T'-field with the state of balance selected elements of the query & registera match. 109884/0236 bad original 15 ·) System according to claim Vi _} characterized in that the Löglsehcn column functions separately; cinsteiHa ?? - facilities sur »contain control of the comparison criterion, according to which the sign in the register indicates that the
loslachen Spaliesiolemcnton Eugcoröncfc, r / dt Jerloisi is compared to the characters taken from the store, and <laö this separately one mad Elsnevifce in vionigafccna a «* n of dr-si switching? 3ustSndon einn ^ ol bra» are the "equality" , "equal to or greater than ala ^l; and" mean equal to or less than ". 16.) System according to claim I ¹ J, characterized in that each memory word contains a wire, the surface of which is a flatting of magnetic material
having. 109884/0236