DE1271768B - Magnetic core memory matrix and method and apparatus for their manufacture - Google Patents

Description

Magnetic core memory matrix and method and apparatus for their Manufacture The invention relates to one divided into two half matrices Magnetic core storage matrix made of toroidal cores with a rectangular hysteresis loop, the are arranged in a plane in rows and columns, with row wires and column wires, which alternately have opposite directions of action through the kernels of each row resp. Columns run with a sense wire parallel to the row lines like this runs in series through all the cores of the two half-matrices that in each row two equally large reading wire sections running in opposite directions are present, and with an inhibit wire that loops parallel to the row wires all cores of the half-matrix is guided, with the row wires of the two half-matrices are connected in series.

Such memory matrices are known to be operated so that by a row wire and a column wire each a current pulse is sent that corresponds to half the value of the current that is required to remagnetize a core is. Therefore, only the core sitting at the crossing point of these wires will receive one Current that is sufficient to reverse the magnetization. The remaining cores that are on the excited row wire or column wire, receive only half the magnetic reversal current, and no current pulse at all goes through the other nuclei of the matrix. In the common A voltage pulse is induced when the reading wire is on the crossing point of the energized wires sitting core is magnetized. This can be used to determine what information was stored on the kernel. The inhibit wire is used to separate Control of the individual memory matrices of a parallel memory.

The hysteresis loop of the cores available today is not ideally rectangular. This has the consequence that even those magnetic cores that Receive only half the magnetic reversal current, suffer a slight change in flux. This creates interference voltage pulses on the reading wire. If the matrix in each If the row and column contain a large number of cores, these interference voltage pulses may occur add in such a way that the signal pulse can no longer be evaluated with certainty. There is therefore the problem of rendering these interference voltage pulses harmless.

It is known that for this purpose the reading wire is not parallel to the To lead row or column wires through the cores, but in intersecting one another diagonal directions. This ensures that the interference signals at about half of the cores directed opposite to the interfering signals of the other half of the cores are. The interference signals then largely compensate one another. This measure but has the disadvantage that the production of the magnetic core memory matrix is very complicated is because the reading wire after attaching the row and column wires individually must be threaded in a diagonal direction through all the cores of the matrix. A The inhibit wire to be threaded through the matrix level must be threaded in a separate process be introduced either in rows or parallel to columns.

An attempt was therefore made to compensate for the interference signals on the Reach reading wire when it runs parallel to the row wires. One known magnetic core memory matrix is divided into two half-matrices; the common Row wires and separate column wires are included, with the reading wire in each Half matrix in alternating directions parallel to the row wires through the cores runs. The reading wires of the two half-matrices are parallel to each other on one Output transformer connected. However, this measure only results in an imperfect one Compensation of the interference signals and has the disadvantage that the two reading wires load each other with low resistance.

In another known magnetic core memory matrix, the Row wires alternately in opposite directions, two adjacent column wires each are connected in series in opposite directions, and the reading wire runs parallel to the Row wires each in the same sense as this, so he's half the Lines in one sense and the other half of the lines in the opposite sense passes through. With this course of the reading wire, however, only those from the column cores can resulting interference pulses are compensated; to compensate for the line cores additional compensation cores must be provided for any interference pulses. In addition, the attachment of an inhibit wire is not possible, so that this matrix is not suitable for parallel storage.

In a known matrix with one parallel to the row wires lying inhibit wire is a compensation of the originating from the row wires Interfering pulses achieved by the reading wire alternating crosswise in, two adjacent rows is guided parallel to the row wires, so that each in the same direction with half of the cores of a row line and with the other half the cores of the same row line is coupled in opposite directions. This solution is effective with regard to the compensation of the glitches, but it requires one complicated winding work. The reading wire and the inhibit wire must be in separate Operations are threaded, and during the threading of the reading wire must the cores in the different line sections are mutually offset. this can only be achieved with a considerable outlay on machinery.

In contrast, the aim of the invention is one provided with an inhibit wire Magnetic core storage matrix, whose reading wire with the lowest possible winding work and can be threaded simultaneously with the inhibit wire and is guided so that the optimal compensation of both that of the row cores and that of the column cores resulting glitches is achieved without the need for additional compensation cores are.

In the case of a magnetic core memory matrix of the type specified at the beginning this is achieved according to the invention in that in each half-matrix the initially common with the inhibit wire in a loop parallel to the row wires through the cores guided reading wire is separated in the middle that the two reading wire halves formed in this way are connected in series in opposite directions in each half-matrix and that the opposite directions running reading wire sections in each row by corresponding series connection the reading wires of the two half-matrices are formed in the case of the invention executed memory matrix Place the read wire and the inhibit wire in each half-matrix initially in a loop parallel to the row wires, so that they are different Wires can be formed from three wires drawn in in one operation. This greatly simplifies the wrapping work, and there are no special aids required for this.

The simultaneous pulling in of the reading wire, the inhibit wire and of the row wire is possible because in the rows the sense of action of the control wires alternate from line to line so that the inhibit wire is the same as the reading wire guided in a loop, d. H. can follow the reading wire in parallel. A compensation the interference signals coupled in via the column wires would not be possible if the inhibit wire followed the reading wire exactly over its entire length, as did this after the pulling in of the wires is the case first. The optimal compensation of the over The interfering signals coupled into the column wires are then passed through in a very simple manner the separation of the reading wire at one point in each half-matrix and the opposite Series connection of the reading wire sections thus formed is achieved.

After the reading wires in the two half-matrices in this way are formed exactly the same, they are assembled in the manner indicated connected in series. So it's just a junction between the reading wires of the two half matrices are present, and there is no need to cross out the pairs of lines. Nevertheless, there are then two equally large reading wire sections running in opposite directions in each line available, which according to the known principle, the optimal compensation of the Row wires result in coupled interference pulses.

Together, the two specified measures ensure that the possible excitation the glitches of one half of the excited line cores and Column cores counteract the glitches of the other half of the cores. this corresponds to the optimal compensation conditions.

The memory matrix according to the invention has the further advantage that the two half matrices can be constructed completely identically, so that they are mutually exclusive are interchangeable. This makes production even cheaper, and storage is simplified.

A preferred method of making a half-matrix for a Magnetic core memory matrix of this type according to the invention is that all Ring cores of the half-matrix simultaneously in the manner of a string of pearls on three wires are threaded so that the wires are looped in a tensioning device at intervals, which correspond to the desired spacing of the row wires are stretched out in such a way that that on each section of the wires there is one corresponding to the number of columns Number of magnetic cores located that the column wires through the cores of each column be drawn that one of the wires to form the row wires into a corresponding one Number of sections is cut, whereupon the row wires are attached to the contact pins of the matrix frame are soldered, and that another, the reading wire forming Wire is cut in the middle, whereupon the resulting wire sections are connected in series in opposite directions.

The threading work is further facilitated according to the invention by a device that facilitates the pulling in of the column wires. This device is characterized by two comb-like webs with mutually offset teeth, whose width and spacing correspond approximately to the distance between two row wires, and the front edges of which are beveled at an angle of 45 °.

The cores of a column are located between these two comb-like webs pinched after the wires are unclamped in the tensioning device. The cores are thereby aligned in a line and alternately according to one and the other other side inclined at an angle of 45 °, so that the column wires without difficulty can be pulled through.

The invention is explained below with reference to the drawing. In this shows FIG. 1 shows a top view of the memory matrix according to the invention; G. 2 shows a stage in the production of the memory matrix of F i g.1, F i g. 3 a further manufacturing stage, F i g. 4 is a top view of a device used for Production of the memory matrix is used, FIG. 5 is a side view of a of the two parts of the device of FIG. 4, fig. 6 a section along the Line A-A in FIG. 5 and F i g. 7 a further manufacturing stage, in which the device of FIG. 4 to 6 is used.

The in F i g. 1 shown magnetic core memory matrix consists of magnetic Toroidal cores 1, which are arranged in a plane in rows and columns. The clarity It is assumed for the sake that the memory matrix contains only 64 cores; usually the memory arrays consist of a much larger number of cores, for example 64 X 64 cores.

Each row and each column of the matrix shown contains eight magnetic cores. The memory matrix is divided into two half-matrices, each of which contains 32 kernels in eight rows and four columns. The cores of one half matrix are carried by a matrix frame 2. A column line 3, which is fastened to contact pins 5 of the matrix frame 2, runs through the cores of each column, and a row line 4 , which is soldered to contact pins 6 of the matrix frame 2, is passed through the cores of each row.

Furthermore, a read wire runs through all the cores of the half-matrix 7, which starts at a contact pin L 1. The reading wire 7 runs parallel to the first row wire through the four cores of the first row, then in opposite one Direction parallel to the row wire of the next row and so in alternating Directions through all cores. Between the fourth and the fifth line is the reading wire 7 is separated, and the end 9 thus created is the lower half connected to the opposite end 10 of the upper half, while that of the Separation point formed end 11 of the upper half to the contact pin L 2 of the half-matrix is led.

The second half-matrix is completely a mirror image of the first half-winding built up; the corresponding parts are given the same, but deleted, reference numerals Mistake. If in one half-matrix the contact pins are above and in the other Half-matrix are below the matrix frame, the two half-matrices are complete identical, so that they are mutually interchangeable.

The mutually corresponding contact pins 6 and 6 'of the row wires of the two half-matrices are connected to one another, so that the row wires are connected in series. In contrast, the contact pin L 2 of the reading wire of the first half-matrix is connected to the contact pin L'1 of the second half-matrix. From the arrowheads drawn in, which mark the same current directions, it can be seen that the flow through the reading wires in mutually corresponding rows of the two half-matrices is in opposite directions. The reading wires 7 and 7 'of the two half-matrices are therefore connected in series in opposite directions. The contact pins L 1 and L'2 serve as connections for the entire read wire. This circuit measure achieves an optimal compensation of the interference signals on the entire reading wire. In the case of parallel memories, which contain several memory matrices lying next to one another in parallel with the memory matrices of the type shown in FIG. 1, which are queried at the same time, it is customary to lead an inhibit wire through all the cores of each matrix, which allows the individual matrices to be controlled separately when information is being written. This inhibit wire is for the first half-matrix in FIG. 1 shown at 8 . It leads from the contact pin S1 parallel to the row wires 3 in alternating directions through all the cores of the half-matrix up to the contact pin S2. The inhibit wire 8 'of the second half-matrix is constructed in exactly the same way, and the two contact pins S2 and S'2 which correspond to one another are connected to one another. From the drawn arrow tracks one can see that the inhibit wires of the two half-matrices are connected in series in the same direction. The contact pins S 1 and S'1 serve as connections for the entire inhibit wire.

The memory matrix of FIG. 1 is particularly easy and quick produce according to the method described below with reference to FIG. 2 to 7 will.

First of all, all 32 cores of a half-matrix are simultaneously threaded onto four wires A, B, C, D (FIG. 2), which are, for example, soldered to a common threading pin. Then the cores on these wires are divided into as many equal groups as there are rows in the half-matrix; in the example given, in eight groups of four cores each. The fourth wire D is cut between the individual groups and bent into a loop or twisted together (FIG. 2) so that the four cores of a row are held together. Of the three remaining wires, wire A is used to form row wires 4, wire B to form read wire 7 and wire C to form inhibit wire B.

The wires with the core groups strung on them become wavy in the in F i g. 3 tensioning device shown unclamped. The clamping device has an outer pair of comb-shaped clamping pieces .12,13 and an inner pair of comb-shaped clamping pieces 14, 15. Each clamping piece has teeth or bolts 12 ', 13 ', 14' or 15 ', the width of which corresponds to the desired spacing of the row wires. The gaps between the teeth are the same width. The mutual distance the inner clamping pieces 14 and 15 corresponds to the desired length of the sections of the read wire and the inhibit wire.

The wire A is stretched around the teeth of the outer clamping pieces 12, 13, while the wires B and C are placed over the teeth of the inner clamping pieces 14 and 15; however, the wire B is drawn in the middle in a loop outwards over the outer clamping piece 13. When stretching the wires, make sure that there is a group of the tied cores on each section between the clamping pieces.

After the wires have been stretched out in the manner described, the pieces of wire D are removed. The eight cores of each column are in a row brought and inclined at an angle of 45 ° in the desired direction. Then will threaded the column wires through these cores.

Aligning the cores of a column and pulling the column wires through is accomplished using the methods shown in FIG. 4 to 7 shown device is much easier. This consists of two comb-like clamping pieces 16 and 17 with rod-shaped webs 18 and 19, on one broad side of which teeth 20 and 21 are attached. The distance between the center lines of two adjacent teeth is equal to twice the distance between two columnar wires in the matrix. From this distance, the width of a tooth is slightly less and the gap between two teeth is slightly more than half. The number of teeth corresponds to half the number of columns in the matrix. The teeth of one clamping piece 16 are offset from those of the other clamping piece 17 by half a tooth spacing, so that each tooth of one clamping piece faces a gap in the other clamping piece.

Each tooth has a roughly rectangular cross-section, the two being Front edges cut off at an angle of 45 ° to form inclined surfaces 20 'and 21' are.

In the bottom of the webs 18 and 19 are in the gaps between two teeth cut grooves 22 which are symmetrical to the teeth 20 and 21, respectively. The depth of the grooves 22 is approximately equal to half the height of the web, and their distance is equal to the distance between two row wires. Across all teeth of each clamp piece grooves 23 are cut which lie in a line in front of the grooves 22 that its upper limit is approximately at the level of the bottom of the grooves 22.

The clamping piece 17 is provided with stops 24 which limit the sliding of the two clamping pieces into one another.

The application of this device is shown in FIG. 7 shown. the two clamping pieces 16 and 17 are placed on the row wires 4 that these lie in the grooves 22, and that the eight cores 1 of a column between the Clamping pieces are located. Then the two clamping pieces 16 and 17 are on top of each other too moved. The cores 1 are thereby separated from the inclined surfaces 20 'and 21' of the teeth detected and aligned in a line, alternating after the one and the other side be inclined at an angle of 45 °. The grooves 23 of the two Clamping pieces form a closed channel through which a threading pin can be inserted without difficulty be passed in the direction of arrow F with a soldered-on column wire can. The threading pin goes through the central openings of the cores 1 by itself. The two clamping pieces 16 and 17 are then removed again and can be used for alignment serve the next core row.

After the last column wire has been pulled in, the finished wire is threaded Matrix from the clamping device of FIG. 3 taken. The wire A is turned into a the number of sections corresponding to the number of lines are cut, and these are cut soldered to the contact pins of the matrix frame. Likewise are the column wires soldered to the associated contact pins. The loop of the Wire B is cut through and the two halves thus formed turn in opposite directions connected in series, whereby the read wire of the in F i g. 1 described matrix is formed. The ends of the sense wire and those of wire C, which is the inhibit wire are soldered to the associated contact pins. Eventually be the corresponding contact pins of two half matrices are connected to one another. at A suitable design of the contact pins can also be used for the soldering work using the dip soldering process be performed.

Claims (4)

Claims: 1. Magnetic core memory matrix divided into two half matrices made of toroidal cores with a rectangular hysteresis loop, arranged in rows in one plane and columns are arranged with row wires and column wires alternating with run in the opposite direction through the cores of each row or column, with a read wire that runs parallel to the row lines in series all the cores of the two half-matrices runs so that two equal in every row large, oppositely running reading wire sections are present, and with a Inhibit wire, which runs in a loop parallel to the row wires through all Cores of the half-matrix is guided, with the row wires of the two half-matrices are connected in series, which means that in each half-matrix which is initially together with the inhibit wire in a loop parallel to the row wires The reading wire passed through the cores is cut in the middle so that the two are so formed reading wire halves in each half matrix connected in opposite directions in series and that the reading wire sections running in opposite directions go through in each row corresponding series connection of the reading wires of the two half-matrices are formed. 2. Method for producing a half-matrix for a magnetic core memory matrix according to claim 1, characterized in that all ring cores of the half-matrix be threaded at the same time like a string of pearls on three wires that the Wires looped in a jig at intervals that you want Corresponding distances of the row wires, are stretched so that on for each section of the wires a number of magnetic cores corresponding to the number of columns located that the column wires are drawn through the cores of each column that one of the wires to form the row wires into a corresponding number of sections is cut, whereupon the row wires are attached to the contact pins of the matrix frame be soldered, and that another wire, which forms the reading wire, in the middle is cut through, whereupon the resulting wire sections in opposite directions in series be switched. 3. Apparatus for performing the method according to claim 2, characterized by two comb-like clamping pieces (16, 17) with mutually offset Teeth (20 or 21), the width of which is slightly smaller and the spacing of which is slightly larger than the distance between two row wires of the matrix, and their leading edges at an angle are beveled at 45 °. 4. Apparatus according to claim 3, characterized in that in the underside of the webs (18, 19) of the clamping pieces symmetrically to the teeth (20, 21) grooves (22) are cut, the distances between which correspond to the distance between two row wires, and that before these grooves (22) are cut across the teeth (20,21) grooves (23) . Documents considered: German Patent No. 1056 639; German interpretative document No. 1024 270; U.S. Patent Nos. 2,691,154, 2,709,248; Electronics, February 1956, pp. 158-161.