DE1263854B - Arrangement for limiting the amplitude of electrical signals - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Int. Cl .:

H04b

German class: 21 a2 - 36/14

Number: 1263 854

File number: T 30023 VIII a / 21 a2

Filing date: December 15, 1965

Open date: March 21, 1968

The invention is concerned with an arrangement for Limiting the amplitude of electrical signals, preferably to limit pulses to a maximum value.

If on a sample of preferably a III-V compound semiconductor A voltage is applied with suitable dimensions via ohmic contacts, which creates an electric field that is greater than is a certain critical field, instabilities can occur in the flowing stream, for example have the form of microwave oscillations, as is the case, among other things, in the literature reference »Solid State Commun. ”, 1 (1963), pp. 88 to 91,“ Microwave Oscillations of Current in Ill-V-Semiconductors ” became.

If the mentioned critical field strength is exceeded, the current / collapses from its value I _K corresponding to the critical field to a value I _mln , as is shown schematically in the figure as a function of time t. This decrease in current is explained by the fact that a high field zone is created in the semiconductor sample, which builds up from a so-called generation center at a certain point in the volume of the semiconductor and migrates to the anode of the sample at the speed of the charge carriers.

At the same time, outside the high field zone, the field is reduced to a value that is smaller than the aforementioned critical value. Correspondingly, the current in the outer circuit drops to the minimum value denoted by I _{min in the figure.} The current remains at this value for the duration of the passage time of the high field zone through the semiconductor sample. As soon as the high field zone has reached the anode, a new high field zone can be triggered again in the generation center. If a correspondingly high voltage is constantly applied to the semiconductor sample, this process is repeated periodically. The period of the current oscillations is equal to the transit time of the high field zone through the volume of the semiconductor. The quiescent current is denoted by I _B.

The aim of the invention is to achieve the effect described above for signal limiting, preferably for Limitation of pulses to a given maximum value.

According to the invention, this is achieved in that the signal to be limited lies on the sample of a semiconductor oscillator based on a volume effect, in particular made of a III-V compound semiconductor, which is biased in such a way that the bias voltage applied to the sample is smaller than that for triggering the Sample oscillation required arrangement to limit the amplitude
electrical signals

Applicant:
Telefunken

Patent Verwertungsgesellschaft m. B, H.
7900 Ulm, Elisabethenstr. 3

Named as inventor:

Dipl.-Ing. Dr. Berthold Bosch, 7901 Ehrenstein

the critical voltage, and that the signal to be limited has at least such an amplitude comprises that the bias of the sample is raised to the critical tension value.

The above-described jump in current to a lower value in the outer circle of the semiconductor sample, which occurs when the critical voltage is reached, and the jump in current to the original amplitude value I _B after the passage time are practically independent of the amplitude of the trigger pulse, as long as it is sufficient to reduce the to reach critical tension. The output amplitude is essentially a function of the semiconductor material and the cross section of the semiconductor sample, so that it is possible to set the output amplitude at a predetermined value by appropriate selection of the material and its cross section. Conventional limiters are only independent of the input signal in a relatively small area. In the case of crystal diodes, the load capacity depends e.g. B. from the pn junction. Because of the lack of a pn junction, the limiter according to the invention can process much higher powers which essentially depend on the volume and material of the semiconductor. In addition, the arrangement according to the invention has a very small capacitance, so that the small time constant resulting therefrom enables a rapid response.
In a further development of the invention there is the possibility that the signal to be limited controls the semiconductor oscillator via a preferably insulated additional electrode attached to the semiconductor sample.

Claims (3)

Patent claims: 1. Arrangement for limiting the amplitude of electrical signals, preferably for limiting 809 519/472 Pulses to a given maximum value, characterized geke η η indicates that this is too limiting signal at the sample of a solid-state oscillator based on a volume effect, in particular from a III-V compound semiconductor is biased so that the on the The preload applied to the specimen is less than that required to trigger the specimen oscillation critical voltage and that the signal to be limited has at least one amplitude, which raises the pre-tension of the sample to the critical tension value. 2. Arrangement according to claim 1, characterized in that by choosing the appropriate Semiconductor materials and the cross section of the semiconductor sample, the maximum value is set. 3. Arrangement according to claim 1, characterized in that the signal to be limited Semiconductor oscillator via an additional, preferably isolated, attached to the semiconductor sample Electrode controls. Considered publications:
Solid State Communications, 1963, pp. 88 to 91. 1 sheet of drawings 809 519/472 3.68 © Bundesdruckerei Berlin