DE1191000B - Clock controlled allocator with magnetic coupling elements - Google Patents

Description

FEDERAL REPUBLIC OF GERMANY

GERMAN

PATENT OFFICE

EDITORIAL

Int. CL:

H 04 m

German class: 21 a3 - 32/20

Number:
File number:
Registration date:
Display day:

St 21046 VIII a / 21 a3
4th September 1963
April 15, 1965

The invention relates to a clock-controlled allocator with magnetic coupling elements in which a special coupling element for each assignment, ζ. B. a magnetic core with a rectangular hysteresis loop, is used.

The known allocators work with a constant bias current in all coupling elements. The parallel input information available via a group of input control lines counteracts this bias current. Only in the associated coupling element is the countercurrent generated by the input information sufficient to flip the magnetic core, this core then emitting an output pulse. This coincidence-based allocator can only be reliably implemented for a few input variables. If you choose z. B. input information of the form (5 from x), then the result is a pre-flow-counter-flow ratio of 4 to 5. If one considers that the counter-flow is generated via five different control circuits with unavoidable tolerances, then it is easy to see that the assigner is no longer working properly. If only four control circuits run counter-current, the magnetic core must not be folded over, even under the most unfavorable conditions. If the magnetic core is selected, ie all five assigned control circuits lead countercurrent, then the magnetic core must be safely folded over again in the most unfavorable conditions.

The above statements clearly show that a magnetic allocator based on the coincidence principle can only be used to a very limited extent. The choice of input code is very clock controlled with magnetic allocators
Coupling elements

Applicant:

Standard Elektrik Lorenz Aktiengesellschaft,

S'tuttgart-Zuffenhausen, Hellmuth-Hirth-Str. 42

Named as inventor:
Dipl.-Phys. Friedrich Ulrich,
Stuttgart-Bad Cannstatt

currents is to be met in such a way that the magnetic core is safely folded over when it is over a single one Control circuit is influenced. The mapper built up in this way works securely with every code, and the Dimensioning of the control circuits is in no way critical. The allocator according to the invention allows in a known manner also an interference compensation, so that no undesired output signals on not involved output lines occur. This is achieved by using two coupling elements for each assignment to be provided by the first

_ _w and second clock pulse in opposite and

constricted. It is therefore the object of the invention to influence a 3s from the third clock pulse in the same way specify new magnetic allocator that will un- and that the output lines go through both depending on the selected code, enables clear assignment, even if the control currents have large tolerances and the characteristic values of the individual coupling elements differ from one another. The 40 the coupling elements of the assigner additionally as Allocator according to the invention is clock-controlled and locking oscillators are formed. Here is the is characterized in that all unselected coupling elements by a first clock pulse be reversed that by a second clock pulse emitting the associated output 45 further embodiment of the additional information according to the invention only the selected coupling element is carried out in an adversarial manner, is controlled and that all coupling elements in the initial state by a third clock pulse to be postponed. The output signal is blocked for the first and third clock pulse. In the 50 In the second cycle, only the assigned magnetic core is flipped over. The choice of tax

Coupling elements of an assignment are performed in the same way. The power of the output pulses of the assigner can be increased by

Blocking oscillator blocked in the first and third clock pulse and released in the second clock pulse. the Input and output variables are after a

The invention is based on the drawings

explained in more detail. It shows

F i g. 1 an allocator according to the invention,

F i g. 2 an allocator with interference compensation and FIG. 3 the formation of a coupling element for

Blocking transducer.

509 539/99

In Fig. 1 a allocator with three coupling elements Kl, Kl and K 3 according to the invention is shown. Each coupling element is intended for a specific assignment. The input information acts via the input control lines α, α to e, e on the coupling elements of the allocator in accordance with the selected allocation. The implementation of these control lines is such that the core assigned to certain input information is not affected when this information is present. The core class is while queuing the input information 3, b, c, d, <? and the kernel K 3 is selected from the information α, Έ, c, ~ ä, e . The input control lines are routed through the core or past the core according to this scheme. In a first clock Tl , therefore, all cores with the exception of the selected core, z. B ^ K 2, reversed. If the input information α, Έ, c, Ή, e of the core K 2 is available, the cores Kl and K3 are reversed in the first time cycle. The core Kl is remagnetized via the control lines Έ and Ή and the core K3 via the control lines ä, c and e . The current in all control circuits is selected in such a way that it is definitely sufficient to remagnetize a core. At time T1 , the output signals of lines k to q are made ineffective in some known manner. In the time cycle T 2, the selected core K 2 is reversed alone. The assigned output information appears on the output lines. The output code is determined by the routing of the output control lines k, Έ to q, q . Since the control lines k ~, i, m, d, q are routed through the core K 2 , signal pulses occur on these output lines at the time cycle T 2. The number and routing of the input and output control lines depends on the code of the input and output information. At cycle Γ 2, a loop S is supplied with control current that is sufficient to safely reverse a core. Since the unselected cores K1 and K3 have already been reversed, no large output signals can occur via their output windings which can influence the signal pulses of the selected core K2. In the time cycle T 3, all cores Kl to K 3 are returned to their starting position, and the allocator is ready for a new allocation. This reset is indicated by the pulse of the time cycle T 3 on the loop S , which is directed in the opposite direction to the pulse of the time cycle Γ2.

From these explanations it follows that the dimensioning of the control currents for the allocator according to of the invention is uniform and independent of the choice of input and output code.

F i g. 2 now shows an exemplary embodiment of an allocator with interference compensation. Two cores are provided for each assignment. The allocator has the same input information as the allocator according to FIG. 1. The output information appears differently, however, on the output lines k, Ti to q, q (including the lines n, Ti and p, p) . This time separate control lines 52 and 53 are provided for the time cycles T 2 and T 3. Since the input variables α to e have a contradictory design, the lines α and ä, b and 2> to e and e can each be combined to form a control sub-circuit. This is indicated by the resistance common to both lines. The mode of operation of the interference compensation by means of a second core is known per se. In this context it is only pointed out that in the time cycle Γ 2 the unselected cores, eg KU and K31, would give interference pulses to the assigned lines, since there is no ideal rectangular hysteresis loop of the cores. Since the control lines a, ä to e, e and the clock line Tl enforce the cores K 12 and K 31 in the opposite way to the cores K 11 and K 31, the cores of an unselected assignment are at the beginning of the time cycle Γ 2 im opposite state of remanence. Due to the control current in the loop S1 , the cores are again excited in opposite directions, that is, both unselected cores are brought into the saturation range. The two interference signals are compensated for in the output windings of both cores, which are routed in the same direction. The second core K11 of the selected assignment is brought into the saturation range in time cycle Γ 2. The interfering signals occurring in the output lines weaken the useful output signal of the core KIl somewhat.

The input windings of the cores K 12 ... K 32 can be omitted, since the current in time cycle T 3 already brings the latter into the desired state.

In order to get the signals emitted by the assigner more powerful, a further development of the invention provides, as FIG. 3 shows, to add each coupling element of the assigner to a blocking oscillator. The cores Kl and K2 receive two additional windings in opposite directions, which are switched into the control and output circuit of a transistor Trsl and Trs 2 , respectively. The transistor via separate blocking circuits D 1, D 2, TVs3 can be made dependent on the input ^ of the timing pulses Tl to Γ3. Only if the time cycle Γ 2 is displayed via input A, the output signal induced in the two windings of the selected core can put the transistor of the blocking oscillator into the conductive state.

Claims (6)

Patent claims: 1. Clock-controlled allocator with magnetic coupling elements, in which a special coupling element is used for each allocation, characterized in that all unselected coupling elements (Kl, K3) are reversed by a first clock pulse (Γ1), that by a second clock pulse (T 2 ) with delivery of the assigned output information (k, R ... q, ~ q) only the selected coupling element (K 2) is reversed and that by a third clock pulse (T 3) all coupling elements (Kl, Kl, K 3) in the Initial state can be reset (Fig. 1). 2. Allocator according to claim 1, characterized in that the output signals are blocked at the first (Γ1) and third clock pulse (T 3) . 3. Allocator according to claim 1, characterized in that for each allocation two coupling elements (K 11, KU ... K31, K31) are provided, which from the first and second clock pulse (Tl, Γ2) in opposite and 1 19! 000 be influenced in the same way by the third clock pulse (Γ3), and that the output lines (k, Έ ... q, q) are routed through both coupling elements of an assignment in the same way (Fig. 2). 4. Allocator according to claim 1, characterized in that the coupling elements (Kl, K2, K3) of the allocator are also designed as a blocking oscillator (Fig. 3). 5. Allocator according to claim 1, characterized in that the blocking oscillator is blocked in the first and third clock pulse (Tl, Tl) and released in the second clock pulse (Γ2) (Fig. 3). 6. Allocator according to claim 1 to 5, characterized in that the input and output variables (a to e, k to q) are adversarial (α, Έ to q, ~ q) . 1 sheet of drawings