DE1185896B - Method for stabilizing the surface of semiconductor bodies with p-n junctions - Google Patents

Method for stabilizing the surface of semiconductor bodies with p-n junctions

Info

Publication number
DE1185896B
DE1185896B DEST16252A DEST016252A DE1185896B DE 1185896 B DE1185896 B DE 1185896B DE ST16252 A DEST16252 A DE ST16252A DE ST016252 A DEST016252 A DE ST016252A DE 1185896 B DE1185896 B DE 1185896B
Authority
DE
Germany
Prior art keywords
semiconductor
layer
silicon layer
stabilizing
semiconductor body
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DEST16252A
Other languages
German (de)
Inventor
Rer Nat Gerhard W H Helwig Dr
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Alcatel Lucent Deutschland AG
Original Assignee
Standard Elektrik Lorenz AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to DEST16141A priority Critical patent/DE1184178B/en
Application filed by Standard Elektrik Lorenz AG filed Critical Standard Elektrik Lorenz AG
Priority to DEST16252A priority patent/DE1185896B/en
Priority to GB5950/61A priority patent/GB954915A/en
Priority to FR853279A priority patent/FR1280466A/en
Publication of DE1185896B publication Critical patent/DE1185896B/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/29—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the material, e.g. carbon
    • H01L23/298—Semiconductor material, e.g. amorphous silicon
    • C—CHEMISTRY; METALLURGY
    • C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
    • C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
    • C23C14/00—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material
    • C23C14/06—Coating by vacuum evaporation, by sputtering or by ion implantation of the coating forming material characterised by the coating material
    • C23C14/14—Metallic material, boron or silicon
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02367—Substrates
    • H01L21/0237—Materials
    • H01L21/02373—Group 14 semiconducting materials
    • H01L21/02381—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02518—Deposited layers
    • H01L21/02521—Materials
    • H01L21/02524—Group 14 semiconducting materials
    • H01L21/02532—Silicon, silicon germanium, germanium
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104—Forming layers
    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02612—Formation types
    • H01L21/02617—Deposition types
    • H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3157—Partial encapsulation or coating
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Description

BUNDESREPUBLIK DEUTSCHLANDFEDERAL REPUBLIC OF GERMANY

DEUTSCHESGERMAN

PATENTAMTPATENT OFFICE

AUSLEGESCHRIFTEDITORIAL

Internat. Kl.: C 23 cBoarding school Class: C 23 c

Deutsche Kl.: 48 b -13/02 German class: 48 b - 13/02

Nummer: 1185 896Number: 1185 896

Aktenzeichen: St 16252 VI b/48 bFile number: St 16252 VI b / 48 b

Anmeldetag: 19. März 1960 Filing date: March 19, 1960

Auslegetag: 21. Januar 1965Opening day: January 21, 1965

Die Erfindung betrifft ein Verfahren zum Stabilisieren der Oberfläche von Halbleiterkörpern, insbesondere aus Silizium und Germanium, mit mindestens einem p-n-Übergang, durch Vakuumaufdampfen einer dünnen Siliziumschicht, vorzugsweise in der Umgebung des p-n-Überganges.The invention relates to a method for stabilizing the surface of semiconductor bodies, in particular made of silicon and germanium, with at least one p-n junction, by vacuum evaporation a thin silicon layer, preferably in the vicinity of the p-n junction.

Die Aufgabe, die Oberfläche von Halbleiterkörpern mit einem oder mehreren p-n-Übergängen zur Erzielung eines stabilen Verhaltens in Sperrichtung und zur Erzielung hoher Sperrspannungen mit einer be- ίο sonderen Schicht zu versehen, ist bereits bekannt und auch schon auf verschiedene Weise gelöst worden.The task of achieving the surface of semiconductor bodies with one or more p-n junctions stable behavior in the reverse direction and to achieve high reverse voltages with a be ίο Providing a special layer is already known and has already been solved in various ways been.

So wurde beispielsweise vorgeschlagen, die Oberfläche von Halbleiterkörpern mit einem oder mehreren p-n-Übergängen mit Hilfe einer aufgebrachten Schicht aus amorphem Germanium zu stabilisieren. Die amorphe Germaniumschicht kann auf der Oberfläche des Halbleiterkörpers z. B. durch Aufdampfen im Vakuum erzeugt werden. Das verdampfte Ger- ao manium kondensiert sich als dünne amorphe Schicht auf dem Halbleiterkörper, der sich auf Zimmertemperatur oder auf nicht wesentlich höherer Temperatur befindet. Die Dicke der Schicht ist nicht wesentlich. Es wurde festgestellt, daß bereits sehr dünne, optisch nicht wahrnehmbare, die Oberfläche des Halbleiters jedoch zusammenhängend bedeckende Schichten ausreichend sind, um den gewünschten Effekt der Stabilisierung herbeizuführen. Günstige Schichtdicken liegen zwischen etwa 50 und 500 AE.For example, it has been proposed that the surface of semiconductor bodies with one or more To stabilize p-n junctions with the help of an applied layer of amorphous germanium. The amorphous germanium layer can on the surface of the semiconductor body z. B. by vapor deposition be generated in a vacuum. The vaporized geranium condenses as a thin amorphous layer on the semiconductor body, which is at room temperature or at a temperature that is not significantly higher is located. The thickness of the layer is not essential. It was found that even very thin, optically imperceptible, but cohesively covering the surface of the semiconductor Layers are sufficient to bring about the desired stabilization effect. Cheap Layer thicknesses are between about 50 and 500 AU.

Man hat auch schon Transistoren, Legierungsdioden u. dgl. mit Stabilisierungsschichten aus dem Monoxyd und dem Dioxyd des betreffenden Halbleitermaterials versehen.There are already transistors, alloy diodes and the like with stabilization layers made of the Monoxide and the dioxide of the semiconductor material in question.

Es sind auch einen p-n-Übergang enthaltende Halbleiteranordnungen bekannt, die mit einer eigenleitenden Schutzschicht aus dem gleichen Material überzogen sind. Die Art und Weise der Aufbringung dieser Schicht bewirkt jedoch das Entstehen eines zumindest teilweise kristallinen Überzuges, der bezüglich der Oberflächenstabilisierung wesentlich schlechter ist als eine vollkommen amorphe Siliziumschicht. Semiconductor arrangements containing a p-n junction are also known which have an intrinsic protective layer made of the same material are coated. However, the way in which this layer is applied causes a at least partially crystalline coating, which is essential in terms of surface stabilization is worse than a completely amorphous silicon layer.

Ferner ist es bekannt, für Hallgeneratoren bestimmte Halbleiterschichten mit einem Schutzüberzug aus Germanium oder Silizium zu versehen. Auch in diesem Fail handelt es sich um kristallines Material.It is also known to have semiconductor layers with a protective coating for Hall generators to be provided from germanium or silicon. In this case, too, the material is crystalline.

Die bekannten Vorschläge genügen jedoch nicht den Anforderungen des praktischen Einsatzes der Halbleiteranordnungen.However, the known proposals do not meet the requirements of practical use Semiconductor arrangements.

Gemäß der Erfindung wird deshalb vorgeschlagen, die Oberfläche von Halbleiterkörpern dadurch zu Verfahren zum Stabilisieren der Oberfläche
von Halbleiterkörpern mit p-n-ÜbergängenAccording to the invention, it is therefore proposed that the surface of semiconductor bodies be used to stabilize the surface
of semiconductor bodies with pn junctions

Anmelder:Applicant:

Standard Elektrik Lorenz Aktiengesellschaft,Standard Elektrik Lorenz Aktiengesellschaft,

Stuttgart-Zuffenhausen, Hellmuth-Hirth-Str. 42Stuttgart-Zuffenhausen, Hellmuth-Hirth-Str. 42

Als Erfinder benannt:Named as inventor:

Dr. rer. nat. Gerhard W. H. Helwig, Fürth (Bay.)Dr. rer. nat. Gerhard W. H. Helwig, Fürth (Bay.)

stabilisieren, daß auf den Halbleiterkörper eine amorphe Siliziumschicht im Vakuum aufgedampft wird und dabei Halbleiterkörper und Verdampfungsquelle relativ zueinander bewegt werden und daß gegebenenfalls die amorphe Siliziumschicht mit einer weiteren Schutzschicht, z. B. aus Lack, Kunstharz oder einem anorganischen Dielektrikum, überzogen wird.stabilize that an amorphous silicon layer is vapor-deposited on the semiconductor body in a vacuum is and thereby the semiconductor body and evaporation source are moved relative to one another and that optionally the amorphous silicon layer with a further protective layer, e.g. B. from paint, synthetic resin or an inorganic dielectric.

Nach den vorliegenden Erfahrungen kann eine derartige amorphe Siliziumschicht sowohl bei Halbleiterkörpern aus Silizium als auch bei solchen aus Germanium Anwendung finden, und es besteht berechtigter Grund zur Annahme, daß auch andere Halbleiter, deren kristallographischer Aufbau gleichartig mit dem des Siliziums ist, sich nach dem Verfahren nach der Erfindung mit gleichem Erfolg behandeln lassen.Based on experience, such amorphous silicon layer both in semiconductor bodies made of silicon and in those made of Germanium is used, and there is good reason to believe that others Semiconductors, the crystallographic structure of which is similar to that of silicon, are based on the process can be treated according to the invention with the same success.

Vor dem Aufbringen der amorphen Schicht auf die Oberfläche des Halbleiterkörpers wird dieser zweckmäßig durch Ätzen und/oder mit Hilfe einer Glimmentladung oder auf andere bekannte Weise gereinigt.Before the amorphous layer is applied to the surface of the semiconductor body, the latter is expediently by etching and / or with the aid of a glow discharge or in another known manner cleaned.

Zur Erzeugung der amorphen Siliziumschicht wird hochohmiges Silizium aus einer Wolframwendel oder aus Tiegeln, die aus schwerschmelzbaren Oxyden bestehen, vorzugsweise Berylliumoxyd, im Hochvakuum auf die zu schützenden Halbleiteroberflächen in Dicken von vorzugsweise 50 bis 500AE aufgedampft. To produce the amorphous silicon layer, high-resistance silicon is made from a tungsten filament or from crucibles made of refractory oxides, preferably beryllium oxide, in a high vacuum vapor-deposited onto the semiconductor surfaces to be protected in thicknesses of preferably 50 to 500AE.

Beim Aufdampfen der Siliziumschicht ist es ferner günstig, für eine gleichmäßige Verteilung des verdampften Siliziums auf der Oberfläche des Halbleiterkörpers Sorge zu tragen, was z. B. durch Relativbewegungen zwischen Halbleiterkörper und Verdampfungsquelle geschehen kann. Der Halbleiterkörper selbst befindet sich während des Aufdampfens z. B. auf etwa Zimmertemperatur.During the vapor deposition of the silicon layer, it is also advantageous for a uniform distribution of the vaporized To take care of silicon on the surface of the semiconductor body, which z. B. by relative movements can happen between the semiconductor body and the evaporation source. The semiconductor body itself is located during the evaporation z. B. to about room temperature.

409 769/324409 769/324

Anschließend an die Erzeugung dieser Stabilisierungsschicht wird die Halbleiteranordnung mit einer weiteren Schutzschicht, z. B. aus Lack, Kunstharz oder aus einem zusätzlich aufgedampften Dielektrikum, z. B. Magnesiumfluorid, versehen.Subsequent to the production of this stabilization layer, the semiconductor arrangement is provided with a further protective layer, e.g. B. from paint, synthetic resin or from an additionally vapor-deposited dielectric, z. B. magnesium fluoride provided.

Claims (1)

Patentanspruch:Claim: Verfahren zum Stabilisieren der Oberfläche von Halbleiterkörpern, insbesondere aus Silizium und Germanium, mit mindestens einem p-n-Übergang, durch Vakuumaufdampfen einer dünnen Siliziumschicht, vorzugsweise in der Umgebung des p-n-Überganges, dadurch gekennzeichnet, daß auf den Halbleiterkörper eine amorphe Siliziumschicht im Vakuum aufgedampft wird und dabei Halbleiterkörper und Verdampfungsquelle relativ zueinander bewegt werden und daß gegebenenfalls die amorphe Siliziumschicht mit einer weiteren Schutzschicht, z. B. aus Lack, Kunstharz oder einem anorganischen Dielektrikum, überzogen wird.Method for stabilizing the surface of semiconductor bodies, in particular made of silicon and Germanium, with at least one p-n junction, by vacuum evaporation of a thin silicon layer, preferably in the vicinity of the p-n junction, characterized in that that an amorphous silicon layer is vapor-deposited on the semiconductor body in a vacuum and while the semiconductor body and evaporation source are moved relative to one another and that optionally the amorphous silicon layer with a further protective layer, e.g. B. made of paint, synthetic resin or an inorganic dielectric, is covered. In Betracht gezogene Druckschriften:
Deutsche Patentschrift Nr. 895 199;
deutsche Auslegeschriften Nr. 1 037 016,
207,1077500;
französische Patentschrift Nr. 805 066;
USA.-Patentschrift Nr. 2 789 258.Considered publications:
German Patent No. 895 199;
German interpretative documents No. 1 037 016,
207.1077500;
French Patent No. 805 066;
U.S. Patent No. 2,789,258. 409 769/324 1.65 Q Bundesdruckerei Berlin409 769/324 1.65 Q Bundesdruckerei Berlin
DEST16252A 1960-02-20 1960-03-19 Method for stabilizing the surface of semiconductor bodies with p-n junctions Pending DE1185896B (en)

Priority Applications (4)

Application Number Priority Date Filing Date Title
DEST16141A DE1184178B (en) 1960-02-20 1960-02-20 Process for stabilizing the surface of semiconductor bodies with pn junctions by vacuum evaporation
DEST16252A DE1185896B (en) 1960-02-20 1960-03-19 Method for stabilizing the surface of semiconductor bodies with p-n junctions
GB5950/61A GB954915A (en) 1960-02-20 1961-02-17 Method of stabilising the surface of semi-conductor bodies comprising pn-junctions
FR853279A FR1280466A (en) 1960-02-20 1961-02-20 Semiconductor refinements

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
DEST16141A DE1184178B (en) 1960-02-20 1960-02-20 Process for stabilizing the surface of semiconductor bodies with pn junctions by vacuum evaporation
DEST16252A DE1185896B (en) 1960-02-20 1960-03-19 Method for stabilizing the surface of semiconductor bodies with p-n junctions

Publications (1)

Publication Number Publication Date
DE1185896B true DE1185896B (en) 1965-01-21

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DEST16141A Pending DE1184178B (en) 1960-02-20 1960-02-20 Process for stabilizing the surface of semiconductor bodies with pn junctions by vacuum evaporation
DEST16252A Pending DE1185896B (en) 1960-02-20 1960-03-19 Method for stabilizing the surface of semiconductor bodies with p-n junctions

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DEST16141A Pending DE1184178B (en) 1960-02-20 1960-02-20 Process for stabilizing the surface of semiconductor bodies with pn junctions by vacuum evaporation

Country Status (3)

Country Link
DE (2) DE1184178B (en)
FR (1) FR1280466A (en)
GB (1) GB954915A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1589886B1 (en) * 1966-03-23 1972-05-31 Hitachi Ltd SEMICONDUCTOR COMPONENT WITH SURFACE COATING AND METHOD FOR ITS MANUFACTURING
DE2547304A1 (en) * 1974-10-26 1976-04-29 Sony Corp SEMICONDUCTOR COMPONENT AND METHOD FOR ITS PRODUCTION
DE2618733A1 (en) * 1975-04-30 1976-11-11 Sony Corp SEMICONDUCTOR COMPONENT WITH HETEROUE TRANSITION
DE2655341A1 (en) * 1975-12-19 1977-06-30 Philips Nv SEMICONDUCTOR ARRANGEMENT WITH PASSIVATED SURFACE AND METHOD FOR MANUFACTURING THIS ARRANGEMENT
FR2359510A1 (en) * 1976-07-20 1978-02-17 Siemens Ag SEMICONDUCTOR COMPONENT CONTAINING A PROTECTIVE LAYER ACHIEVING A PASSIVATION
DE2821539A1 (en) * 1977-05-18 1978-11-23 Eastman Kodak Co METHOD FOR MANUFACTURING SEMICONDUCTOR COMPONENTS
EP0008406A1 (en) * 1978-08-23 1980-03-05 Siemens Aktiengesellschaft Method for producing a passivating layer on a silicon semiconductor body
EP0019887A1 (en) * 1979-05-30 1980-12-10 Siemens Aktiengesellschaft Semiconductor component with passivated semiconductor body
EP0030273A2 (en) * 1979-11-07 1981-06-17 Siemens Aktiengesellschaft Semiconductor component having a protection ring
EP0075892A2 (en) * 1981-09-25 1983-04-06 Siemens Aktiengesellschaft Integrated semiconductor circuit with a semi-insulating semiconductor layer

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2376513A1 (en) * 1976-12-31 1978-07-28 Radiotechnique Compelec SEMICONDUCTOR DEVICE EQUIPPED WITH A PROTECTIVE FILM

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR805066A (en) * 1935-08-02 1936-11-10 Device for the production of deposits by sublimation in vacuum
DE895199C (en) * 1945-04-19 1953-11-02 Telefunken Gmbh Contact detector
US2789258A (en) * 1955-06-29 1957-04-16 Raytheon Mfg Co Intrinsic coatings for semiconductor junctions
DE1037016B (en) * 1956-12-06 1958-08-21 Rca Corp Semiconductor devices such as transistors, alloy diodes or the like and methods for their manufacture
DE1057207B (en) * 1956-05-31 1959-05-14 Siemens Ag Process for the production of semiconductor layers, in particular for Hall generators
DE1077500B (en) * 1957-03-07 1960-03-10 Degussa Process for coating metals, in particular base metals, with a solder

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR805066A (en) * 1935-08-02 1936-11-10 Device for the production of deposits by sublimation in vacuum
DE895199C (en) * 1945-04-19 1953-11-02 Telefunken Gmbh Contact detector
US2789258A (en) * 1955-06-29 1957-04-16 Raytheon Mfg Co Intrinsic coatings for semiconductor junctions
DE1057207B (en) * 1956-05-31 1959-05-14 Siemens Ag Process for the production of semiconductor layers, in particular for Hall generators
DE1037016B (en) * 1956-12-06 1958-08-21 Rca Corp Semiconductor devices such as transistors, alloy diodes or the like and methods for their manufacture
DE1077500B (en) * 1957-03-07 1960-03-10 Degussa Process for coating metals, in particular base metals, with a solder

Cited By (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE1589886B1 (en) * 1966-03-23 1972-05-31 Hitachi Ltd SEMICONDUCTOR COMPONENT WITH SURFACE COATING AND METHOD FOR ITS MANUFACTURING
DE2547304A1 (en) * 1974-10-26 1976-04-29 Sony Corp SEMICONDUCTOR COMPONENT AND METHOD FOR ITS PRODUCTION
DE2618733A1 (en) * 1975-04-30 1976-11-11 Sony Corp SEMICONDUCTOR COMPONENT WITH HETEROUE TRANSITION
DE2655341A1 (en) * 1975-12-19 1977-06-30 Philips Nv SEMICONDUCTOR ARRANGEMENT WITH PASSIVATED SURFACE AND METHOD FOR MANUFACTURING THIS ARRANGEMENT
FR2359510A1 (en) * 1976-07-20 1978-02-17 Siemens Ag SEMICONDUCTOR COMPONENT CONTAINING A PROTECTIVE LAYER ACHIEVING A PASSIVATION
DE2821539A1 (en) * 1977-05-18 1978-11-23 Eastman Kodak Co METHOD FOR MANUFACTURING SEMICONDUCTOR COMPONENTS
EP0008406A1 (en) * 1978-08-23 1980-03-05 Siemens Aktiengesellschaft Method for producing a passivating layer on a silicon semiconductor body
EP0019887A1 (en) * 1979-05-30 1980-12-10 Siemens Aktiengesellschaft Semiconductor component with passivated semiconductor body
EP0030273A2 (en) * 1979-11-07 1981-06-17 Siemens Aktiengesellschaft Semiconductor component having a protection ring
EP0030273A3 (en) * 1979-11-07 1982-06-30 Siemens Aktiengesellschaft Semiconductor component having a protection ring
EP0075892A2 (en) * 1981-09-25 1983-04-06 Siemens Aktiengesellschaft Integrated semiconductor circuit with a semi-insulating semiconductor layer
EP0075892A3 (en) * 1981-09-25 1984-11-28 Siemens Aktiengesellschaft Integrated semiconductor circuit with a semi-insulating semiconductor layer

Also Published As

Publication number Publication date
FR1280466A (en) 1961-12-29
DE1184178B (en) 1964-12-23
GB954915A (en) 1964-04-08

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