DE1147270B - Circuit arrangement for group dialers in telecommunications systems, in particular for directional dialers in telephone systems - Google Patents

Description

The patent application S68247 Villa / 21 a ³ relates to a circuit arrangement for group dialers consisting of multi-stage switching fields in telephone systems, especially for directional dialers in telephone systems where an incoming line on which there is a request for through-connection is via the corresponding input to the first Coupling stage with a free intermediate line and via this - possibly also via further coupling stages and free intermediate lines - with a free output of the last coupling stage belonging to the selected direction, in which the outputs according to the coordinate structure of a coupling stage each have a horizontal or vertical one Series of crosspoints existing output groups are summarized and directions are wholly or partially formed only by a subgroup of outputs of an output group and / or by several output groups, optionally together with a subgroup, and at to which a group test switch is assigned jointly to all outputs of an output group or, in the case of output groups divided into subgroups, to all outputs of a subgroup to determine and mark the presence of free usable outputs in a desired and correspondingly marked direction, and a chain connection of all group test switches belonging to a desired direction in the circuits for initiation the determination of a free exit to be used.

In systems of this type, the response time of the group selector made up of multi-level switching networks compared to other arrangements about the response time of the group test relays required here extended.

The object of the invention is to address this disadvantage in an expedient development of the patent mentioned to avoid. This is achieved by the fact that one of each electronic group test switching means Test switching means constructed AND gate, a blocking gate and a flip-flop are connected so that at the inputs of both gates the test potential on the one hand and the directional marking on the other is effective, so that by the flip-flop connected downstream of the AND gate when free at least of a usable output in a group or subgroup and with appropriate directional identification the circuits to initiate the determination of a free exit in this group or Subgroup are activated, while via the locking gate when all outputs are occupied in Circuit arrangement for group selector

in telecommunications systems,

especially for direction selectors

in telephone systems

Addition to patent application S 68247 VIII a / 21 a ^{: 1}
(Interpretation document 1 142 636)

Applicant:

Siemens & Halske Aktiengesellschaft,

Berlin and Munich,
Munich 2, Witteisbacherplatz 2

Dipl.-Ing. Friedrich Licht, Munich,

and Dipl.-Ing. Swan Bing Han, Munich-Solln,

have been named as inventors

one group or subgroup an overflow in a second group or subgroup in the same direction or an additional direction marking corresponding to a detour direction carried out and / or a busy signal is triggered.

With the invention it is possible to keep the time for the required group examination to a minimum to belittle. Since the group test switching means are generally centrally located in a marker or a Adjusting device are arranged, is the effort required for them in terms of time savings irrelevant. The special switching of the group test switching means enables simple control the circuits to be switched for the subsequent individual test depending on the selected Direction and the free outputs in this direction.

An exemplary embodiment of the invention is shown in the figures.

Fig. 1 shows an overview circuit diagram of a direction selector designed according to the invention, while in

Fig. 2 shows the individual switching elements of two group test switching means.

309 550/82

With reference to FIG. 1, the structure and the mode of operation of the direction selector RW will first be described below.

Input circuits ES1, £ 510, in which the wires el, dl, el or clO, dlO, elO of incoming lines end, are assigned to the direction selector or coupling network Ä W. Input separation takes place via a rectifier 1, 2 or 3, 4 and in pairs via a contact 5 eel or 6eel of the relays CEl, CElO which are arranged in the input circuits ES1 and ESlO and fulfill the functions of occupancy and / or through-switch relays, ie the determination and marking of one and only one incoming line on which there is a request for through-connection. For this purpose, relays El, ElO are assigned to the switching network, which are in a preferential chain, so that only one relay can be effective at a time.

If, for example, the relay El is energized via the wire dl or el, it actuates its contacts 7el, 8el, among other things. By opening the contact 7el, the response circuit of all relays downstream in the chain, z. B. the response circuit of the relay E10, interrupted, and a holding circuit for the relay El is closed via the contact 8el. The relay El marks the input to which the input circuit ESl is assigned, as an input in the call state, namely as a single input of several, z. B. ten entrances. Another input elimination is caused by the relay GE1 to GE 3, which z. B. make a selection - one input of thirty - and a frame, which serves for example thirty incoming lines, are jointly assigned and arranged in a connection set A. The contact 9el indicates that it is an input into the switching matrix RW and thus an input of the first group of ten inputs, for example. The relay GE 1 assigned to this first of three groups of ten is accordingly excited via contact 9el, which with its contact 10 gel interrupts the circuit of all downstream relays GE and with its contact 11 gel closes a self-holding circuit. The wire dl is thus connected via contacts 12el, 13gel to a relay Kl of a corrector Ul and the wire el is connected to a relay K 2 of a corrector U 2 via contacts 14el, 15gel.

Depending on which corrector already has a position upstream of the input circuit ES1 for the direction evaluation, e.g. B. in another way, has been claimed, or depending on which corrector is used in this switching state, is from the upstream point ground potential on the wire dl or on the wire el. While it is for the response of the first It was irrelevant which of the control cores is grounded at the input elimination relay, so for the assignment of one of the correctors Ul, Ul with the connection of the earth potential to a certain core, the order is given that a certain corrector is to be assigned.

Assuming that in the case under consideration there is earth potential on the wire dl, the relay Kl of the corrector Ul is energized if the relay K 2 was not energized at the same time and the contact 16 £ 2 was open. With contact 17 kl the relay Kl is placed in a holding circuit independent of the contact 16 k 2, and with contact 18 kl the response circuit for the relay Kl is interrupted.

After the input dropout has ended, it is determined in the exemplary embodiment which intermediate lines are free between the switching stage O1 and the switching stage KSl of the switching network RW . The state of the intermediate lines is marked in the coupling matrix itself by means of the intermediate line relays. The contacts 21 eil and / or 22c / 18 of intermediate line relays free intermediate lines are closed, so that after the relay GEl responds and the contacts 19gel and 20gel close, the relays Fl and / or F18 associated with several switching fields are excited.

Assuming that the intermediate lines ZLl and ZL 18 indicated in the figure are free, the resistors WIjO, WlOjI, WlOiI are connected via rectifiers 23, 24, 25 and 26 and the contacts 27/1, 28/1, 29/18, 30/18 and contacts 31 * 1

ao to 33 * 1 on the test wheels of the outputs from the switching matrix RW and thus via a quadruple circuit on the test wires of the outgoing lines. Thus, the resistors Wl / 0 and WWfI or WlOjI on the one hand and the windings of the BeI-

supply relays CA 1/1 and CA 1/18, CA 10/1 or CA 10/18 on the other hand voltage divider formed , on the other hand, is effective in the busy state. Thus, there are formed, depending on the state of outgoing lines different potentials at the taps 81, 82 and 83 of the voltage divider formed to which the Grappeaprüfschaltmittel are turned on, consisting of each an AND gate U 1/0, 10/1 or U J710 / 2, each iron barrier gate S1 / 0, S10 / 1 or S10 / 2 and one toggle switch Af 1/0, M 10/1 or Af 10/2.

It should now be assumed in the following that the outputs AG 1/1 and AG 1/18 of the first output group and the outputs AGlOjI, ... of a first subgroup of the tenth output group have access to lines in a first, and that the outputs. .., AG 10/18 of a second subgroup of the tenth output group have access to lines in a second direction. Correspondingly, separate group test switching means are assigned to the subgroups of the outputs of the tenth initial group.

The desired direction is already stored in the corrector on a path that is not to be considered here in greater detail and is marked by contacts 40ril and 42π 2. Assuming that said second direction is the desired direction, contact 42 ri 1 is closed. On the further assumption that the output AG 10/18 of the second subgroup of outputs of the tenth output group, which corresponds to the second direction, is free, the flip-flop M 10/2 can, as will be explained in more detail with reference to FIG address via and the and-oatter U10 / 1 in the effect of the potential at point 83. This means that the free output AG 10/18 enC-

speaking coupling relay B 10/18 of the second coupling stage KSl energized. In its circuit there are fine contacts47c / 18, 48gel, 49 * 1, 50h-, denea e.g. contacts 54c / 17, 51 gel, 52 * 1 and 53 w eat-

5 6

talk about the further, free intermediate lines S10 / 1 and the AND gate t / 10/2 influenced. the

corresponding Koppelerlais, z. B. B 10/17, excited testing and switching through a detour connection

will. only takes up one time, that of time

In order to now make a further selection from those already corresponding to that which would have been necessary anyway for a direct connection through the free circuit coupled with the free intermediate lines. To be able to take outputs, are preliminarily has particular outputs of the flip-flops PrüfschaltmittelFl to P18, which may, if necessary tronic switching elements can be constructed also of elec- Ml / 10, M 10/1 and M10 / 2, a special program control annealed in all intermediate lines through contacts 60gel, to initiate additional control processes. 62 kl, 61 gel, 63 kl switched on. The test switching io This program control can, among other things, respond by means of free intermediate lines, which are connected to the issue of busy signal outputs with free off in busy cases, each of which is triggered if such a non-speaking device blocks the other test switching means . Since there is no output in the direction connected to the output of the blocking gate L 10/2 via the intermediate line ZL1, switching operations for suppression can be achieved and accordingly, or conversion or there can be no free output when the transition from speaking to the intermediate line If one system is required, is or can be connected to another system, the test switching means P1 remains at rest according to the output group and direction. The test switch- special system-related signaling causes P18 to speak against it among those to be considered.

Prerequisites, if it has not been through a previously 20 In FIG. 2, the details of the to the

addressed test switching means, the group test switch connected to outputs points 81 and 83

the desired direction is checked, what is shown is blocked. Each basic test switch is

should not be accepted here. At the same time there is eight transistors Γ11 to Γ18 or Γ 31

a relay W is switched on, its contacts up to Γ 38, each with a locking gate, an AND gate and

5Ow, 53 w in the circuits of all activated 25 a flip-flop form. To complete

Coupling relay of the coupling stage KSl opens after the occupancy relays are also in the circuits

Depending on the test switching means P18, a hold CA 1/1, CA 1/18, CA 10/1 and CA 10/18 of FIG. 1

Circuit for the coupling relay B 10/18 effective also shown in FIG. Furthermore, for the description

has been, so that except for the relay B 10/18 all for the practice of overflow from the first direction, their

In preparation for this connection circuit, 30 lines, as assumed, energized the occupancy relays

Coupling relays of the second coupling stage in the rest position CA 111, CA 1/18 and CA ίθ / l belong to their

to return. second direction, whose lines among other things

In a re-checking process, a re-checking relay CA 10/18 is listened to, which is sent to point 82

switching means or a blocking gate S 10/1 connected downstream of the test switching means indicated,

netes relay energized, which via its contact 69 ph 35 As in the arrangement according to FIG. 1, so are

and the contact 70 el the eliminated also in the arrangement according to FIG. 2 after closing

Input and the intermediate line ZL 18 or contacts 31 k 1, 32 kl and 33 k 1 are the inputs

speaking coupling relays A 1/18 of the first coupling or group test switching means at points 81, 82

level KSl energized. After the response of the head and 83 of voltage dividers, which on the one hand by the

pelrelais A 1/18 is via the contacts 71 a 1/18, 40 already mentioned occupancy relays of the outputs resp.

72 b 10/18 and further contacts on the corresponding outgoing lines and on the other hand through the

the desired connection resistors W 1/0, W 10/1, WlO / 2 are formed at the coupling points,

switched through. wherein in the embodiment according to FIG

Assuming that not the second in the branch of the voltage divider, which contains the BeIe direction, but the first direction is the desired 45 gungsielais, in series with this one more direction, the resistor 101 is used instead of the contact 42 ri 2 , 102 and 103 respectively. Contact 40nl closed. Are then in the off Assuming that all the Begangsgruppe shown, which are free as the Gruppenprüfschaltmittel legungsrelais respective outputs respectively from AND gate UlIQ, the locking gate 51/0 and the continuous lines, occurs on the then-flop M 1/0 is assigned, free outputs 50 low-resistance windings of the occupancy relays are available, the coupling points 81 and 83 are switched on to a potential that the transistors I'll and Γ31 blocked in the relay of the second coupling stage via the idle contacts 40nl, the AND gate U 1/0 and the flip-flop unlocked, so that the permeable in the idle state M 1/0. If, on the other hand, neither in the output group, transistors Γ12 and Γ 32 are blocked by potential differentiators as group test switching means, the AND gate 55 exercise in the output circuit of the transistors Γ11 and t / 1/0, the blocking gate 51/0 and the flip-flop Γ 31 are blocked, thus also the Transistors M 1/0 are assigned, and are still blocked in the subgroup, Γ13 and Γ 33, since the emitter-collector order as a group test switch, the AND gate routes the transistors T12 and T 32 through potential U 10/1, the SpergatterSlO / 1 and the flip-flop in the output circuit of the transistors M 10/1 are assigned, and therefore no 60 TIl and Γ 31 are blocked at all, which means that the outputs belonging to the first direction are also free, so transistors Γ13 and Γ 33 are blocked because the must the connection via a detour, z. B. in the emitter-collector paths of the transistors T 12, second direction, can be controlled. In this case Γ13 or T32, T33 are connected in series. can, similarly as described above, e.g. B. the coupling Assuming that the first direction will be energized as relay B 10/18 after the toggle switch 65 marked the selected direction and thus the contact deviceAflO / 2 became effective. This is namely 40; 71 is closed, is blocked in the idle state under the circumstances described via the Kon- tende transistor Γ14, while the Trantakt 40 Wl, the blocking gate 51/0, the blocking gate sistorJ34 remains unlocked. With the one described

»5

State of the transistors Γ13 and Γ14, the transistor Γ15, whose collector forms the output of the AND gate UIjO (Fig. 1), is conductive and the transistor T 16 is blocked, which together with the transistors Γ17 and Γ18, which become permeable, the flip-flop S1 / 0 forms. The coupling relays of the second coupling stage KS 2 (Fig. 1) are then excited via the transistor Γ18 and the contact 43 kl , the coupling points of which are denoted in Fig. 1 with b 1/1 to b 1/18, so that the individual line test, that is, the test for a free outgoing line in the first output group, characterized by the upper horizontal crosspoint row of the second switching stage KS 2 (Fig. 1), can follow, in the course of which, as described, one and only one free outgoing line to be occupied is determined will. At the same time, the toggle switches of all other group test switching means are blocked via the multiple point 105 so that no further coupling relays can be effectively excited for the individual test. The purpose of this very essential blocking of all flip-flops that have not been addressed will be explained in more detail later.

Assuming that the outputs accessible via the first horizontal crosspoint row of the second coupling stage KS 2 (Fig. 1) are all occupied before the group test begins, the motion relay CA 1/1 to CA is formed at point 81 as a result of the then high-resistance windings 1/18 a potential that prevents a change in state of the transistors T 11 and T12, so that the transistor Γ12 remains conductive. If in this case the first direction is marked as the selected direction via the contact 40/71, when the transistor T14 is blocked, the transistor T 13 becomes conductive, the collector of which forms the output of the blocking gate S 1/0 (FIG. 1). This causes the overflow to the first subgroup of the second or last row of crosspoints shown in FIG. 1, via which, as originally assumed, lines in the first direction are also determined.

If these outgoing lines which can be reached via the first subgroup of the second or last crosspoint row of the switching stage (Fig. 1) are all occupied, a potential also occurs at point 82 which blocks the transistor of the second group test switch corresponding to transistor Γ11, so that a potential also occurs at the output of the blocking gate S 10/1, which causes the overflow to the second subgroup of the corresponding crosspoint row by simulating a directional marking there, which is made via the contact 42 ri 2 . The transistor 34 is blocked and there, assuming that outgoing lines are free in this second subgroup, the transistor Γ 33, as described, blocks, the transistor Γ 33 is conductive, so that at its collector, which the output of the And gate [7/2 forms, a potential occurs which causes the flip-flop formed from the transistors Γ 36 and Γ 37 to tilt, so that the transistor 7 "38 becomes conductive. Via this and the contact 46 kl , the coupling relays become B 10/17, B 10/18 of the second subgroup of the last horizontal row of crosspoints are excited and the crosspoints for the individual line test are switched through.

At the same time, as already indicated for the flip-flop circuit consisting of the transistors 16 and Γ17, all other flip-flops are blocked here via the multiple point 106. This prevents that when an outgoing line becomes free in a group or subgroup upstream in the overflow direction, a second group marking can be caused by tilting the toggle stage assigned to this group or subgroup. The potential occurring at point 106 thus creates a potential at the base of transistor Γ17 which in any case prevents transistor TIf from becoming conductive itself after transistors 37 and Γ 38 have become conductive.

It should also be mentioned here that each toggle switch also locks itself after it has been toggled via point 107 or 108, so that tilting back is connected. This could e.g. B. occur when after flipping the flip-flop consisting of the transistors Γ16 and Γ17 Af1 / 0 (Fig. 1) by a parallel testing marker or corrector XJ 2 (Fig. 1) just the last free line of the first horizontal crosspoint row, the the flip-flop Af 1/0 (Fig. 1) is assigned, is proven by individual line testing. The transistor T 16 remains blocked in this case, although the transistor T1 $ is blocked. At the output of the blocking gate S 1 / β (collector of the transistor Γ13) a potential corresponding to the overflow occurs, but this cannot take effect because all other flip-flops are also blocked.

The rectifiers U1 to 118 shown in FIG. 2 form overvoltage protection for the transistors Γ11, Γ31, Γ18 and Γ38. The also shown Zener diodes 121 to 126 are used for voltage translation and allow the transistors of each group test switch with only one to operate a small number of partial voltages of a voltage source. You're at another Wall's Partial voltages are not required and have therefore not been special when describing the circuit mentioned.

It should now be pointed out that ζ. Β. the zener diode 123 is always permeable or works in the breakthrough when the transistor Γ13 is blocked, and that it is always blocked when the transistor Γ15 conducts.

The introduction of the resistors 101 to 103 in the input voltage divider of the group test switch enables the input to be switched to such a high resistance that an occupancy relay can hold a The line that becomes free during the group test is not possible via the voltage divider resistors so that this triggering or triggered line is then used as a free line for the individual line test is available.

At the outputs of the locking gates that are assigned to the groups or subgroups of which no or no further overflow is possible, switching means can be provided which are busy of all outputs of the tested group or subgroup of outputs a busy signal to the calling party or switch on the requesting line.

Claims (3)

PATENT CLAIMS: 1. Circuit arrangement for group selector consisting of multi-stage switching matrices in Telecommunication systems, especially for directional dialers in telephone systems, where another 35 40 45 55 incoming line on which there is a request for through-connection, via the corresponding input to the first coupling stage with a free intermediate line and via this - possibly also via further coupling stages and free intermediate lines - with a free output belonging to the selected direction of the last coupling stage where the outputs are grouped according to the coordinate structure of a coupling stage in output groups each consisting of a horizontal or vertical row of coupling points and directions are wholly or partially only through a subgroup of outputs of an output group and / or through several output groups, possibly together with one Subgroups, are formed, and for the determination and marking of the presence of free usable exits in a desired and correspondingly marked direction of all exits of an output group or in the case of output groups divided into subgroups A group test switch is assigned to all outputs of a subgroup and a chain connection of all group test switches belonging to a desired direction is located in the circuits to initiate the determination of a free, usable output, according to patent application S 68247 VIII a / 21a ³ , characterized in that as group test switch One AND gate each made up of electronic switching means (e.g. B. t / 1/0) a blocking gate (z. B. S1 / 0) and a flip-flop (z. B. Ml / 0) are connected so that the test potential on the one hand and the directional marking on the other hand is effective at the inputs of both gates so that through the flip-flop (Ml / 0) downstream of the AND gate (£ / 1/0) when at least one usable output in a group or subgroup is free and with appropriate directional identification, the circuits to initiate the determination of a free output in this group Group or subgroup are effectively switched, while the blocking gate (51 0) when all outputs in a group or subgroup are occupied, an additional direction marking corresponding to the overflow into a second group or subgroup in the same direction or a detour direction is carried out and / or a busy signal is initiated . 2. Circuit arrangement according to claim 1, characterized in that the flip-flops (z. B. Ml / 0) of all group test switch means are designed and wired to each other that they lock themselves when they respond and all other flip-flops (M 10/1, M 10/2) . 3. Circuit arrangement according to claim 1 or 2, characterized in that the gates (z. B. U 1/0, S1 / 0) of each group test switch are connected to a voltage divider which is generated by the winding of the occupancy relay (z. B. CA 1 / 1, CA 1/18) of the outputs of a group or subgroup and is formed by resistors in series with these windings (e.g. ohmic resistors 101 and WIO) which are so high that an occupancy relay (e.g. CA 1/1) of an output (AG 1/1) that becomes free during the group test remains ineffectively energized via the voltage divider formed for the group test. For this purpose 2 sheets of drawings © 309 550/82 4.