DE1135105B - Process for the production of selenium rectifiers with two selenium layers - Google Patents
Process for the production of selenium rectifiers with two selenium layersInfo
- Publication number
- DE1135105B DE1135105B DEI15905A DEI0015905A DE1135105B DE 1135105 B DE1135105 B DE 1135105B DE I15905 A DEI15905 A DE I15905A DE I0015905 A DEI0015905 A DE I0015905A DE 1135105 B DE1135105 B DE 1135105B
- Authority
- DE
- Germany
- Prior art keywords
- selenium
- layer
- amorphous
- crystalline
- rectifier
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
- H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
- H01L21/108—Provision of discrete insulating layers, i.e. non-genetic barrier layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02425—Conductive materials, e.g. metallic silicides
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02491—Conductive materials
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/02631—Physical deposition at reduced pressure, e.g. MBE, sputtering, evaporation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02656—Special treatments
- H01L21/02664—Aftertreatments
- H01L21/02667—Crystallisation or recrystallisation of non-monocrystalline semiconductor materials, e.g. regrowth
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/06—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising selenium or tellurium in uncombined form other than as impurities in semiconductor bodies of other materials
- H01L21/10—Preliminary treatment of the selenium or tellurium, its application to the foundation plate, or the subsequent treatment of the combination
Description
DEUTSCHESGERMAN
PATENTAMTPATENT OFFICE
I15905VIIIc/21gI15905VIIIc / 21g
ANMELDETAG: 16. J A N U A R 1959 REGISTRATION DATE: 16. J A N UA R 1959
BEKANNTMACHUNG DER ANMELDUNG UNDAUSGABE DER AUSLEGESCHRIFT: 23. AU G U S T 1962NOTICE THE REGISTRATION AND ISSUE OF EDITORIAL: AUG U S T 23, 1962
Die Erfindung betrifft ein Verfahren zur Herstellung von Selengleichrichtern, bei dem auf die Grundplatte nacheinander zwei Selenschichten aufgebracht werden und nach dem Aufbringen der Deckelektrode die Gleichrichterplatte einer Wärmebehandlung unterworfen wird.The invention relates to a method for the production of selenium rectifiers, in which on the Two selenium layers are applied one after the other to the base plate and after the application of the Cover electrode the rectifier plate is subjected to a heat treatment.
Charakteristisch für Selengleichrichter sind im allgemeinen der Widerstand in Durchlaßrichtung sowie der Widerstand in Sperrichtung, der durch die Sperrspannung gekennzeichnet wird. Bei einem Selengleichrichter für beispielsweise 26 Volt fließt bei einer Spannung von 26VoIt kein merklicher Strom in Sperrichtung. Wird eine höhere Spannung in Sperrrichtung angelegt, fließt ein merklicher Strom durch den Gleichrichter. Im Idealfall soll ein Gleichrichter einen unendlichen Widerstand in Sperrichtung und den Widerstand Null in Durchlaßrichtung haben. In der Praxis kann dies nicht erreicht werden, weil die Stoffe, welche einen hohen Sperrwiderstand haben, meist einen merklichen Widerstand in Durchlaßrichtung aufweisen.Characteristic of selenium rectifiers are generally the resistance in the forward direction as well the reverse resistance, which is characterized by the reverse voltage. With a selenium rectifier For example, for 26 volts, no noticeable current flows in at a voltage of 26VoIt Blocking direction. If a higher voltage is applied in the reverse direction, a noticeable current flows through it the rectifier. Ideally, a rectifier should have an infinite reverse and reverse resistance have zero resistance in the forward direction. In practice this cannot be achieved because the Substances that have a high blocking resistance, usually a noticeable resistance in the forward direction exhibit.
Im allgemeinen sind die spezifischen Widerstände der metallischen Grundplatte und der Deckelektrode genügend niedrig, so daß diese selbst keinen merklichen Widerstand haben. Der Widerstand des Gleichrichters wird hauptsächlich durch die Selenschicht, die Reaktionsschicht zwischen Deckelektrode und dem Selen und zu einem geringen Grade durch die Reaktionsschicht zwischen dem Selen und der Grundplatte hervorgerufen.In general, the resistivities of the metallic base plate and the top electrode are sufficiently low that they themselves have no noticeable resistance. The resistance of the rectifier is mainly caused by the selenium layer, the reaction layer between the cover electrode and the selenium and to a lesser extent through the reaction layer between the selenium and the base plate evoked.
In letzter Zeit führte sich die Aufdampftechnik zum Aufbringen des Selens auf die Grundplatte aus verschiedenen Gründen immer mehr ein. Bei dem bekannten Aufdampfverfahren wird das Selen auf eine Grundplatte aufgedampft, die eine Temperatur zwischen 140 und 170° C hat, wodurch das Selen in die graue oder kristalline Form umgewandelt wird. Das Selen wird danach einer Wärmebehandlung bei einer Temperatur von etwa 215° C unterworfen, und schließlich wird eine Deckelektrode auf die Selenschicht aufgebracht. Gleichrichterplatten, die nach diesem Verfahren hergestellt werden, haben vor der elektrischen Formierung einen sehr niedrigen Widerstand in Durchlaßrichtung im Vergleich zu denen, bei denen das Selen in anderer Weise aufgebracht wurde. Die Ursache für diesen niedrigen Widerstand in Durchlaßrichtung ist nicht genau bekannt, aber wahrscheinlich ist eine vorteilhafte Kristallorientierung für die gute Leitfähigkeit verantwortlich. Während des elektrischen Formierprozesses steigt jedoch der Widerstand in Durchlaßrichtung, um 30 bis 100°/» an. Dieser Anstieg des Durchlaß-Verfahren zur Herstellung von Selengleichrichtern mit zwei SelenschichtenLately, the vapor deposition technique has been used to apply the selenium to the base plate for various reasons. In the known evaporation process, the selenium is on a base plate is vapor-deposited, which has a temperature between 140 and 170 ° C, whereby the Selenium is converted into the gray or crystalline form. The selenium then undergoes a heat treatment at a temperature of about 215 ° C, and finally a cover electrode is applied the selenium layer applied. Rectifier plates made by this process have before the electrical formation has a very low resistance in the forward direction compared to those where the selenium was applied in a different way. The cause of this low Forward resistance is not known exactly, but a favorable crystal orientation is likely responsible for good conductivity. During the electrical forming process however, the resistance in the forward direction increases by 30 to 100 ° / ». This increase in the passage method for the production of selenium rectifiers with two selenium layers
Anmelder:Applicant:
International Standard Electric Corporation, New York, N. Y. (V. St. A.)International Standard Electric Corporation, New York, N.Y. (V. St. A.)
Vertreter: Dipl.-Ing. H. Ciaessen, Patentanwalt, Stuttgart-Zuffenhausen, Hellmuth-Hirth-Str. 42Representative: Dipl.-Ing. H. Ciaessen, patent attorney, Stuttgart-Zuffenhausen, Hellmuth-Hirth-Str. 42
Beanspruchte Priorität: V. St. v. Amerika vom 27. Januar 1958 (Nr. 711 332)Claimed priority: V. St. v. America January 27, 1958 (No. 711 332)
William Lewanda, Fairlawn, N. J., und Howard Klein, Maywood, N. J. (V. St. A.), sind als Erfinder genannt wordenWilliam Lewanda, Fairlawn, N.J., and Howard Klein, Maywood, N.J. (V. St. A.), have been named as inventors
Widerstandes ist natürlich sehr unerwünscht. Die Ursache für das Ansteigen des Widerstandes ist nicht genau bekannt, es wurde jedoch gefunden, daß dies mit der Reaktion zwischen dem grauen Selen und der Deckelektrode zusammenhängt.Resistance is of course very undesirable. The cause of the increase in resistance is not exactly known, but it has been found that this is due to the reaction between the gray selenium and the Cover electrode related.
Da die Gleichrichterplatte kurz vor der elektrischen Formierung einen genügend niedrigen Widerstand hat und im allgemeinen besser ist als Platten, die nach einem anderen Verfahren hergestellt wurden, wurde versucht, die weiteren Verfahrensschritte dieses Verfahrens so abzuwandeln, daß der Durchlaßwiderstand der Platte nicht ansteigt.Because the rectifier plate has a sufficiently low resistance shortly before the electrical formation and is generally better than panels made by another process tried to modify the further steps of this process so that the forward resistance the plate does not rise.
Eine bekannte Abwandlung des beschriebenen Verfahrens, bei der eine Platte erhalten wird, deren Widerstand in Durchlaßrichtung während der Formierung nicht ansteigt, besteht darin, das Selen in schwarzer oder amorpher Form auf der Grundplatte niederzuschlagen, danach die Deckelektrode aufzubringen und eine Wärmebehandlung bei 215° C durchzuführen. Durch diese Wärmebehandlung wird das schwarze Selen in die graue Form umgewandelt und die Deckelektrode geschmolzen. Bei diesem abgewandelten Verfahren wird deshalb amorphes Selen verwendet, weil dadurch die Eigenschaften bezüglich der elektrischen Formierung weit besser sind als beim grauen Selen. Jedoch hat das Selen, das in amorpher Form aufgebracht wird, einen um 30 bis 100% höheren Durchlaßwiderstand vor und nach derA known modification of the method described, in which a plate is obtained, whose Resistance in the forward direction does not increase during formation, is the selenium in black or amorphous form on the base plate, then apply the cover electrode and perform a heat treatment at 215 ° C. Through this heat treatment, the black selenium is converted into the gray form and the top electrode is melted. With this one Amorphous selenium is used in a modified process because it improves its properties electrical formation are far better than gray selenium. However, the selenium found in amorphous form is applied, a 30 to 100% higher forward resistance before and after
209 637/359209 637/359
Claims (3)
Deutsche Patentschriften Nr. 908 043, 971 615,
733, 921 095;Considered publications:
German patents nos. 908 043, 971 615,
733, 921 095;
USA.-Patentschrift Nr. 2476 042;
österreichische Patentschrift Nr. 155 590;
F. I. A. T. Final Report Nr. 706 vom 26. 1. 1946, S. 20. ίο German interpretative document S 35820 VIIIc / 21g (published on July 12, 1956);
U.S. Patent No. 2,476,042;
Austrian Patent No. 155 590;
FIAT Final Report No. 706 of January 26, 1946, p. 20.
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US71133258A | 1958-01-27 | 1958-01-27 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE1135105B true DE1135105B (en) | 1962-08-23 |
Family
ID=24857665
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DEI15905A Pending DE1135105B (en) | 1958-01-27 | 1959-01-16 | Process for the production of selenium rectifiers with two selenium layers |
Country Status (2)
Country | Link |
---|---|
DE (1) | DE1135105B (en) |
GB (1) | GB830027A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1238575B (en) * | 1964-06-12 | 1967-04-13 | Standard Elek K Lorenz Ag | Selenium rectifier |
Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT155590B (en) * | 1936-06-22 | 1939-02-25 | Aeg | Dry plate rectifier. |
US2476042A (en) * | 1946-12-26 | 1949-07-12 | Gen Electric | Selenium rectifier and process of fabrication |
DE908043C (en) * | 1943-02-03 | 1954-04-01 | Siemens Ag | Process for the production of selenium rectifiers, preferably those with light metal carrier electrodes |
DE921095C (en) * | 1951-10-29 | 1954-12-09 | Int Standard Electric Corp | Selenium rectifier |
DE961733C (en) * | 1939-01-17 | 1957-04-11 | Aeg | Process for producing electrically asymmetrically conductive elements with a semiconductor such as selenium |
DE971615C (en) * | 1948-10-01 | 1959-02-26 | Siemens Ag | Process for the manufacture of dry selenium rectifiers |
-
1958
- 1958-07-17 GB GB22926/58A patent/GB830027A/en not_active Expired
-
1959
- 1959-01-16 DE DEI15905A patent/DE1135105B/en active Pending
Patent Citations (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
AT155590B (en) * | 1936-06-22 | 1939-02-25 | Aeg | Dry plate rectifier. |
DE961733C (en) * | 1939-01-17 | 1957-04-11 | Aeg | Process for producing electrically asymmetrically conductive elements with a semiconductor such as selenium |
DE908043C (en) * | 1943-02-03 | 1954-04-01 | Siemens Ag | Process for the production of selenium rectifiers, preferably those with light metal carrier electrodes |
US2476042A (en) * | 1946-12-26 | 1949-07-12 | Gen Electric | Selenium rectifier and process of fabrication |
DE971615C (en) * | 1948-10-01 | 1959-02-26 | Siemens Ag | Process for the manufacture of dry selenium rectifiers |
DE921095C (en) * | 1951-10-29 | 1954-12-09 | Int Standard Electric Corp | Selenium rectifier |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1238575B (en) * | 1964-06-12 | 1967-04-13 | Standard Elek K Lorenz Ag | Selenium rectifier |
Also Published As
Publication number | Publication date |
---|---|
GB830027A (en) | 1960-03-09 |
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