DE1132246B - Method for producing a semiconductor arrangement by melting an electrode onto a semiconductor body with a cavity - Google Patents
Method for producing a semiconductor arrangement by melting an electrode onto a semiconductor body with a cavityInfo
- Publication number
- DE1132246B DE1132246B DEN10641A DEN0010641A DE1132246B DE 1132246 B DE1132246 B DE 1132246B DE N10641 A DEN10641 A DE N10641A DE N0010641 A DEN0010641 A DE N0010641A DE 1132246 B DE1132246 B DE 1132246B
- Authority
- DE
- Germany
- Prior art keywords
- electrode
- cavity
- tube
- melting
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims description 9
- 238000002844 melting Methods 0.000 title claims description 6
- 230000008018 melting Effects 0.000 title claims description 6
- 238000004519 manufacturing process Methods 0.000 title claims description 5
- 239000007772 electrode material Substances 0.000 claims description 7
- 238000000034 method Methods 0.000 claims description 6
- 238000010438 heat treatment Methods 0.000 claims description 3
- 239000011819 refractory material Substances 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 2
- 239000011810 insulating material Substances 0.000 claims description 2
- 239000000155 melt Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 description 5
- 229910052751 metal Inorganic materials 0.000 description 4
- 239000002184 metal Substances 0.000 description 4
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 3
- 238000010276 construction Methods 0.000 description 2
- 239000013078 crystal Substances 0.000 description 2
- 229910052732 germanium Inorganic materials 0.000 description 2
- GNPVGFCGXDBREM-UHFFFAOYSA-N germanium atom Chemical compound [Ge] GNPVGFCGXDBREM-UHFFFAOYSA-N 0.000 description 2
- 239000010453 quartz Substances 0.000 description 2
- 238000005476 soldering Methods 0.000 description 2
- 229910000978 Pb alloy Inorganic materials 0.000 description 1
- 229910052787 antimony Inorganic materials 0.000 description 1
- WATWJIUSRGPENY-UHFFFAOYSA-N antimony atom Chemical compound [Sb] WATWJIUSRGPENY-UHFFFAOYSA-N 0.000 description 1
- 239000011230 binding agent Substances 0.000 description 1
- 239000006229 carbon black Substances 0.000 description 1
- 239000004020 conductor Substances 0.000 description 1
- 238000001816 cooling Methods 0.000 description 1
- 238000005553 drilling Methods 0.000 description 1
- 238000002474 experimental method Methods 0.000 description 1
- 230000002349 favourable effect Effects 0.000 description 1
- 239000000945 filler Substances 0.000 description 1
- 229910052738 indium Inorganic materials 0.000 description 1
- APFVFJFRJDLVQX-UHFFFAOYSA-N indium atom Chemical compound [In] APFVFJFRJDLVQX-UHFFFAOYSA-N 0.000 description 1
- WABPQHHGFIMREM-UHFFFAOYSA-N lead(0) Chemical compound [Pb] WABPQHHGFIMREM-UHFFFAOYSA-N 0.000 description 1
- 239000011368 organic material Substances 0.000 description 1
- 229920002050 silicone resin Polymers 0.000 description 1
- 239000007779 soft material Substances 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/24—Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/73—Bipolar junction transistors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Description
DEUTSCHESGERMAN
PATENTAMTPATENT OFFICE
N10641 Vfflc/21gN10641 Vfflc / 21g
ANMELDETAG: 14. MAI 1955REGISTRATION DATE: MAY 14, 1955
BEKANNTMACHUNG
DER ANMELDUNG
UNDAUSGABE DER
AUSLEGESCHRIFT: 28. JUNI 1962 NOTICE
THE REGISTRATION
AND ISSUE OF
EDITORIAL: JUNE 28, 1962
Die Erfindung bezieht sich auf ein Verfahren zum Herstellen einer Halbleiteranordnung, insbesondere eines Transistors, mit einem halbleitenden Körper, dessen Oberfläche mindestens eine Aushöhlung hat, in der eine aufgeschmolzene Elektrode angeordnet ist. s Manchmal sind zwei solche Aushöhlungen und Elektroden in einander entgegengesetzten Oberflächen vorhanden. Mit dieser Bauart soll ein niedriger Basiswiderstand erreicht werden, wie dies eingehend in der R. C. A. Review XIV (1951), Nr. 4, S. 586 bis 598, beschrieben worden ist.The invention relates to a method for producing a semiconductor arrangement, in particular a transistor, with a semiconducting body, the surface of which has at least one cavity, in which a fused electrode is arranged. s Sometimes there are two such cavities and electrodes present in opposing surfaces. With this type of construction, a low base resistance should be achieved can be achieved, as described in detail in the R. C. A. Review XIV (1951), No. 4, pp. 586 to 598, has been described.
Bei der Herstellung solcher Halbleiteranordnungen stößt man auf die Schwierigkeit, daß das in einer Aushöhlung angeordnete Elektrodenmaterial die Neigung hat, an den Seitenwänden der Aushöhlung emporzukriechen, wodurch die beabsichtigte günstige Form der Elektrode nicht erhalten wird.In the manufacture of such semiconductor devices one encounters the difficulty that the in one Electrode material arranged in the cavity has a tendency to creep up the side walls of the cavity, whereby the intended favorable shape of the electrode is not obtained.
Dieser Nachteil soll durch das Verfahren nach der Erfindung vermieden werden.This disadvantage is to be avoided by the method according to the invention.
Gemäß der Erfindung wird das Elektrodenmaterial in ein isolierendes Rohr aufgenommen und dann das Rohr mit dem Elektrodenmaterial gleichachsig in der Aushöhlung angeordnet und danach durch Erhitzen mit dem halbleitenden Körper verschmolzen. Vorzugsweise besteht das Rohr aus feuerfestem Material, wie beispielsweise Quarz. Unter feuerfestem Material ist im vorliegenden Fall ein Material mitzuverstehen, das sich bei der Aufschmelztemperatur, die beispielsweise 500° C, aber auch weniger sein kann, nicht Verfahren zum HerstellenAccording to the invention, the electrode material is received in an insulating tube and then the Tube with the electrode material arranged coaxially in the cavity and then by heating fused with the semiconducting body. The pipe is preferably made of refractory material, such as quartz. In the present case, refractory material is to be understood as including a material this is not the case at the melting temperature, which can be 500 ° C, for example, but also less Method of manufacture
einer Halbleiteranordnunga semiconductor device
durch Aufschmelzen einer Elektrodeby melting an electrode
auf einen Halbleiterkörperon a semiconductor body
mit einer Aushöhlungwith a hollow
Anmelder:Applicant:
N. V. Philips' Gloeilampenfabrieken,
Eindhoven (Niederlande)NV Philips' Gloeilampenfabrieken,
Eindhoven (Netherlands)
Vertreter: Dr. rer. nat. P. Roßbach, Patentanwalt,
Hamburg 1, Mönckebergstr. 7Representative: Dr. rer. nat. P. Roßbach, patent attorney,
Hamburg 1, Mönckebergstr. 7th
Beanspruchte Priorität:
Niederlande vom 18. Mai 1954 (Nr. 187 666)Claimed priority:
Netherlands of May 18, 1954 (No. 187 666)
Jan Coenraad van Vessem, Eindhoven (Niederlande), ist als Erfinder genannt wordenJan Coenraad van Vessem, Eindhoven (Netherlands), has been named as the inventor
dicken Germaniumscheibe, die aus einem Einkristall geschnitten ist. In der Oberfläche dieses Körpers ist
bei den Bauarten nach Fig. 1 bis 3 eine Aushöhlung 2 durch Ätzen oder Bohren hergestellt. Bei der Bauart
merkbar ändert. Das Rohr kann auch aus einem 30 nach Fig. 4 sind zwei Aushöhlungen 2 und 3 auf je
Stoff bestehen, der bei dem erwähnten Erhitzen ganz einer Seite des Körpers hergestellt,
oder teilweise verschwindet, beispielsweise einem In jeder Aushöhlung ist eine Elektrode 4 auf denthick germanium disk cut from a single crystal. In the types of construction according to FIGS. 1 to 3, a cavity 2 is made in the surface of this body by etching or drilling. Noticeably changes in design. The tube can also consist of a 30 according to FIG. 4, two cavities 2 and 3 on each material, which are produced on one side of the body during the aforementioned heating,
or partially disappears, for example one. In each cavity there is an electrode 4 on the
organischen Kunststoff, wie einem Silikonharz. Die halbleitenden Körper aufgeschmolzen. Zu diesem Verwendung der zuletzt erwähnten Stoffe hat den Zweck wird ein geeignetes Elektrodenmetall 5, bei-Vorteil, daß das Rohr beim Erstarren des Elektroden- 35 spielsweise Indium, wenn der Halbleiter aus n-leitenmaterials keine mechanische Spannungen und Stö- dem Germanium besteht, oder eine Antimon enthal-organic plastic, such as a silicone resin. The semiconducting body melted. To this The purpose of using the last-mentioned substances is to find a suitable electrode metal 5, if-advantage, that the tube when the electrode solidifies, for example indium, if the semiconductor is made of n-conductor material there is no mechanical stress or interference, or contains an antimony
rungen im Kristallgitter erzeugt. Wenn ein Stromzuführungsdraht an die aufgeschmolzene Elektrode angelötet werden muß, erfolgt dies zweckmäßig dann, wenn das Rohr das Elektrodenmaterial noch umgibt, denn dann besteht wenig oder gar keine Gefahr, daß dieses Material beim Löten zerfließt.in the crystal lattice. When a power lead wire to the fused electrode must be soldered on, this is expediently done when the tube still surrounds the electrode material, because then there is little or no risk of this material flowing away during soldering.
Die Erfindung wird an Hand einer Zeichnung näher erläutert, in der zwei Ausführungsbeispiele dargestellt sind.The invention is explained in more detail with reference to a drawing, in which two exemplary embodiments are shown are.
Die Fig. 1 bis 4 stellen Schnitte durch Transistoren in großem Maßstab dar, die gemäß dem Verfahren nach der Erfindung hergestellt sind.FIGS. 1 to 4 show sections through large-scale transistors made in accordance with the method are made according to the invention.
Fig. 5 zeigt ein isolierendes, mit Elektrodenmaterial gefülltes Rohr.Fig. 5 shows an insulating tube filled with electrode material.
Die Transistoren bestehen je aus einem halbleitentende Bleilegierung, wenn p-leitendes Germanium Verwendung findet, in einem isolierenden Rohr 6 angeordnet (Fig. 5).The transistors each consist of a semiconducting lead alloy, if p-conducting germanium Use is arranged in an insulating tube 6 (Fig. 5).
Danach wird das Rohr hi Stücke gesägt, wie dies schematisch durch Pfeile angegeben ist, wobei jedes Stück vorzugsweise so lang ist, daß es die richtige Metallmenge enthält. Wird die Länge zu groß bemessen, so hat das Metall beim Aufschmelzen auf den Halbleiter die Neigung, unter dem Rohr hindurchzufließen und dennoch an den Wänden der Aushöhlung 2 emporzukriechen; wird die Länge zu klein bemessen, so ist es schwierig, eine Zuleitung durch Löten an der Elektrode zu befestigen. Die richtige Länge kann aus Versuchen ermittelt werden, bei denen zugleich die Eigenschaften der angewandtenThereafter, the pipe is sawn hi pieces as indicated schematically by arrows, each Piece is preferably long enough to contain the correct amount of metal. If the length is too large, when it melts onto the semiconductor, the metal has a tendency to flow under the tube and yet crawl up the walls of cavity 2; If the length is too short, it is difficult to find a lead to be attached to the electrode by soldering. The correct length can be determined from experiments at which at the same time have the properties of the applied
den Körper I1 beispielsweise einer angenähert 100 μ Materialien berücksichtigt werden können, von denenthe body I 1, for example, an approximately 100 μ of materials can be taken into account, of which
209 617/315209 617/315
das Zerfließen der Elektrode mehr oder weniger abhängt. the flow of the electrode depends more or less.
Ein geringes Zerfließen, wie es in Fig. 2 dargestellt ist, braucht nicht immer Schwierigkeiten zu bereiten. Das Rohr 6 kann aus feuerfestem isolierendem Material, beispielsweise aus Quarzglas oder gesintertem Quarz bestehen. Nach dem Aufschmelzen bleibt es in seiner Lage um die Elektrode 4; es kann jedoch gewünschtenfalls weggeätzt werden. Es kann auch ein Rohr aus einem nicht feuerfesten, beispielsweise organischen Stoff Verwendung finden, das beispielsweise während des Aufschmelzens verkohlen kann und so noch hinreichenden Zusammenhang besitzt, um das Zerfließen des Elektrodenmetalls zu verhindern. Dies kann auch mittels der Kombination eines organischen Bindemittels und eines feuerfesten Füllstoffes erreicht werden. Die Anwendung eines solchen zeitweiligen Isolierrohres 7 ist in Fig. 3 durch gestrichelte Linien angegeben. Diese Anwendung kann dann vorteilhaft sein, wenn mechanische Spannungen beim Abkühlen tunlichst vermieden werden müssen. Wenn ein feuerfestes Rohr Verwendung findet, können diese Spannungen auch dadurch verringert werden, daß eine Schicht aus Ruß oder einem ähnlichen weichen Material im Rohr vorgesehen wird.A slight deliquescence, as shown in FIG. 2, does not always have to cause difficulties. The tube 6 can be made of refractory insulating material, for example made of quartz glass or sintered Made of quartz. After melting, it remains in its position around the electrode 4; however, it can if desired be etched away. It can also be a pipe made of a non-refractory, for example Find organic material use, which can, for example, char during melting and so still has sufficient cohesion to prevent the electrode metal from deliquescing. This can also be done by means of the combination of an organic binder and a refractory filler can be achieved. The use of such a temporary insulating tube 7 is shown in Fig. 3 by dashed lines Lines indicated. This application can be advantageous when there is mechanical stress must be avoided as much as possible when cooling down. If a refractory pipe is used, you can these stresses can also be reduced by applying a layer of carbon black or the like soft material is provided in the pipe.
Den so angeordneten Elektroden 4 gegenüber befindet sich auf der flachen Oberfläche des halbleitenden Körpers eine zweite Elektrode 8 (Fig. 1 bis 3).The electrodes 4 so arranged opposite is located on the flat surface of the semiconducting Body a second electrode 8 (Fig. 1 to 3).
Auch diese zweite Elektrode kann in einer Aushöhlung angeordnet sein, wie dies in Fig. 4 dargestellt ist, wobei dann gegebenenfalls ein Rohr 6 das Zerfließen verhindert.This second electrode can also be arranged in a cavity, as shown in FIG. 4 is, in which case a pipe 6 then prevents the deliquescence.
In die aufgeschmolzenen Elektroden sind Stromzuführungsdrähte 9 und 10 eingelötet.Power supply wires 9 and 10 are soldered into the melted electrodes.
Claims (4)
1. Verfahren zur Herstellung einer Halbleiteranordnung, insbesondere eines Transistors, mit einem halbleitenden Körper, der in seiner Oberfläche mindestens eine Aushöhlung hat, in der eine aufgeschmolzene Elektrode angeordnet ist, dadurch gekennzeichnet, daß das Elektrodenmaterial in ein isolierendes Rohr aufgenommen und dann das Rohr mit dem Elektrodenmaterial gleichachsig in der Aushöhlung angeordnet und danach durch Erhitzen mit dem halbleitenden Körper verschmolzen wird.PATENT CLAIMS:
1. A method for producing a semiconductor device, in particular a transistor, with a semiconducting body which has at least one cavity in its surface in which a fused electrode is arranged, characterized in that the electrode material is added to an insulating tube and then the tube with the electrode material is arranged coaxially in the cavity and then fused with the semiconducting body by heating.
Österreichische Patentschrift Nr. 154 538.Considered publications:
Austrian patent specification No. 154 538.
Deutsche Patente Nr. 975 179, 1032405.Legacy Patents Considered:
German patents No. 975 179, 1032405.
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| NL187666 | 1954-05-18 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| DE1132246B true DE1132246B (en) | 1962-06-28 |
Family
ID=19750663
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| DEN10641A Pending DE1132246B (en) | 1954-05-18 | 1955-05-14 | Method for producing a semiconductor arrangement by melting an electrode onto a semiconductor body with a cavity |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US2844770A (en) |
| DE (1) | DE1132246B (en) |
| FR (1) | FR1133880A (en) |
| GB (1) | GB769048A (en) |
| NL (2) | NL91363C (en) |
Families Citing this family (7)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| BE560244A (en) * | 1956-08-24 | |||
| DE1068385B (en) * | 1957-07-01 | 1959-11-05 | ||
| US3040266A (en) * | 1958-06-16 | 1962-06-19 | Union Carbide Corp | Surface field effect transistor amplifier |
| GB869863A (en) * | 1958-06-18 | 1961-06-07 | A & M Fell Ltd | Improvements in or relating to the manufacture of transistors, rectifiers and other semi-conductor devices |
| US3234440A (en) * | 1959-12-30 | 1966-02-08 | Ibm | Semiconductor device fabrication |
| US3067071A (en) * | 1960-01-04 | 1962-12-04 | Ibm | Semiconductor devices and methods of applying metal films thereto |
| DE1173993B (en) * | 1961-03-30 | 1964-07-16 | Siemens Ag | Method for producing a semiconductor arrangement with alloyed electrodes |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AT154538B (en) * | 1935-07-29 | 1938-10-10 | Philips Nv | Electrode system. |
| DE975179C (en) * | 1952-12-31 | 1961-09-21 | Rca Corp | Process for the production of an area rectifier or area transistor |
Family Cites Families (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US2612567A (en) * | 1949-10-04 | 1952-09-30 | Stuetzer Otmar Michael | Transconductor employing field controlled semiconductor |
| US2717341A (en) * | 1949-10-11 | 1955-09-06 | Gen Electric | Asymmetrically conductive device |
-
0
- NL NLAANVRAGE7902440,A patent/NL187666B/en unknown
- NL NL91363D patent/NL91363C/xx active
-
1955
- 1955-05-13 GB GB13900/55A patent/GB769048A/en not_active Expired
- 1955-05-14 DE DEN10641A patent/DE1132246B/en active Pending
- 1955-05-16 US US508661A patent/US2844770A/en not_active Expired - Lifetime
- 1955-05-16 FR FR1133880D patent/FR1133880A/en not_active Expired
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AT154538B (en) * | 1935-07-29 | 1938-10-10 | Philips Nv | Electrode system. |
| DE975179C (en) * | 1952-12-31 | 1961-09-21 | Rca Corp | Process for the production of an area rectifier or area transistor |
Also Published As
| Publication number | Publication date |
|---|---|
| GB769048A (en) | 1957-02-27 |
| NL187666B (en) | |
| US2844770A (en) | 1958-07-22 |
| NL91363C (en) | |
| FR1133880A (en) | 1957-04-03 |
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