DE1118362B - Process for the production of a semiconductor surface diode with low capacitance - Google Patents

Process for the production of a semiconductor surface diode with low capacitance

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Publication number
DE1118362B
DE1118362B DES63949A DES0063949A DE1118362B DE 1118362 B DE1118362 B DE 1118362B DE S63949 A DES63949 A DE S63949A DE S0063949 A DES0063949 A DE S0063949A DE 1118362 B DE1118362 B DE 1118362B
Authority
DE
Germany
Prior art keywords
area
semiconductor
junction
semiconductor body
low capacitance
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DES63949A
Other languages
German (de)
Inventor
Jeffery Ayton Meintjes
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens Edison Swan Ltd
Original Assignee
Siemens Edison Swan Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens Edison Swan Ltd filed Critical Siemens Edison Swan Ltd
Publication of DE1118362B publication Critical patent/DE1118362B/en
Pending legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/24Alloying of impurity materials, e.g. doping materials, electrode materials, with a semiconductor body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3063Electrolytic etching
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Weting (AREA)

Description

DEUTSCHESGERMAN

PATENTAMTPATENT OFFICE

S 63949 Vinc/21gS 63949 Vinc / 21g

ANMELDETAG: 16. JULI 1959REGISTRATION DATE: JULY 16, 1959

BEKANNTMACHUNG DER ANMELDUNG UND AUSGABE DER
AUSLEGESCHRIFT: 30. NOVEMBER 1961
NOTIFICATION OF THE REGISTRATION AND ISSUE OF THE
EDITORIAL: NOVEMBER 30, 1961

Ein weitverbreitetes Verfahren zur Herstellung von Halbleiterdioden besteht darin, daß an einem n- oder p-leitendem Halbleiterkörper eine Pille eines Verunreinigungsmaterials mit entgegengesetzter Leitfähigkeit angeschmolzen wird. Es entsteht im Halbleiterkörper ein Bereich entgegengesetzter Leitfähigkeit, der durch einen pn-übergang von dem übrigen Körper getrennt ist, der gewöhnlich die Form eines Plättchens hat.A widespread method for the production of semiconductor diodes is that at an n- or p-type semiconductor body a pill of a contaminant material is melted with the opposite conductivity. It arises in the semiconductor body an area of opposite conductivity, which is separated from the rest by a pn junction Body is separated, which usually has the shape of a plate.

Für einen gegebenen spezifischen Widerstand des Halbleiterkörpers, für den die bekannten Halbleiter wie z. B. Germanium verwendet werden können, und eine gegebene Spannung ist die Kapazität einer Halbleiterflächendiode proportional der Fläche des pn-Ubergangs. Infolge der Schwierigkeit, an sehr kleinen Pillen einen elektrischen Anschluß herzustellen, müssen diese eine gewisse Mindestgröße besitzen, und damit ist praktisch auch eine Grenze für die kleinste Kapazität einer nach dem zuvor genannten Verfahren hergestellten Diode gegeben.For a given specific resistance of the semiconductor body for which the known semiconductors such as B. germanium can be used, and a given voltage is the capacitance of a semiconductor junction diode proportional to the area of the pn junction. As a result of the difficulty at very small Pills to establish an electrical connection, they must have a certain minimum size, and thus there is practically also a limit for the smallest capacity one after the aforementioned Process manufactured diode given.

Es ist bereits bekannt, wie man bei Transistoren die Kollektorkapazität herabsetzen kann. Bei der Herstellung eines solchen Transistors geht man von einem eigenleitenden Körper aus, in den von der Oberseite aus ein scheibenförmiger p-Bereich eindiffundiert oder eingeschmolzen wird. Im Winkel von 90° zum p-Bereich wird von einer Breitseite des Körpers aus ein scheibenförmiger η-Bereich eingeschmolzen, so daß sich im Innern des eigenleitenden Körpers die beiden Bereiche durchschneiden und im Schnittraum ein weiteres eigenleitendes Gebiet bilden, da hier die Wirkung der Akzeptoren durch die Wirkung der Donatoren kompensiert wird. Am Rande dieses weiteren eigenleitenden Gebietes berühren sich der p-Bereich und der η-Bereich so, daß praktisch nur nahezu linienförmige pn-Übergänge neben flächenhaften pin-Übergängen vorhanden sind, deren eigenleitende Zone relativ breit ist. Im Gegensatz zu Transistoren ist die Ausbildung solcher eigenleitenden Zonen innerhalb des Halbleiterkörpers für Halbleiterflächendioden nicht brauchbar.It is already known how the collector capacitance of transistors can be reduced. In the Manufacture of such a transistor is based on an intrinsic body in which the Top of a disk-shaped p-area is diffused or melted. At the angle of 90 ° to the p-area, a disk-shaped η-area is melted from one broad side of the body, so that the two areas intersect inside the intrinsic body and form another intrinsic area in the cutting area, since this is where the acceptors act is compensated by the effect of the donors. On the edge of this further intrinsic area the p-area and the η-area touch each other in such a way that practically only almost linear pn-junctions in addition to two-dimensional pin junctions, the intrinsic zone of which is relatively wide. In contrast to transistors is the formation of such intrinsic zones within the semiconductor body for Semiconductor area diodes not usable.

Ferner ist zur Verminderung der Größe eines flächenhaften pn-Überganges ein Ätzverfahren bekannt, bei dem auf der einen Seite des Überganges Material eines Leitfähigkeitstyps weggenommen wird.Furthermore, an etching process is known to reduce the size of a planar pn junction, in which material of one conductivity type is removed from one side of the junction.

Das Ziel der Erfindung ist ein Verfahren, mit dem die Herstellung von Halbleiterflächendioden mit kleineren Kapazitätswerten als bisher möglich ist.The aim of the invention is a method with which the manufacture of semiconductor area diodes with smaller capacity values than previously possible.

Zur Herstellung einer Halbleiterflächendiode mit geringer Kapazität werden gemäß der Erfindung in die gegenüberliegenden Seitenflächen eines Halbleiterkörpers bestimmten Leitungstyps Pillen aus einem Verfahren zur HerstellungIn order to produce a semiconductor junction diode with a small capacitance, in accordance with the invention in FIG the opposite side surfaces of a semiconductor body pills of a certain conductivity type Method of manufacture

einer Halbleiterflächendiodea semiconductor area diode

mit geringer Kapazitätwith low capacity

Anmelder:
Siemens Edison Swan Limited, London
Applicant:
Siemens Edison Swan Limited, London

Vertreter: Dr.-Ing. W. Reichel, Patentanwalt,
Frankfurt/M. 1, Parkstr. 13
Representative: Dr.-Ing. W. Reichel, patent attorney,
Frankfurt / M. 1, Parkstrasse 13th

Beanspruchte Priorität:
Großbritannien vom 17. Juli 1958 (Nr. 22 988/58)
Claimed priority:
Great Britain July 17, 1958 (No. 22 988/58)

Jeffery Ayton Meintjes, London,
ist als Erfinder genannt worden
Jeffery Ayton Meintjes, London,
has been named as the inventor

Verunreinigungsmaterial des entgegengesetzten Leitungstyps so tief eingeschmolzen, bis das Pillenmaterial in gerader Richtung durch den Körper gelangt ist; anschließend wird durch Anbringen einer Mulde wenigstens in der einen Seitenfläche des Halbleiterkörpers an der Stelle des an die Oberfläche tretenden pn-Übergangs die Fläche des in der Dickenrichtung des Halbleiterkörpers Hegenden Überganges vermindert. Auf diese Weise lassen sich zwischen dem vom Pillenmaterial beeinflußten Bereich und dem restlichen Körper auch je eine Einschnürung mit verringerter Dicke auf den beiden Seiten des Körpers herstellen, so daß der Übergang von diesen Einschnürungen begrenzt wird.Contaminant material of the opposite conduction type melted down until the pill material has passed straight through the body; then by attaching a Trough at least in one side face of the semiconductor body at the point of the surface entering the pn junction is the area of the junction in the thickness direction of the semiconductor body reduced. In this way you can choose between the area affected by the pill material and the rest of the body also a constriction with reduced thickness on both sides of the body produce so that the transition from these constrictions is limited.

Das Verfahren gemäß der Erfindung sei nun an Hand einiger Figuren näher erläutert.The method according to the invention will now be explained in more detail with reference to a few figures.

Fig. 1, 2 und 3 zeigen verschiedene Verfahrensschritte bei der Herstellung einer Halbleiterdiode gemäß der Erfindung.1, 2 and 3 show different process steps in the manufacture of a semiconductor diode according to the invention.

Ein Halbleiterplättchen nach Fig. 1 hat eine bestimmte Leitfähigkeit und ist z. B. aus Germanium, das entsprechende Verunreinigungen enthält. Zu beiden Seiten des Plättchens werden Pillen 2 mit einer Verunreinigung des entgegengesetzten Leitfähigkeitstyps aufgebracht, die bei einer Temperatur von z. B. 500° C mit dem Plättchen legiert werden. Diese Wärmebehandlung dauert so lange an, bis das Legierungsmaterial durch das Plättchen 1 in einemA semiconductor wafer according to FIG. 1 has a certain conductivity and is, for. B. from germanium, which contains the corresponding impurities. Pills 2 with a Impurity of the opposite conductivity type is applied, which occurs at a temperature of e.g. B. 500 ° C can be alloyed with the plate. This heat treatment continues until the Alloy material through the plate 1 in one

109 747/454109 747/454

mittleren Bereich 3, der eine im allgemeinen zylindrische Form hat (Fig. 2), hindurchgeschmolzen ist. Zwischen dem Bereich 3 und dem übrigen umgebenden Plättchen 1 entsteht ein pn-übergang 4. Anschließend werden Mulden 5 (Fig. 3) rund um den Umfang des Bereiches 3 zu beiden Seiten des Plättchens 1 hergestellt, wodurch die Dicke und somit die Fläche des Übergangs 4 vermindert werden. Am mittleren Bereich 3 und am umgebenden Abschnitt des Plättchens 1 werden dann auf zweckmäßige Weise elektrische Anschlüsse (nicht gezeigt) befestigt.central region 3, which has a generally cylindrical shape (Fig. 2), is melted through. A pn junction 4 is then created between the area 3 and the rest of the surrounding platelet 1 are wells 5 (Fig. 3) around the circumference of the area 3 on both sides of the plate 1 produced, whereby the thickness and thus the area of the transition 4 can be reduced. On the middle Area 3 and the surrounding portion of the wafer 1 are then expediently electrical connections (not shown) attached.

Die Herstellung der Mulden S kann durch elektrolytisches Ätzen und durch eine gleichzeitige Messung der Kapazität mit einem passenden Meßgerät erfolgen; die Kapazität kann dabei in engen Grenzen eingestellt werden. Ein solches Ätzverfahren kann in einem Elektrolyten aus lO°/oigem Kaliumhydroxyd ausgeführt werden, wobei eine Potentialdifferenz von 6 V zwischen dem Bereich 3 und dem umgebenden Teil des Plättchens 1 aufrechterhalten wird.The wells S can be produced by electrolytic etching and by simultaneous measurement the capacity with a suitable measuring device; the capacity can be set within narrow limits will. Such an etching process can be carried out in an electrolyte made from 10% potassium hydroxide be carried out, with a potential difference of 6 V between the area 3 and the surrounding Part of the plate 1 is maintained.

Claims (1)

Patentanspruch.
Verfahren zur Herstellung einer Halbleiterflächendiode mit geringer Kapazität, dadurch gekennzeichnet, daß in die gegenüberliegenden Seitenflächen eines Halbleiterkörpers bestimmten Leitungstyps Pillen aus einem Verunreinigungsmaterial des entgegengesetzten Leitungstyps so tief eingeschmolzen werden, bis das Pillenmaterial in gerader Richtung durch den Körper gelangt ist, und daß anschließend durch Anbringen einer Mulde wenigstens in der einen Seitenfläche des Halbleiterkörpers an der Stelle des an die Oberfläche tretenden pn-Überganges die Fläche des in der Dickenrichtung des Halbleiterkörpers liegenden Überganges vermindert wird.
Claim.
A method for producing a semiconductor junction diode with low capacitance, characterized in that pills made of an impurity material of the opposite conductivity type are melted into the opposite side surfaces of a semiconductor body of a certain conductivity type until the pill material has passed straight through the body, and then by applying a trough at least in one side surface of the semiconductor body at the point of the pn junction coming to the surface, the area of the junction lying in the thickness direction of the semiconductor body is reduced.
In Betracht gezogene Druckschriften:
Deutsche Auslegeschriften Nr. 1018 554,
555;
USA.-Patentschriften Nr. 2770761, 2796 562.
Considered publications:
German Auslegeschrift No. 1018 554,
555;
U.S. Patent Nos. 2770761, 2796 562.
Hierzu 1 Blatt Zeichnungen1 sheet of drawings © 109 747/454 11.61© 109 747/454 11.61
DES63949A 1958-07-17 1959-07-16 Process for the production of a semiconductor surface diode with low capacitance Pending DE1118362B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
GB2298858A GB860400A (en) 1958-07-17 1958-07-17 Improvements relating to semi-conductor diodes

Publications (1)

Publication Number Publication Date
DE1118362B true DE1118362B (en) 1961-11-30

Family

ID=10188283

Family Applications (1)

Application Number Title Priority Date Filing Date
DES63949A Pending DE1118362B (en) 1958-07-17 1959-07-16 Process for the production of a semiconductor surface diode with low capacitance

Country Status (3)

Country Link
DE (1) DE1118362B (en)
FR (1) FR1230268A (en)
GB (1) GB860400A (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3206340A (en) * 1960-06-22 1965-09-14 Westinghouse Electric Corp Process for treating semiconductors

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2770761A (en) * 1954-12-16 1956-11-13 Bell Telephone Labor Inc Semiconductor translators containing enclosed active junctions
US2796562A (en) * 1952-06-02 1957-06-18 Rca Corp Semiconductive device and method of fabricating same
DE1018554B (en) * 1953-05-07 1957-10-31 Philips Nv Method for manufacturing a semiconductor device in which a semiconducting surface layer of the p-type conduction occurs
DE1018555B (en) * 1953-12-09 1957-10-31 Philips Nv Method for producing a semiconductor arrangement, in particular a crystal diode or a transistor, the semiconducting body of which is provided with at least one fused electrode

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US2796562A (en) * 1952-06-02 1957-06-18 Rca Corp Semiconductive device and method of fabricating same
DE1018554B (en) * 1953-05-07 1957-10-31 Philips Nv Method for manufacturing a semiconductor device in which a semiconducting surface layer of the p-type conduction occurs
DE1018555B (en) * 1953-12-09 1957-10-31 Philips Nv Method for producing a semiconductor arrangement, in particular a crystal diode or a transistor, the semiconducting body of which is provided with at least one fused electrode
US2770761A (en) * 1954-12-16 1956-11-13 Bell Telephone Labor Inc Semiconductor translators containing enclosed active junctions

Also Published As

Publication number Publication date
FR1230268A (en) 1960-09-14
GB860400A (en) 1961-02-01

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