DE1071842B - - Google Patents
Info
- Publication number
- DE1071842B DE1071842B DENDAT1071842D DE1071842DA DE1071842B DE 1071842 B DE1071842 B DE 1071842B DE NDAT1071842 D DENDAT1071842 D DE NDAT1071842D DE 1071842D A DE1071842D A DE 1071842DA DE 1071842 B DE1071842 B DE 1071842B
- Authority
- DE
- Germany
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
- H01L23/3157—Partial encapsulation or coating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DEP0018414 | 1957-04-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
DE1071842B true DE1071842B (es) |
Family
ID=7367004
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DENDAT1071842D Pending DE1071842B (es) | 1957-04-25 |
Country Status (1)
Country | Link |
---|---|
DE (1) | DE1071842B (es) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1230912B (de) * | 1960-06-09 | 1966-12-22 | Siemens Ag | Verfahren zum Herstellen einer Halbleiteranordnung |
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0
- DE DENDAT1071842D patent/DE1071842B/de active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE1230912B (de) * | 1960-06-09 | 1966-12-22 | Siemens Ag | Verfahren zum Herstellen einer Halbleiteranordnung |