DE10393298D2 - Verfahren zum codieren/decodieren von VLIW cached Befehlen - Google Patents

Verfahren zum codieren/decodieren von VLIW cached Befehlen

Info

Publication number
DE10393298D2
DE10393298D2 DE10393298T DE10393298T DE10393298D2 DE 10393298 D2 DE10393298 D2 DE 10393298D2 DE 10393298 T DE10393298 T DE 10393298T DE 10393298 T DE10393298 T DE 10393298T DE 10393298 D2 DE10393298 D2 DE 10393298D2
Authority
DE
Germany
Prior art keywords
vliw
decoding
coding
cached commands
cached
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10393298T
Other languages
English (en)
Inventor
Helge Betzinger
Yuhi Tang
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NXP Semiconductors Germany GmbH
Original Assignee
Philips Semiconductors Dresden AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Philips Semiconductors Dresden AG filed Critical Philips Semiconductors Dresden AG
Priority to DE10393298T priority Critical patent/DE10393298D2/de
Application granted granted Critical
Publication of DE10393298D2 publication Critical patent/DE10393298D2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F8/00—Arrangements for software engineering
    • G06F8/40—Transformation of program code
    • G06F8/41—Compilation
    • G06F8/44—Encoding
    • G06F8/447—Target code generation

Landscapes

  • Engineering & Computer Science (AREA)
  • General Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Executing Machine-Instructions (AREA)
  • Memory System Of A Hierarchy Structure (AREA)
  • Advance Control (AREA)
DE10393298T 2002-06-05 2003-05-28 Verfahren zum codieren/decodieren von VLIW cached Befehlen Expired - Fee Related DE10393298D2 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE10393298T DE10393298D2 (de) 2002-06-05 2003-05-28 Verfahren zum codieren/decodieren von VLIW cached Befehlen

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10225099 2002-06-05
PCT/DE2003/001748 WO2003104987A2 (de) 2002-06-05 2003-05-28 Verfahren zum codieren/decodieren von vliw cached befehlen
DE10393298T DE10393298D2 (de) 2002-06-05 2003-05-28 Verfahren zum codieren/decodieren von VLIW cached Befehlen

Publications (1)

Publication Number Publication Date
DE10393298D2 true DE10393298D2 (de) 2005-05-25

Family

ID=29723087

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10393298T Expired - Fee Related DE10393298D2 (de) 2002-06-05 2003-05-28 Verfahren zum codieren/decodieren von VLIW cached Befehlen

Country Status (6)

Country Link
US (1) US20050246515A1 (de)
EP (1) EP1509842A2 (de)
JP (1) JP3981117B2 (de)
AU (1) AU2003257376A1 (de)
DE (1) DE10393298D2 (de)
WO (1) WO2003104987A2 (de)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10142157B2 (en) * 2010-06-10 2018-11-27 Blackberry Limited Method and system for reducing transmission of redundant data
CN102662637B (zh) * 2012-03-30 2014-10-15 中国人民解放军国防科学技术大学 超长指令字处理器指令发射方法

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6101592A (en) * 1998-12-18 2000-08-08 Billions Of Operations Per Second, Inc. Methods and apparatus for scalable instruction set architecture with dynamic compact instructions
DE19859389C1 (de) * 1998-12-22 2000-07-06 Systemonic Ag Verfahren zur Ansteuerung von Funktionseinheiten in einem Prozessor und Prozessoranordnung zur Durchführung des Verfahrens

Also Published As

Publication number Publication date
JP3981117B2 (ja) 2007-09-26
AU2003257376A8 (en) 2003-12-22
EP1509842A2 (de) 2005-03-02
JP2005529402A (ja) 2005-09-29
WO2003104987A2 (de) 2003-12-18
US20050246515A1 (en) 2005-11-03
AU2003257376A1 (en) 2003-12-22
WO2003104987A3 (de) 2004-12-29

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Legal Events

Date Code Title Description
8139 Disposal/non-payment of the annual fee