DE10356981B3 - Mounting semiconductor chip on substrate, especially circuit board, involves arranging solder filling with solder bead, underfill materials on chip, applying to chip with adhesive band, mounting on substrate, melting by heat treatment - Google Patents
Mounting semiconductor chip on substrate, especially circuit board, involves arranging solder filling with solder bead, underfill materials on chip, applying to chip with adhesive band, mounting on substrate, melting by heat treatment Download PDFInfo
- Publication number
- DE10356981B3 DE10356981B3 DE10356981A DE10356981A DE10356981B3 DE 10356981 B3 DE10356981 B3 DE 10356981B3 DE 10356981 A DE10356981 A DE 10356981A DE 10356981 A DE10356981 A DE 10356981A DE 10356981 B3 DE10356981 B3 DE 10356981B3
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- Prior art keywords
- solder
- semiconductor chip
- substrate
- chip
- circuit board
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- H—ELECTRICITY
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B23—MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
- B23K—SOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
- B23K3/00—Tools, devices, or special appurtenances for soldering, e.g. brazing, or unsoldering, not specially adapted for particular methods
- B23K3/06—Solder feeding devices; Solder melting pans
- B23K3/0607—Solder feeding devices
- B23K3/0638—Solder feeding devices for viscous material feeding, e.g. solder paste feeding
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- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
- H01L21/563—Encapsulation of active face of flip-chip device, e.g. underfilling or underencapsulation of flip-chip, encapsulation preform on chip or mounting substrate
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Abstract
Description
Die vorliegende Erfindung bezieht sich auf ein Verfahren, um einen Halbleiterchip auf ein Substrat oder eine Leiterplatte (PCB) zu montieren.The The present invention relates to a method of manufacturing a semiconductor chip to mount on a substrate or printed circuit board (PCB).
Im Allgemeinen dient ein Halbleitergehäuse nicht nur zum Schutz des Halbleiterchips vor seiner Umgebung, sondern auch um die Halbleiterchips und das Substrat zu verbinden.in the In general, a semiconductor package is not only for the protection of the Semiconductor chips in front of its environment, but also around the semiconductor chips and connect the substrate.
Entsprechend der verfolgten Ziele der Verringerung der Kosten, Minimierung der Größe und Maximierung der Leistung und Zuverlässigkeit, wird die elektrische Verbindungstechnologie von Flächen-Arrays, wie beispielsweise Flip Chip, Chip Scale Package (CSP) und Ball Grid Array (BGA), hauptsächlich für Halbleitergehäuse entwickelt. Unter den elektrischen Verbindungstechnologien von Flächen-Arrays, die auf Halbleitergehäuse angewendet werden, ist Flip Chip eine Technologie der Kopfüberbefestigung, bei welcher die Oberfläche des Plastiksubstrats einen Schaltkreis aufweist, der der Oberfläche des Halbleiterchips zur Befestigung gegenüberliegt, und die zusammen eine Mikroschaltung bilden.Corresponding the objectives pursued are reduction of costs, minimization of costs Size and maximization the performance and reliability, becomes the electrical connection technology of area arrays, such as Flip Chip, Chip Scale Package (CSP) and Ball Grid Array (BGA), mainly developed for semiconductor packages. Among the electrical interconnect technologies of surface arrays, on semiconductor packages flip chip is a head-over-the-wall technology, at which the surface of the plastic substrate has a circuit corresponding to the surface of the Semiconductor chips facing the attachment, and the together form a microcircuit.
Von höchstem Interesse für die Flip Chip-Technologie ist die Lebensdauer der Verbindung zwische Halbleiterchips und Leiterplatte in Folge thermomechanischer Ermüdung. Bis zu den späten 80er Jahren des 20. Jahrhunderts wurde die thermo-mechanische Ermüdung nicht als Problem erachtet, weil die Flip Chip-Technologie ein Siliziumsubstrat oder keramisches Substrat verwendet hat, und die Größe eines Halbleiterchips verhältnismäßig klein im Vergleich zu heute war. Die Größe eines Halbleiterchips ist jedoch nach den späten 80er Jahren des 20. Jahrhunderts beachtlich angestiegen. Im Allgemeinen wird ein Halbleiterchip verwendet, der einen thermischen Ausdehnungskoeffizienten von 2,5 ppm/°C besitzt. Gleichzeitig wurde ein organisches Substrat aus FR4 mit einem thermischen Ausdehnungskoeffizienten von 16 ppm/°C oder Polyamide mit einem thermischen Ausdehnungskoeffizienten von 45 ppm/°C als Leiterplatte (PCB) eingesetzt. Der große Unterschied in den thermischen Ausdehnungskoeffizienten erhöht das Problem der thermo-mechanischen Ermüdung an der gelöteten Verbindung zwischen dem Halbleiterchip und der Leiterplatte.From highest interest in The flip chip technology is the lifetime of the connection between Semiconductor chips and printed circuit board as a result of thermo-mechanical fatigue. To to the late The 80s of the 20th century, the thermo-mechanical fatigue was not considered a problem because the flip chip technology is a silicon substrate or ceramic substrate used, and the size of a Semiconductor chips relatively small was compared to today. The size of a semiconductor chip is however after the late 80s of the 20th Century increased considerably. In general a semiconductor chip is used which has a coefficient of thermal expansion of 2.5 ppm / ° C. At the same time, an organic substrate of FR4 with a thermal Expansion coefficients of 16 ppm / ° C or polyamides with a thermal Coefficient of expansion of 45 ppm / ° C used as a printed circuit board (PCB). The big difference in the thermal expansion coefficient increases the problem of thermo-mechanical fatigue at the soldered Connection between the semiconductor chip and the circuit board.
Um das Problem der thermo-mechanischen Ermüdung an der gelöteten Verbindung zu lösen, ist eine Technologie zum Einfügen einer Unterfüllung eingeführt worden. Die Unterfüllung ist eine Masse, in welcher das hochmolekulare Material mit einer starken Klebefähigkeit, wie beispielsweise Epoxydharz, mit SiO2 verbunden ist, um den thermischen Ausdehnungskoeffizienten des Lötmittels anzugleichen. Die Masse wird in den Spalt zwischen dem Halbleiterchip und der Leiterplatte eingefügt. Es ist bewiesen, dass sich die thermo-mechanische Ermüdung an der gelöteten Verbindung um zehn- bis hundertmal verbessert hat und sich die Verformung des Lötmittels durch die Anwendung einer Unterfüllung in der Flip Chip-Technik um 0,1 % bis 0,25 % vermindert hat.In order to solve the problem of thermo-mechanical fatigue on the soldered joint, a technology for inserting an underfill has been introduced. The underfill is a mass in which the high-molecular-weight material having a strong adhesiveness such as epoxy resin is bonded with SiO 2 to equalize the coefficient of thermal expansion of the solder. The mass is inserted into the gap between the semiconductor chip and the circuit board. It has been proven that the thermo-mechanical fatigue on the soldered joint has improved ten to one hundred times and the solder deflection has been reduced by 0.1% to 0.25% through the use of underfill in the flip chip technique Has.
Bezugnehmend
auf
Bezugnehmend
auf
Bezugnehmend
auf die
Bezugnehmend
auf
Jedoch hat die herkömmliche Montagetechnologie eines Halbleiterchips, wie sie oben beschrieben wurde Nachteile, die nachfolgend aufgelistet sind:
- 1. Während des Herstellungsprozesses eines Halbleiterchips müssen zwei getrennte Wärmebehandlungen durchgeführt werden, um das Lötmittel zum Verbinden des Halbleiterchips und des Substrats zu schmelzen und um den flüssigen Zustand des Unterfüllmaterials zu härten. Zusätzlich ist der Füllprozess kompliziert und langsam, weil das Unterfüllmaterial aufgrund seiner hohen Dichte nur langsam in den engen Spalt eindringt.
- 2. Es ist schwierig eine einheitliche Höhe des Unterfüllmaterials, das den Halbleiterchip umgibt, zu erhalten.
- 3. In Folge des großen Unterschieds in den thermischen Ausdehnungskoeffizienten des Halbleiterchips und des Substrats werden der Halbleiterchip und die Lötperlen während des Wärmebehandlungsprozesses mechanisch und physikalisch gestresst. In Folge dessen wird die Zuverlässigkeit des Halbleitergehäuses gemindert.
- 4. Es ist unbequem und erhöht die Produktionskosten, während des Herstellungsprozesses des Wafers den Prozess der Ausbildung der Lötperlen auf dem Halbleiterchip hinzuzufügen.
- 1. During the manufacturing process of a semiconductor chip, two separate heat treatments must be performed to melt the solder for bonding the semiconductor chip and the substrate and to harden the liquid state of the underfill material. In addition, the filling process is complicated and slow, because the underfill material due to its high you Only slowly penetrates into the narrow gap.
- 2. It is difficult to obtain a uniform height of the underfill material surrounding the semiconductor chip.
- 3. Due to the large difference in the thermal expansion coefficients of the semiconductor chip and the substrate, the semiconductor chip and the solder bumps are mechanically and physically stressed during the heat treatment process. As a result, the reliability of the semiconductor package is reduced.
- 4. It is inconvenient and increases the production cost to add the process of forming the solder bumps on the semiconductor chip during the manufacturing process of the wafer.
Als
einschlägiger
Stand der Technik sind die
Die
Einen ähnlichen
Aufbau einer solchen Lotfüllung
zeigt die
Die
Der Erfindung liegt die Aufgabe zugrunde, die Montage eines Halbleiterchips; der unter Verwendung einer Lotfüllung auf einer Leiterplatte montiert wird, zu erleichtern.Of the Invention is based on the object, the mounting of a semiconductor chip; the one using a solder fill mounted on a printed circuit board, to facilitate.
Die vorliegende Erfindung stellt ein Verfahren zur Montage eines Halbleiterchips durch die Verwendung von Lotfüllung und Klebemitteln gemäß Patentanspruch 1 bereit.The The present invention provides a method of mounting a semiconductor chip through the use of solder fill and adhesives according to claim 1 ready.
Die beigefügten Zeichnungen erläutern die Erfindung.The attached Explain drawings The invention.
Um die oben genannte Aufgabe zu lösen wird eine Lotfüllung zur Herstellung von Halbleitergehäusen bereitgestellt. Die Lotfüllung umfasst Unterfüllmaterial, das zum Füllen der Spalte zwischen einem Halbleiterchip und einem Substrat verwendet wird, Lötperlenmaterial, das innerhalb des Unterfüllmaterials angeordnet ist und eine Vielzahl von Scheiben- oder Punktformstücken ausbildet und dieselbe Dicke aufweist, um mit den Verbindungsmustern der Halbleiterchip-Anschlussfläche und dem Substrat zusammenzupassen.Around to solve the above object a solder fill provided for the production of semiconductor packages. The solder filling includes Underfill material, that for filling the gap between a semiconductor chip and a substrate is used, Lötperlenmaterial, that within the underfill material is arranged and forms a plurality of disc or Punktformstücken and the same thickness to match the connection patterns of the semiconductor chip pad and to match the substrate.
Ein weiches Stadium des B-Zustandes, wie bei einem Material aus der Epoxygruppe, ist zur Verwendung als Unterfüllmaterial, das durch externe Wärme geschmolzen und zu einem festen Zustand gehärtet werden kann. geeignet.A soft state of the B state, as with a material of the epoxy group, is the Ver as underfill material, which can be melted by external heat and hardened to a solid state. suitable.
Ein Herstellungsverfahren für Lotfüllungen, die für Halbleitergehäuse verwendet werden, wird bereit gestellt und umfasst die folgenden Schritte: ein Schritt zum Anordnen einer Vielzahl von draht- oder stabförmigem Lötperlenmaterials in einem Behälter in der Art, dass es mit den Verbindungsmustern des Halbleiterchips und des Substrats zusammenpasst, ein Schritt zum Einfüllen des flüssigen Unterfüllmaterials in den Behälter, ein Schritt zum Verfestigen des Unterfüllmaterials in dem Behälter und ein Schritt zum Abtrennen oder Abschneiden des verfestigten Lötperlenmaterials und Unterfüllmaterials in einheitlicher Dicke nach dem Herausziehen aus dem Behälter.One Manufacturing process for Solder fillings that used for semiconductor packages will be provided and includes the following steps: a step of disposing a plurality of wire or bar solder ball material in a container in the way that it deals with the connection patterns of the semiconductor chip and the substrate, a step for filling the liquid underfill material in the container, a step of solidifying the underfill material in the container and a step of separating or cutting off the solidified solder ball material and underfill material in uniform thickness after pulling out of the container.
Es ist wünschenswert, das Unterfüllmaterial zum einfachen Schneiden oder Abtrennen zu einem weichen Stadium des B-Zustandes zu verfestigen. Zum Schneiden des verfestigten Lötperlenmaterials und Unterfüllmaterials in einheitlicher Dicke wird eine Diamanttrennscheibe verwendet.It is desirable the underfill material for simple cutting or separating to a soft stage of To solidify B-state. For cutting the solidified Lötperlenmaterials and underfill material in uniform thickness, a diamond blade is used.
Es werden ein Ausgabegerät zum Einfüllen des Unterfüllmaterials und zwei getrennte Wärmebehandlungen zum Schmelzen der Lötperlen und zum Härten des Unterfüllmaterials, wie dies bei herkömmlichen Verfahren erforderlich ist, nicht benötigt. Es wird nur eine einzige Wärmebehandlung benötigt, um die Lotfüllung zur Montage des Halbleiterchips auf das Substrat während des Herstellungsverfahrens zu schmelzen und zu härten.It become an output device for filling the underfill material and two separate heat treatments for melting the solder bumps and for hardening the underfill material, as with conventional Procedure required, not needed. It will only be one heat treatment necessary for the solder fill for mounting the semiconductor chip on the substrate during the Melting and curing process.
Ein Verfahren zur Montage des Halbleiterchips durch Verwendung einer Lotfüllung wird bereitgestellt. Das Verfahren umfasst die Schritte: ein Schritt zur Vorbereitung einer Leiterplatte (PCB) oder Substrats zur Montage eines Halbleiterchips, ein Schritt zur Anordnung einer Lotfüllung in der Position, in der der Flip Chip auf die Leiterplatte montiert wird, ein Schritt zur Anordnung eines Halbleiterchips über der angebrachten Lotfüllung und ein Schritt zur Verschmelzung der mit dem Halbleiterchip und der Lotfüllung versehenen Leiterplatte.One Method for mounting the semiconductor chip by using a solder fillet will be provided. The method comprises the steps: one step for preparing a printed circuit board (PCB) or substrate for mounting a semiconductor chip, a step of arranging a solder fill in the position where the flip chip is mounted on the circuit board is a step for arranging a semiconductor chip over the attached solder fill and a step of merging with the semiconductor chip and the solder fill provided printed circuit board.
Die Lotfüllung, bestehend aus Lötperlenmaterial und Unterfüllmaterial, wird in dünne Scheiben mit einer zweckmäßigen Dicke geschnitten, um geeignet zwischen den Halbleiterchip und die Leiterplatte zu passen. Folglich ist ein Halbleiterchip ohne Lötperlen zur Verwendung in diesem Verfahren zu bevorzugen.The solder fillet, consisting of solder ball material and underfill material, gets thin Discs of a suitable thickness cut to fit between the semiconductor chip and the circuit board to fit. Consequently, a semiconductor chip is without solder bumps for use in this method.
Bleifreies Lötmittel ist zur Verwendung als Lötperlenmaterial geeignet. Die Epoxygruppe ist zur Verwendung als Unterfüllmaterial in diesem Verfahren geeignet.Unleaded solder is for use as solder bump material suitable. The epoxy group is for use as underfill material suitable in this method.
Ein Montage-Verfahren zur Montage eines Flip Chip durch die Anwendung eines Klebemittels umfasst die folgenden Schritte: ein Schritt zur Vorbereitung einer Leiterplatte (PCB) zur Montage eines Flip Chip, ein Schritt zur Anordnung einer Lotfüllung in einer Position, in der der Flip Chip auf die Leiterplatte durch die Verwendung eines Klebemittels, wie beispielsweise einem klebenden Band oder einer klebenden Masse, montiert wird, ein Schritt zur Anordnung eines Halbleiterchips über der auf der Leiterplatte angebrachten Lotfüllung, und ein Schritt zur Verschmelzung der mit dem Halbleiterchip und der Lotfüllung versehenen Leiterplatte.One Assembly procedure for mounting a flip chip through the application An adhesive includes the following steps: a preparation step a printed circuit board (PCB) for mounting a flip chip, a step for arranging a solder filling in a position where the flip chip to the circuit board through the use of an adhesive, such as an adhesive Tape or an adhesive mass, mounted, is a step to Arrangement of a semiconductor chip via the solder fill applied to the board, and a fusion step the circuit board provided with the semiconductor chip and the solder fill.
Hierbei wird die Lotfüllung auf die Leiterplatte durch ein klebendes Band unterhalb der Ecken der Lotfüllung angebracht. Das klebende Band wird während der Wärmebehandlung schmelzen um sich mit dem Unterfüllmaterial zu verbinden.in this connection becomes the solder fill on the circuit board by an adhesive tape below the corners the solder fill appropriate. The adhesive tape will melt during the heat treatment yourself with the underfill material connect to.
Es wird auch ein anderes alternatives Verfahren zur Montage eines Flip Chips mit Hilfe einer Lotfüllung und eines Klebemittels offenbart. Das Verfahren umfasst die Schritte: ein Schritt zur Anbringung einer Lotfüllung an einen Halbleiterchip, ein Schritt zur Anbringung eines klebenden Bandes, das die Lotfüllung mit dem angebrachten Halbleiterchip umgibt, ein Schritt zur Positionierung der Lotfüllung mit dem angebrachten Halbleiterchip auf der Leiterplatte, und einem abschließenden Schritt zur Verschmelzung oder Aushärtung der mit dem Halbleiterchip und der Lotfüllung versehenden Leiterplatte.It Also, another alternative method of mounting a flip Chips using a solder fill and an adhesive. The method comprises the steps: a step of attaching a solder fill to a semiconductor chip, a step of applying an adhesive tape containing the solder fill with surround the attached semiconductor chip, a positioning step the solder fill with the attached semiconductor chip on the circuit board, and a final Step to fuse or cure with the semiconductor chip and the solder fill providing circuit board.
Hierbei wird die Lotfüllung mit dem durch ein klebendes Hilfsmittel wie beispielsweise einem klebenden Band, das die Ecken der Lotfüllung umgibt, angehefteten Halbleiterchip auf der Leiterplatte angebracht. Das klebende Band wird während des Wärmebehandlungsverfahrens schmelzen um sich mit dem Unterfüllmaterial zu verbinden.in this connection becomes the solder fill with the by an adhesive tool such as a adhesive tape surrounding the corners of the solder fill, tacked Semiconductor chip mounted on the circuit board. The adhesive tape is during of the heat treatment process Melt around with the underfill material connect to.
Entsprechend der vorliegenden Erfindung wird der Flip Chip einfach durch eine einzige Wärmebehandlung während des Herstellungsverfahrens hergestellt, ohne die vorhandenen Eigenschaften zu verändern. Dadurch, dass die Anzahl an Wärmebehandlungen reduziert wird, ist es möglich, potentiellen thermischen Schaden an den Verbindungen zwischen dem Halbleiterchip und der Leiterplatte zu verhindern. Folglich ist es möglich, die Zuverlässigkeit des Halbleitergehäuses zu steigern. Weiterhin könnten die Herstellungskosten reduziert werden, weil die Lötperlen auf dem Halbleiterchip nicht notwendig sind.Corresponding According to the present invention, the flip chip is easily replaced by a only heat treatment while of the manufacturing process, without the existing properties to change. By doing that, the number of heat treatments is reduced, it is possible potential thermal damage to the connections between the Prevent semiconductor chip and the circuit board. Consequently, it is it is possible the reliability of Semiconductor package to increase. Furthermore could the manufacturing costs are reduced because the solder bumps on the semiconductor chip are not necessary.
Nachstehend wird eine detaillierte Beschreibung der Zeichnungen gegeben.below A detailed description of the drawings will be given.
Eine
Lotfüllung
ist in
Bezugnehmend
auf die
Das
Lötperlenmaterial
(
Ein
leicht flüssiges
Material des B-Zustandes, wie beispielsweise eine Epoxygruppe, ist
zur Verwendung als Unterfüllmaterial
(
Bezugnehmend
auf die
Wie
in
Bezugnehmend
auf
Durch
die
Bezugnehmend
auf die
Während des
Aushärtungsprozesses
werden die Lötperlen
(
Bezugnehmend
auf die
Bezugnehmend
auf die
Die Bezeichnungsweise „Substrat", die in der vorliegenden Anmeldung verwendet wird, hat die weiteste Bedeutung und ist nicht auf ein spezielles Halbleitergehäuse begrenzt. Die vorliegende Erfindung kann mit verschiedenen Hilfsmitteln ausgeführt werden, ohne dabei von der Idee und den wesentlichen Merkmalen der vorliegenden Erfindung abzuweichen. Die Ausführungsbeispiele der vorliegenden Erfindung verwenden zum Beispiel das Substrat zur Montage des Halbleiterchips oder Flip Chips. Es ist möglich das Herstellungsverfahren auf ein BGA-Gehäuse oder eine IC-Karte anzuwenden. Außerdem kann das Unterfüllmaterial anstatt eines Materials aus der Epoxygruppe durch ein neues Material, das durch die Schneidetechnologie entwickelt wurde, ersetzt werden. Dementsprechend sind die erläuterten Beispiele in den Ausführungsbeispielen der vorliegenden Erfindung beispielhaft und nicht auf die speziellen Beispiele begrenzt.The Designation "substrate", which in the present Login is used, has the broadest meaning and is not on a special semiconductor package limited. The present invention can be used with various aids be executed without losing sight of the idea and the essential features of the present Deviate from the invention. The embodiments For example, the present invention uses the substrate for mounting of the semiconductor chip or flip chip. It is possible the manufacturing process on a BGA package or to use an IC card. In addition, the underfill material instead of a material from the epoxy group by a new material, which was developed by the cutting technology, to be replaced. Accordingly, the illustrated examples are in the embodiments of the present invention by way of example and not to the specific ones Limited examples.
Außerdem hat die Lotfüllung, die in der vorliegenden Erfindung verwendet wird, die weiteste Bedeutung und ist nicht auf ein spezielles Material begrenzt, das in den Ausführungsbeispielen der vorliegenden Erfindung beschrieben ist. Die vorliegende Erfindung kann durch die Verwendung verschiedener Hilfsmittel ausgeführt werden, ohne von der Idee und den wesentlichen Merkmalen der vorliegenden Erfindung abzuweichen. Die Ausführungsbeispiele der vorliegenden Erfindung verwenden zum Beispiel bleifreie Lotdrähte oder -stäbe. Es ist möglich bleifreies Lötmittel mit Material zu ersetzen, das aus verschiedenen Komponenten hergestellt ist. Außerdem könnte die Leiterplatte durch organisches Material (FR4), wie beispielsweise Polyamid, ersetzt werden.In addition, the solder fill, which in the before The present invention is of utmost importance and is not limited to any particular material described in the embodiments of the present invention. The present invention may be practiced by the use of various aids without departing from the spirit and essential characteristics of the present invention. For example, the embodiments of the present invention use lead-free solder wires or rods. It is possible to replace lead-free solder with material made of different components. In addition, the circuit board could be replaced by organic material (FR4) such as polyamide.
In Folge dessen hat ein neues erfindungsgemäßes Verfahren zur Montage eines Halbleiterchips durch Verwendung einer Lotfüllung die nachfolgend aufgelisteten Vorteile:
- 1. Ein Verfahren zur Montage eines Halbleiterchips durch Verwendung einer Lotfüllung wird in Folge der Reduktion der Anzahl der Wärmebehandlungen vereinfacht, ohne die bestehenden Eigenschaften zu verändern.
- 2. Es ist bequem und vermindert die Möglichkeit des Deplazierens des Halbleiterchips, weil die Lotfüllung vorher an den Halbleiterchip und das Substrat angebracht wird.
- 3. Es ist möglich das Verfahren zur Herstellung eines Halbleiterchips zu verkürzen, weil die Lötperlen auf dem Halbleiterchip nicht notwendig sind und das Herstellungsverfahren der Lötperlen eingespart werden könnte.
- 1. A method for mounting a semiconductor chip by using a solder fill is simplified as a result of the reduction in the number of heat treatments, without changing the existing properties.
- 2. It is convenient and reduces the possibility of depleting the semiconductor chip because the solder fill is previously attached to the semiconductor chip and the substrate.
- 3. It is possible to shorten the process for producing a semiconductor chip because the solder bumps on the semiconductor chip are not necessary and the production process of the solder bumps could be saved.
Claims (2)
Priority Applications (1)
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DE10356981A DE10356981B3 (en) | 2003-12-05 | 2003-12-05 | Mounting semiconductor chip on substrate, especially circuit board, involves arranging solder filling with solder bead, underfill materials on chip, applying to chip with adhesive band, mounting on substrate, melting by heat treatment |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
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DE10356981A DE10356981B3 (en) | 2003-12-05 | 2003-12-05 | Mounting semiconductor chip on substrate, especially circuit board, involves arranging solder filling with solder bead, underfill materials on chip, applying to chip with adhesive band, mounting on substrate, melting by heat treatment |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3862790A (en) * | 1971-07-22 | 1975-01-28 | Plessey Handel Investment Ag | Electrical interconnectors and connector assemblies |
EP0327399A1 (en) * | 1988-02-05 | 1989-08-09 | Raychem Limited | Method of manufacturing an uniaxially electrically conductive article |
US5637176A (en) * | 1994-06-16 | 1997-06-10 | Fry's Metals, Inc. | Methods for producing ordered Z-axis adhesive materials, materials so produced, and devices, incorporating such materials |
-
2003
- 2003-12-05 DE DE10356981A patent/DE10356981B3/en not_active Expired - Fee Related
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US3862790A (en) * | 1971-07-22 | 1975-01-28 | Plessey Handel Investment Ag | Electrical interconnectors and connector assemblies |
EP0327399A1 (en) * | 1988-02-05 | 1989-08-09 | Raychem Limited | Method of manufacturing an uniaxially electrically conductive article |
US5637176A (en) * | 1994-06-16 | 1997-06-10 | Fry's Metals, Inc. | Methods for producing ordered Z-axis adhesive materials, materials so produced, and devices, incorporating such materials |
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