DE10334797B3 - Semiconductor component with field stop layer with p or n channel transistor has transistor gate arranged so potential exists between gate, bounding part of spatial charging zone area to cause a current to flow through field stop layer - Google Patents

Abstract

The device (1A) has a spatial charging zone area (5) and a field stop layer (4) with at least part of a p or n channel transistor for limiting a spatial charging zone that can be formed in the spatial charging zone area. The transistor's gate (14,19) is in direct contact with the spatial charging zone area. It is arranged so that a large enough potential exists between the gate and the bounding part of the spatial charging zone area to switch the p or n channel (15,16) of the transistor to cause a current to flow via the channel through the field stop layer.

Description

The The invention relates to a semiconductor device comprising a field stop layer to the spatial Limiting a space charge zone that can be formed in the semiconductor component contains.

Semiconductor devices with field stop layer are known and used in a variety of ways. A detailed description of the technical principles of semiconductor devices with field stop layer can be found for example in the patent US 5,668,385 A [1]. Here, only a brief summary of the operation of such components will be given below.

Field stop layers are used for example in semiconductor devices, the in a vertical pnp structure with one at the front blocking pn junction In the n-area have such a low doping that the electric Field or the space charge zone in the case of blocking up to one rear would extend p area. Such a "penetration" of the electrical Feldes or the space charge zone is referred to as "punch-through" and causes a breakdown voltage of the semiconductor device is reduced. By using a field stop layer (Field stop devices) is between the low-doped n-type region and the back p area an additional, a little bit higher doped n-type field, through which the electric field complete is reduced. Thus, the punch-through effect can be safely avoided become. Semiconductor devices with field stop layer are used as field stop devices and can, for example IGBTs (Insulated Gate Bipolar Transistor), MCTs (MOS Controlled Thyristor), GTOs (gate turn-off thyristor), ESTs (emitter switched thyristor), Be thyristors or bipolar transistors. Even diodes can be in be designed in this way, in which case usually a back p area through a highly doped n-area is replaced. The upstream field stop prevents this Penetration of the space charge zone into the highly doped n-region.

If Alternatively, no field stop layer should be used low-doped n-area can be made so thick that the electric field or the space charge zone even when a high voltage is applied still "in time" in front of the p-emitter ends within the low-doped n-region. This is disadvantageous that compared to semiconductor devices with field stop layer at the same "dielectric strength" a significantly higher component thickness is required, which high transmission or switching losses occur. Such devices are called "NPT" - (non-punch-through) - Designated components.

Field stop devices However, they have the following disadvantages: When switching off, for example IGBTs or when commutating diodes occurs at the corresponding semiconductor device an overvoltage on that by the current decline always present parasitic inductors is caused. This overvoltage can destroy the semiconductor device when an allowable operating voltage of the component exceeded becomes. Furthermore you can Problems in measuring the breakdown voltage of semiconductor devices occur. While such a measurement process is the semiconductor device defined current impressed and the resulting voltage is measured. The measuring point is located usually in a steep slope area of a breakdown characteristic. For field stop components the breakthrough characteristic can already have a very low electrical currents have negative differential resistance. Is that the case, so the current becomes a filament as the voltage decreases contract, whereby the semiconductor device due to the high local power dissipation density is generally destroyed.

In the publication DE 197 50 827 A1 For example, there is described a power semiconductor device including a field stop layer and a plurality of p- and n-channel transistors, respectively (pn junction between an emitter and the field stop layer and gates which are electrically isolated from the pn junctions by an insulating layer). By means of the p- or n-channel transistors, channels within the field stop layer 14 be induced, whereby current flows through the field stop layer 14 can be produced through.

Continue to be in this regard to the document DE 44 38 896 A1 directed.

The The object underlying the invention is a semiconductor device To specify with field stop layer, with the disadvantages described above can be avoided.

to solution This object is achieved by the invention as a semiconductor component according to claim 1 and 2 ready. Advantageous designs or developments of the inventive concept can be found in the subclaims.

The semiconductor device according to the invention has a space charge zone region and a field stop layer for the spatial limitation of a on the space charge zone area can be formed space charge zone. At least part of a p-channel or n-channel transistor is provided in the field stop layer. The gate of the p- or n-channel transistor is in direct contact with the space charge zone region and is arranged so that depending on the expansion of the space charge region or depending on the strength of a corresponding electric field, a potential difference between the gate and the gate adjacent portion of the space charge zone region, which is sufficiently high to induce / pervode a p / n channel of the p- or n-channel transistor without separate drive, so that a current through the p- / n-channel can flow through the field stop layer.

In order to is it possible, on the one hand, the voltage applied to the semiconductor device voltages without additional Wiring to a maximum value too limit, on the other hand, a breakdown characteristic is obtained, even with relatively large ones electric currents has a positive differential resistance.

The inventive semiconductor device is preferably designed so that at least a part of the field stop layer to an emitter layer or emitter region (hereinafter referred to as emitter layer) of the semiconductor device / the p- / n-channel transistor borders. The gate of the p- / n-channel transistor is opposite to that Space charge zone area so arranged or stands with this in connection that a potential difference between the gate and the emitter layer of the semiconductor component or of the p / n-channel transistor arises, being the height the potential difference of the degree of expansion of the space charge zone or the local electric field strength in the space charge zone depends. The p- / n-channel transistor is in this case designed to be present a certain potential difference, the gate induces / perverts a p- / n-channel.

To the gate is in direct contact with the space charge zone region or is part of the space charge zone area. alternative for this it is possible the gate opposite the Electrically isolate space charge zone region and with the space charge zone region only about a special one for that to contact provided electrical connection. By appropriate Placement of the ending in the space charge zone area part of electrical connection can in this case the expansion of the space charge zone occurring potential difference between the gate and the emitter layer the semiconductor device or the p / n-channel transistor targeted be set.

The inventive semiconductor structure can in principle find use in all semiconductor devices, the have a field stop layer, for example in an IGBT, EST, GTO or MCT device, as well as in a thyristor, a bipolar transistor or a diode.

The Invention will be described below with reference to the figures exemplary embodiment explained in more detail.

It demonstrate:

1 an IGBT semiconductor device according to the prior art with associated field distribution of the electric field, which is caused in the blocking case by the formation of the space charge zone;

2 a first embodiment of a semiconductor device with field stop layer according to the invention with an associated potential profile inside and outside a gate;

3 a preferred embodiment of an IGBT semiconductor device with field stop layer as the first application example of the invention;

4 an alternative embodiment of an IGBT semiconductor device with field stop layer as a second application example of the invention;

5 a preferred embodiment of a diode with field stop layer as a third embodiment of the invention;

6 a diode with field stop layer according to the prior art;

7 a lateral IGBT semiconductor device with field stop layer as a fourth application example of the invention;

8th an alternative embodiment of a lateral IGBT semiconductor device with field stop layer as the fifth application example of the invention.

In the figures are identical or corresponding components or component groups with the same reference numerals.

1 shows an IGBT semiconductor device 1 structured as follows: on a backside metal layer 2 is a p-emitter layer 3 applied, in turn, an n-field stop layer 4 is provided. On the n-field stop layer 4 is a n-type base region 5 whose doping strength is opposite that of the n-field stop layer 4 is low. In the top of the n-base region or the n-base layer 5 are a first and second p-body area 6 . 7 admitted. In the first p-body area 6 there is a first n source region 8th ; analogous to this is in the second p-body area 7 a second n source region 9 intended. The first p-body area 6 is from the second p-body area 7 through the n-base area 5 separated. Furthermore, an insulator layer (oxide layer) 10 provided the top of the n-base area 5 and parts of the first and second p-body regions 6 . 7 or the first and second n-source regions 8th . 9 covers. Within the oxide layer 10 is a gate 11 intended. From the oxide layer 10 uncovered surface portions of the first and second p-type body areas 6 . 7 or the first and second n-source regions 8th . 9 be through a front metal layer 12 covered, which is also the oxide layer 10 covered.

In the blocking case, one of the first and second p-body area 6 . 7 outgoing, in the n-base area 5 propagating space charge zone through the n field stop layer 4 stopped, so that with the reference numerals 13 indicated field distribution results.

In 2 is the schematic structure of a semiconductor device according to the invention 1A shown with field stop layer on the basis of a preferred embodiment. The in 2 Structure shown differs from that in 1 essentially in that the p-emitter layer 3 and the n-field stop layer 4 through an insulator structure 14 (For example, silica) are broken. The insulator structure 14 has a horseshoe-like shape into which a gate 19 a p-channel transistor is received. The insulator structure 14 isolated the gate 19 opposite the backside metal layer 2 , In the boundary areas where the n-field stop layer 4 to the insulator structure 14 a p-channel is in each case inducible / switchable to passage (first and second p-channel 15 . 16 ). A front of the in 2 shown semiconductor device 1A is merely a schematic pn junction with a front metal layer 12 and a p-layer 17 indicated. These two layers can be replaced by any other structure. The p-channel transistor is within the reference numeral 18 marked dotted frame.

Through the insulator structure 14 is caused when expanding the space charge zone to an area indicated by an arrow 20 is hinted inside the gate 19 there is less potential compared to positions at the same vertical position within the adjacent laterally adjacent n-field stop layer 4 or p-emitter layer 3 lie. This potential difference causes the induction of the two p-channels 15 . 16 or the switching of the two p-channels 15 . 16 on passage.

In 2 is still a potential course 31 inside the gate 19 and a potential course 32 outside the gate 19 shown. The potential course 31 inside the gate 19 is, for example, the potential course that results when moving along the left edge of the frame 18 emotional. Analogous to this results the potential curve 32 outside the gate 19 if you look along the right edge of the frame 18 through the semiconductor device 1A emotional. The two potentials 31 . 32 are up to a potential course intersection 34 identical, then split into two different potentials, so that a potential difference 33 arises. The potential difference 33 lies between the gate 19 and the p-emitter layer 3 and causes the first and second p-channel, respectively 15 . 16 induced / permeable is designed. In other words, the potential difference is available as a gate voltage for the p-channel transistor. The potentials for the in 3 to 8th shown semiconductor components are analogous thereto. Since, strictly speaking, these would have to be represented along a path that is not straight, such potential courses are not shown for the sake of clarity.

The in 3 shown construction of a semiconductor device according to the invention 1B is different from the one in 2 shown construction in that the in 2 shown front side structure (front metal layer 12 , p-area 17 ) through the in 1 shown front side structure is replaced. The gate is still there 19 in direct contact with the n-base area 5 that is, the gate 19 consists of the same material as the n-base area 5 , The functioning of in 3 embodiment shown corresponds to the operation of in 2 shown embodiment.

The in 4 shown construction of a semiconductor device according to the invention 1C is essentially the same as in 3 shown construction, with the exception that the gate 19 not completely from the material of the n-base area 5 exists (that is not homogeneously doped), but from p- or n-layers (reference numerals 21 respectively. 22 ), the continuations of the laterally adjacent semiconductor layers (n-field stop layer 4 and p-emitter layer 3 ). Also in this case, due to the presence of the insulator structure 14 a potential difference between the gate 19 and the p-emitter layer 3 generated, wherein the potential difference when exceeding a certain potential threshold, the p-channels 15 . 16 (not shown here) induced / permeable switches.

In 5 is a diode as another example of application of the semiconductor device according to the invention 1D shown with field stop layer. The structure of this diode differs from that in 4 essentially in that the p-emitter layer 3 at least partially by an n ⁺ emitter layer 24 is replaced. The front of the diode 1D is through a p-emitter layer 23 and a front side metal layer mounted thereon 12 educated. Also in this case, due to the presence of the insulator structure 14 a potential difference between the gate 19 and the p-emitter layer 3 generated, wherein the potential difference when exceeding a certain potential threshold, the p-channels 15 . 16 (not shown here) induced / permeable switches.

This in 6 shown example of a diode 1E with field stop layer according to the prior art differs from that in 5 shown construction 1D a diode according to the invention in that the n-field stop layer 4 or the n ⁺ emitter layer 24 not by an insulator structure 14 are interrupted. Another difference is that in the n ⁺ emitter layer 24 no p-emitter layer 3 is integrated.

In 7 and 8th are the lateral structures analogous in the embodiments described above 1F . 1G of semiconductor devices according to the invention shown. 7 shows a preferred embodiment of a lateral IGBT semiconductor device according to the invention 1F , The n-base area 5 is on an oxide or silicon layer (weakly p-doped) 25 applied. In the n-base area 5 is a p-body area 6 and a p-emitter layer 3 embedded, wherein the p-emitter layer 3 through an n-field stop layer 4 from the n-base area 5 is disconnected. Furthermore, on the p-body area 6 an emitter layer 26 provided, and on the p-emitter layer 3 a collector layer 27 intended.

If the space charge zone of the p-body area 6 starting in the direction of the n-field stop layer 4 this propagates through the n-field stop layer 4 stopped. The insulator structure 14 causes in this case that between the left of the insulator structure 14 and the right-hand portion of the n-field stop layer 4 or to the right of it located part of the p-emitter layer 3 (which together form a gate for inducing a p-channel 15 form) a potential difference that is large enough to the p-channel 15 to induce or permeable switch.

This in 8th shown embodiment 1G of a lateral IGBT semiconductor device according to the invention differs from that in FIG 7 shown construction in that instead of the insulator structure 14 an additional gate 28 is provided by an insulator layer, for example, an oxide layer 10 from the n-base area 5 is electrically isolated. The additional gate 28 however, is one within the n base area 5 located n-area 29 connected, which has a slightly higher doping than that of the n-base region 5 having. The electrical connection of the additional gate 28 with the n-area 29 causes between the p-emitter layer 3 and the additional gate 28 a potential difference is created which is sufficient to form a p-channel 15 to induce or permeable switch. The potential difference occurs as soon as one of the p-body area 6 spreading space charge zone the N area 29 achieved there and generates an electric field of sufficient strength. By changing the position of the n-area 29 (For example, in the horizontal or vertical direction), the height of such a potential difference can be adjusted specifically.

The Invention leaves may also be represented as follows: The basic principle of the invention consists of, in field stop devices, the field stop layer a p-channel transistor to bridge that when applying a predetermined collector-emitter voltage or a particular applied to the field stop layer field strength by itself turns on and thus generates a current flow.

On this is the shutdown overvoltage limited to a value at which the p-channel transistor from the the leakage inductances generated forced electricity. As the current when turning on the p-channel transistor not suddenly, but only gradually increases with increasing voltage, there is also a breakdown characteristic with positive differential resistance, so that the breakdown voltage can be measured easily. The p-channel transistor has as Source a back p-emitter, as drain a front p-region (channel region, body region), wherein a blocking voltage receiving space charge zone starting from the front p-area to the field stop area or another Piece far extends into this. The p-channel forms in the field stop layer between the p-emitter and the space charge zone. The gate of the p-channel transistor has no external connection, but is communicates with the end of the space charge zone and is over the generated by the space charge zone potential difference to the p-emitter when it exceeds the threshold voltage of the p-channel transistor.

The invention thus provides field stop devices (IGBTs, ESTs, GTOs, MCTs, diodes, and the like) having an n- or p-channel transistor, which transistors are provided upon application of a certain collector-emitter voltage or a specific applied to the field stop layer field strength by itself and thus generate a current flow ( 2 ). This is preferably achieved by arranging in the rear side of the field stop component a gate which is insulated from the rear side metallization and which can induce a MOS channel between a doping region connected to the rear side metallization and the space charge zone spanned in the blocking case ( 2 ). The gate may be in direct contact with the n-base. In 3 and 4 Embodiments are shown in which said doping region is the backside p-emitter. In 5 a diode is shown, wherein said doping region is a p-region arranged parallel to the backside n-emitter. The gate can here be doped like the n-base ( 2 . 3 ) or, alternatively, as the respective laterally adjacent regions ( 4 . 5 ) or otherwise (highly n- or p-doped, doped polysilicon).

Of the completeness it should be mentioned, that in [2] components are described, both on the front as well as on the back Switchable MOS channels exhibit. In [3] is a similar structure shown, in which the gates are each arranged in trenches (trenches) are. Other structures with backside gates are shown in [4, 5]. All these structures are about the back gate deliberately over a separate associated Connection to turn on or off or even the Type of Durchlasszustandes influence.

All described embodiments can Naturally be inversely doped, d. H. n and p regions can be interchanged be.

references

• [1] Farmer: US 5,668,385 A
• [2] Temple: US 4,816,892 A.
• [3] JP2001 320049-A
• [4] Sittig: DE 198 48 596 C2
• [5] Terashima: US 5,293,056 A

1

IGBT semiconductor device

2

Back metal layer

3

p-emitter layer

4

N-type field stop layer

5

n-type base region

6

first p-body region

7

second p-body region

8th

first n-type source region

9

second n-type source region

10

oxide

11

gate

12

Front metal layer

13

field distribution

14

insulator structure

15

first p-channel

16

two p-channel

17

p-layer

18

frame

19

gate

20

arrow

21

n-layer

22

p-layer

23

p-emitter layer

24

n ⁺ emitter layer

25

Oxide- or silicon layer

26

emitter layer

27

collector layer

28

additional gate

29

n-region

30

electrical connection

31

potential curve inside the gate

32

potential curve outside of the gate

33

potential difference

34

Potential curve intersection

Claims (4)

Semiconductor device ( 1A to 1F ), which is a space charge zone area ( 5 ) and a field stop layer ( 4 ) for the spatial delimitation of one in the space charge zone area ( 5 ) can be formed space charge zone, wherein in the field stop layer ( 4 ) at least a portion of a p- or n-channel transistor is provided, characterized in that the gate ( 14 . 19 ) of the p- or n-channel transistor with the space charge zone region ( 5 ) is in direct contact and is arranged so that, depending on the extent of the space charge zone or depending on the strength of a corresponding electric field, a potential difference between the gate ( 14 . 19 ) and the part of the space charge zone area adjoining the gate ( 5 ), which is sufficiently high to form a p / n channel ( 15 . 16 ) of the p- or n-channel transistor to turn on / pervert, so that a current through the p- / n-channel ( 15 . 16 ) through the field stop layer ( 4 ) can flow through. Semiconductor device ( 1G ), which is a space charge zone area ( 5 ) and a field stop layer ( 4 ) for the spatial delimitation of one in the space charge zone area ( 5 ) can be formed space charge zone, wherein in the field stop layer ( 4 ) at least a portion of a p- or n-channel transistor is provided, characterized in that the gate ( 28 ) of the p- or n-channel transistor with respect to the space charge zone region ( 5 ) is electrically isolated, but via an electrical connection ( 30 ) with a certain range ( 29 ) of the space charge zone area ( 5 ) is in electrical contact and is arranged so that, depending on the extent of the space charge zone or in dependence the strength of a corresponding electric field a potential difference between the gate ( 28 ) and the particular area of the space charge zone area that is sufficiently high to form a p / n channel ( 15 . 16 ) of the p- or n-channel transistor without separate activation / to switch permeable, so that a current through the p- / n-channel ( 15 . 16 ) through the field stop layer ( 4 ) can flow through. Semiconductor device ( 1A to 1G ) according to claim 1 or 2, characterized in that at least a part of the field stop layer ( 4 ) to an emitter layer ( 3 ) of the semiconductor device ( 1A to 1G ) or the p / n channel ( 15 . 16 ) adjoins. Semiconductor device ( 1A to 1G ) according to one of the preceding claims, characterized in that the semiconductor component is an IGBT, EST, GTO or MCT component, a thyristor, a bipolar transistor or a diode.