DE10333315A1 - Power semiconductor module, has low resistance and/or low inductance substrate sections so that conductive tracks with opposite current directions lie near to each other - Google Patents

Power semiconductor module, has low resistance and/or low inductance substrate sections so that conductive tracks with opposite current directions lie near to each other Download PDF

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Publication number
DE10333315A1
DE10333315A1 DE10333315A DE10333315A DE10333315A1 DE 10333315 A1 DE10333315 A1 DE 10333315A1 DE 10333315 A DE10333315 A DE 10333315A DE 10333315 A DE10333315 A DE 10333315A DE 10333315 A1 DE10333315 A1 DE 10333315A1
Authority
DE
Germany
Prior art keywords
conductive tracks
low
power semiconductor
semiconductor module
current directions
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE10333315A
Other languages
German (de)
Other versions
DE10333315B4 (en
Inventor
Bernd Gutsmann
Thomas Passe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Infineon Technologies AG
Original Assignee
EUPEC GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by EUPEC GmbH filed Critical EUPEC GmbH
Priority to DE10333315A priority Critical patent/DE10333315B4/en
Publication of DE10333315A1 publication Critical patent/DE10333315A1/en
Application granted granted Critical
Publication of DE10333315B4 publication Critical patent/DE10333315B4/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5385Assembly of a plurality of insulating substrates
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/07Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00
    • H01L25/072Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L29/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48225Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H01L2224/48227Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/42Wire connectors; Manufacturing methods related thereto
    • H01L24/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L24/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/13Discrete devices, e.g. 3 terminal devices
    • H01L2924/1304Transistor
    • H01L2924/1305Bipolar Junction Transistor [BJT]
    • H01L2924/13055Insulated gate bipolar transistor [IGBT]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/30Technical effects
    • H01L2924/301Electrical effects
    • H01L2924/30107Inductance

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Multi-Conductor Connections (AREA)
  • Wire Bonding (AREA)

Abstract

The module has a planar connection section (18) formed from a substrate section (1b) on which strip-shaped conductive tracks (7b) are provided for direct electrical connection of the module to an external connection. At least one substrate section (1a,1b) has a low resistance and/or low inductance so that current-carrying tracks (6,7) with opposite current directions are arranged near to each other and lie opposite each other over a large area.
DE10333315A 2003-07-22 2003-07-22 The power semiconductor module Expired - Fee Related DE10333315B4 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE10333315A DE10333315B4 (en) 2003-07-22 2003-07-22 The power semiconductor module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10333315A DE10333315B4 (en) 2003-07-22 2003-07-22 The power semiconductor module

Publications (2)

Publication Number Publication Date
DE10333315A1 true DE10333315A1 (en) 2005-03-10
DE10333315B4 DE10333315B4 (en) 2007-09-27

Family

ID=34177206

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10333315A Expired - Fee Related DE10333315B4 (en) 2003-07-22 2003-07-22 The power semiconductor module

Country Status (1)

Country Link
DE (1) DE10333315B4 (en)

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2521175A1 (en) * 2011-05-03 2012-11-07 ALSTOM Transport SA Electrical interconnection device of at least one electronic component with a power supply comprising means for reducing loop inductance between a first and a second terminal
DE102010003533B4 (en) * 2010-03-31 2013-12-24 Infineon Technologies Ag Substrate arrangement, method for producing a substrate arrangement, method for producing a power semiconductor module and method for producing a power semiconductor module arrangement
EP2814059A4 (en) * 2012-02-09 2015-10-14 Fuji Electric Co Ltd Semiconductor device
DE102014109385A1 (en) * 2014-07-04 2016-01-07 Karlsruher Institut für Technologie Electronic component arrangement
EP3063859A4 (en) * 2013-10-29 2018-02-14 HRL Laboratories, LLC Half bridge circuit
US10659032B2 (en) 2015-10-09 2020-05-19 Hrl Laboratories, Llc GaN-on-sapphire monolithically integrated power converter

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE9203000U1 (en) * 1992-03-06 1992-06-17 Siemens AG, 8000 München Semiconductor arrangement with several semiconductor bodies
DE10005754A1 (en) * 1999-08-12 2001-08-23 Semikron Elektronik Gmbh Power semiconductor circuit with oscillation suppression, and auxiliary emitter connection formed on copper island isolated from surrounding copper coating
DE10026743C1 (en) * 2000-05-30 2002-01-03 Eupec Gmbh & Co Kg Substrate for receiving a circuit arrangement
DE10139071A1 (en) * 2000-08-09 2002-03-07 Murata Manufacturing Co converter device

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09312357A (en) * 1996-05-21 1997-12-02 Fuji Electric Co Ltd Semiconductor device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE9203000U1 (en) * 1992-03-06 1992-06-17 Siemens AG, 8000 München Semiconductor arrangement with several semiconductor bodies
DE10005754A1 (en) * 1999-08-12 2001-08-23 Semikron Elektronik Gmbh Power semiconductor circuit with oscillation suppression, and auxiliary emitter connection formed on copper island isolated from surrounding copper coating
DE10026743C1 (en) * 2000-05-30 2002-01-03 Eupec Gmbh & Co Kg Substrate for receiving a circuit arrangement
DE10139071A1 (en) * 2000-08-09 2002-03-07 Murata Manufacturing Co converter device

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102010003533B4 (en) * 2010-03-31 2013-12-24 Infineon Technologies Ag Substrate arrangement, method for producing a substrate arrangement, method for producing a power semiconductor module and method for producing a power semiconductor module arrangement
EP2521175A1 (en) * 2011-05-03 2012-11-07 ALSTOM Transport SA Electrical interconnection device of at least one electronic component with a power supply comprising means for reducing loop inductance between a first and a second terminal
FR2974969A1 (en) * 2011-05-03 2012-11-09 Alstom Transport Sa DEVICE FOR ELECTRICALLY INTERCONNECTING AT LEAST ONE ELECTRONIC COMPONENT WITH AN ELECTRIC POWER SUPPLY COMPRISING MEANS FOR REDUCING AN LOOP INDUCTANCE BETWEEN THE FIRST AND SECOND TERMINALS
EP2814059A4 (en) * 2012-02-09 2015-10-14 Fuji Electric Co Ltd Semiconductor device
US9305910B2 (en) 2012-02-09 2016-04-05 Fuji Electric Co., Ltd. Semiconductor device
CN104040715B (en) * 2012-02-09 2017-02-22 富士电机株式会社 Semiconductor device
EP3063859A4 (en) * 2013-10-29 2018-02-14 HRL Laboratories, LLC Half bridge circuit
DE102014109385A1 (en) * 2014-07-04 2016-01-07 Karlsruher Institut für Technologie Electronic component arrangement
US10659032B2 (en) 2015-10-09 2020-05-19 Hrl Laboratories, Llc GaN-on-sapphire monolithically integrated power converter

Also Published As

Publication number Publication date
DE10333315B4 (en) 2007-09-27

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: INFINEON TECHNOLOGIES AG, 81669 MUENCHEN, DE

8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee