DE10316579B4 - Treiberschaltung mit einer Mehrzahl von Treibern zum parallelen Treiben von Signalen - Google Patents

Treiberschaltung mit einer Mehrzahl von Treibern zum parallelen Treiben von Signalen Download PDF

Info

Publication number
DE10316579B4
DE10316579B4 DE10316579A DE10316579A DE10316579B4 DE 10316579 B4 DE10316579 B4 DE 10316579B4 DE 10316579 A DE10316579 A DE 10316579A DE 10316579 A DE10316579 A DE 10316579A DE 10316579 B4 DE10316579 B4 DE 10316579B4
Authority
DE
Germany
Prior art keywords
drivers
parallel
driver circuit
driving signals
signals
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10316579A
Other languages
English (en)
Other versions
DE10316579A1 (de
Inventor
Marcin Gnat
Ralf Schneider
Joerg Vollrath
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Polaris Innovations Ltd
Original Assignee
Infineon Technologies AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Infineon Technologies AG filed Critical Infineon Technologies AG
Priority to DE10316579A priority Critical patent/DE10316579B4/de
Priority to US10/819,222 priority patent/US6956404B2/en
Publication of DE10316579A1 publication Critical patent/DE10316579A1/de
Application granted granted Critical
Publication of DE10316579B4 publication Critical patent/DE10316579B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G11C7/1069—I/O lines read out arrangements
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1096—Write circuits, e.g. I/O line write drivers
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/0008—Arrangements for reducing power consumption
    • H03K19/0019—Arrangements for reducing power consumption by energy recovery or adiabatic operation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Logic Circuits (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
DE10316579A 2003-04-10 2003-04-10 Treiberschaltung mit einer Mehrzahl von Treibern zum parallelen Treiben von Signalen Expired - Fee Related DE10316579B4 (de)

Priority Applications (2)

Application Number Priority Date Filing Date Title
DE10316579A DE10316579B4 (de) 2003-04-10 2003-04-10 Treiberschaltung mit einer Mehrzahl von Treibern zum parallelen Treiben von Signalen
US10/819,222 US6956404B2 (en) 2003-04-10 2004-04-07 Driver circuit having a plurality of drivers for driving signals in parallel

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10316579A DE10316579B4 (de) 2003-04-10 2003-04-10 Treiberschaltung mit einer Mehrzahl von Treibern zum parallelen Treiben von Signalen

Publications (2)

Publication Number Publication Date
DE10316579A1 DE10316579A1 (de) 2004-11-04
DE10316579B4 true DE10316579B4 (de) 2005-04-28

Family

ID=33103317

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10316579A Expired - Fee Related DE10316579B4 (de) 2003-04-10 2003-04-10 Treiberschaltung mit einer Mehrzahl von Treibern zum parallelen Treiben von Signalen

Country Status (2)

Country Link
US (1) US6956404B2 (de)
DE (1) DE10316579B4 (de)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE102004047664B4 (de) * 2004-09-30 2013-02-07 Qimonda Ag Schaltung und Verfahren zum Erzeugen eines Ausgangssignals
US20080168273A1 (en) * 2007-01-05 2008-07-10 Chung Hyen V Configuration mechanism for flexible messaging security protocols
TWM406327U (en) * 2010-10-27 2011-06-21 Aravision Inc 3D LC lens driving circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0927742A (ja) * 1995-07-12 1997-01-28 Nec Corp 出力回路
JPH09321602A (ja) * 1996-05-28 1997-12-12 Nippon Telegr & Teleph Corp <Ntt> 出力バッファ

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6356115B1 (en) * 1999-08-04 2002-03-12 Intel Corporation Charge sharing and charge recycling for an on-chip bus

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0927742A (ja) * 1995-07-12 1997-01-28 Nec Corp 出力回路
JPH09321602A (ja) * 1996-05-28 1997-12-12 Nippon Telegr & Teleph Corp <Ntt> 出力バッファ

Also Published As

Publication number Publication date
US20040222820A1 (en) 2004-11-11
DE10316579A1 (de) 2004-11-04
US6956404B2 (en) 2005-10-18

Similar Documents

Publication Publication Date Title
DE60327290D1 (de) Fahrzeugantriebskraftkontrolle
DE50115811D1 (de) Einrichtung zum bereitstellen von signalen in einem kraftfahrzeug
DE602004008308D1 (de) Leitungstreiber auf dac-basis mit wählbaren präemphase-signalpegeln
DE602006004063D1 (de) Brennkraftbetriebenes werkzeug zum eintreiben von befestigungselementen mit verbundenen kammern
DE50300793D1 (de) Fahrerinformationsvorrichtung
TW200609893A (en) Display device and driving method thereof
DE602005012074D1 (de) Tragbares werkzeug zum eintreiben von befestigungselementen
DE602004026472D1 (de) Fahrzeugantriebsmechanismus
DE602005015621D1 (de) Motortraining mit gehirnplastizität
ATE403927T1 (de) Lichtemittierende anzeige und steuergerät und steuerverfahren dafür
DE602004028507D1 (de) Computerimplementiertes verfahren zum vergleichen von farbe
DE602005005822D1 (de) Schaltkreis und adaptives Verfahren zum Antrieb einer Halbbrückenschaltung
DE502005001389D1 (de) Verfahren zum anzeigen von fahrerinformationen zum einparken
DE602004017361D1 (de) Lenksteuervorrichtung mit Rückstelldrehmomentsteuerung
DE602005027652D1 (de) Organische lichtemittierende Diodenanzeige und Verfahren zu ihrer Ansteuerung
DE602005008299D1 (de) Fahrzeug mit Allradantrieb
DE602004018446D1 (de) Fahrzeugantrieb mit Generatorsteuerung
DE602004023895D1 (de) Verfahren zum Markieren von Kohlenwasserstoffen mit Anthrachinonen
DE602006014788D1 (de) Datentreiber, organische lichtemittierende Anzeige und Verfahren zu ihrer Ansteuerung
DE602004014694D1 (de) Fahrzeugantriebsvorrichtung
DE602005018603D1 (de) Fahrzeug mit verbindbarem vierradantrieb
DE502004001969D1 (de) Gargerät zum regenerieren von gargut
DE502004008113D1 (de) Fahrerinformationsvorrichtung
DE50203073D1 (de) Kraftfahrzeug mit Mitteln zum Erkennen eines Verkehrzeichens
DE602004026977D1 (de) Vorrichtung zum Verbinden von Fäden

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
8327 Change in the person/name/address of the patent owner

Owner name: QIMONDA AG, 81739 MUENCHEN, DE

R081 Change of applicant/patentee

Owner name: INFINEON TECHNOLOGIES AG, DE

Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE

Owner name: POLARIS INNOVATIONS LTD., IE

Free format text: FORMER OWNER: QIMONDA AG, 81739 MUENCHEN, DE

R081 Change of applicant/patentee

Owner name: POLARIS INNOVATIONS LTD., IE

Free format text: FORMER OWNER: INFINEON TECHNOLOGIES AG, 85579 NEUBIBERG, DE

R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee