DE10210085B8 - Verfahren und Prozessor zur Kombination von Daten- und Kontrollflußoperationen - Google Patents

Verfahren und Prozessor zur Kombination von Daten- und Kontrollflußoperationen Download PDF

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Publication number
DE10210085B8
DE10210085B8 DE10210085A DE10210085A DE10210085B8 DE 10210085 B8 DE10210085 B8 DE 10210085B8 DE 10210085 A DE10210085 A DE 10210085A DE 10210085 A DE10210085 A DE 10210085A DE 10210085 B8 DE10210085 B8 DE 10210085B8
Authority
DE
Germany
Prior art keywords
processor
control flow
combining data
flow operations
operations
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE10210085A
Other languages
English (en)
Other versions
DE10210085B4 (de
DE10210085A1 (de
Inventor
Fritz Prof. Dr. Mayer-Lindenberg
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technische Universitaet Hamburg TUHH
Tutech Innovation GmbH
Original Assignee
Technische Universitaet Hamburg TUHH
Tutech Innovation GmbH
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Technische Universitaet Hamburg TUHH, Tutech Innovation GmbH filed Critical Technische Universitaet Hamburg TUHH
Priority to DE10210085A priority Critical patent/DE10210085B8/de
Priority to PCT/EP2003/002295 priority patent/WO2003077118A2/de
Priority to AU2003218698A priority patent/AU2003218698A1/en
Publication of DE10210085A1 publication Critical patent/DE10210085A1/de
Application granted granted Critical
Publication of DE10210085B4 publication Critical patent/DE10210085B4/de
Publication of DE10210085B8 publication Critical patent/DE10210085B8/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3004—Arrangements for executing specific machine instructions to perform operations on memory
    • G06F9/30043—LOAD or STORE instructions; Clear instruction
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30094—Condition code generation, e.g. Carry, Zero flag
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G06F9/3016—Decoding the operand specifier, e.g. specifier format
    • G06F9/30163—Decoding the operand specifier, e.g. specifier format with implied specifier, e.g. top of stack
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/32—Address formation of the next instruction, e.g. by incrementing the instruction counter
    • G06F9/322—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address
    • G06F9/323—Address formation of the next instruction, e.g. by incrementing the instruction counter for non-sequential address for indirect branch instructions

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
  • Multi Processors (AREA)
  • Executing Machine-Instructions (AREA)
DE10210085A 2002-03-08 2002-03-08 Verfahren und Prozessor zur Kombination von Daten- und Kontrollflußoperationen Expired - Fee Related DE10210085B8 (de)

Priority Applications (3)

Application Number Priority Date Filing Date Title
DE10210085A DE10210085B8 (de) 2002-03-08 2002-03-08 Verfahren und Prozessor zur Kombination von Daten- und Kontrollflußoperationen
PCT/EP2003/002295 WO2003077118A2 (de) 2002-03-08 2003-03-06 Verfahren zur maschinenbefehl- und programmgestützten steuerung von prozessoren
AU2003218698A AU2003218698A1 (en) 2002-03-08 2003-03-06 Method for machine instruction assisted and program assisted control of processors

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE10210085A DE10210085B8 (de) 2002-03-08 2002-03-08 Verfahren und Prozessor zur Kombination von Daten- und Kontrollflußoperationen

Publications (3)

Publication Number Publication Date
DE10210085A1 DE10210085A1 (de) 2004-01-15
DE10210085B4 DE10210085B4 (de) 2008-01-31
DE10210085B8 true DE10210085B8 (de) 2008-11-27

Family

ID=27797592

Family Applications (1)

Application Number Title Priority Date Filing Date
DE10210085A Expired - Fee Related DE10210085B8 (de) 2002-03-08 2002-03-08 Verfahren und Prozessor zur Kombination von Daten- und Kontrollflußoperationen

Country Status (3)

Country Link
AU (1) AU2003218698A1 (de)
DE (1) DE10210085B8 (de)
WO (1) WO2003077118A2 (de)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5636352A (en) * 1994-12-16 1997-06-03 International Business Machines Corporation Method and apparatus for utilizing condensed instructions

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2616182B2 (ja) * 1990-08-29 1997-06-04 三菱電機株式会社 データ処理装置
US5850563A (en) * 1995-09-11 1998-12-15 International Business Machines Corporation Processor and method for out-of-order completion of floating-point operations during load/store multiple operations
US6292845B1 (en) * 1998-08-26 2001-09-18 Infineon Technologies North America Corp. Processing unit having independent execution units for parallel execution of instructions of different category with instructions having specific bits indicating instruction size and category respectively

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5636352A (en) * 1994-12-16 1997-06-03 International Business Machines Corporation Method and apparatus for utilizing condensed instructions

Also Published As

Publication number Publication date
AU2003218698A1 (en) 2003-09-22
WO2003077118A2 (de) 2003-09-18
WO2003077118A3 (de) 2004-02-12
DE10210085B4 (de) 2008-01-31
DE10210085A1 (de) 2004-01-15

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8127 New person/name/address of the applicant

Owner name: TUTECH INNOVATION GMBH, 21079 HAMBURG, DE

8327 Change in the person/name/address of the patent owner

Owner name: TUTECH INNOVATION GMBH, 21079 HAMBURG, DE

Owner name: TECHNISCHE UNIVERSITAET HAMBURG-HARBURG, 21073, DE

8364 No opposition during term of opposition
8396 Reprint of erroneous front page
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20111001