DE102022124373A1 - Power converter for an electrical machine of a vehicle and method for operating a power converter - Google Patents

Abstract

The present invention relates to a power converter (10) for an electrical machine (12) of a vehicle (40) and a method for operating a power converter (10). The power converter (10) has at least one B6 bridge (14) with three half bridges (16), an intermediate circuit capacitor (34), and a direct current input (28, 30). Each half bridge (16) has a pair of complementary field effect transistors (18, 20) and a center tap (22) arranged between them for applying a three-phase alternating current (L1, L2, L3) to the electrical machine (12). The power converter (10) is coupled to a control device (36), which is set up in such a way that for each current phase of the three-phase alternating current (L1, L2, L3), the complementary field effect transistors (18, 20) of the respective half bridges (16) are activated by means of gate signals (G1 , G2) are switched according to an application of a positive high voltage (HV+) and a negative high voltage (HV-) in such a way that complementary commutation cells are provided. A dead time is taken into account by the control device (36) between switching the first of the complementary field effect transistors (18, 20) and the second of the complementary field effect transistors (18, 20) of the respective half bridges (16). The dead time is selected in such a way that a reduction in magnitude is ensured for high-frequency interference signal components.

Description

The present invention relates to a power converter for an electrical machine of a vehicle and a method for operating a power converter.

In known power converters (also called inverters) for electrical machines of vehicles, a direct current input signal is converted into several alternating current output signals by means of switching devices in order to be able to provide signals that are appropriate for different current phases of the electrical machine to act on the windings of the electrical machine, for example as a function the relative positions of the rotor and the stator, or respective poles thereof.

Typical inverter topologies have several half-bridges with respective switching devices, for example transistors that act as high-side and low-side switching devices and between which a center tap is arranged to provide an output signal of the respective half-bridge. The switching devices are controlled by means of suitable control signals, for example gate signals for transistors. The input signal of such a half-bridge is high-voltage signals (HV+/HV-), which are provided, for example, by a high-voltage storage device in a vehicle.

Corresponding commutation cells of the power converter are provided by corresponding switching positions of the high-side and low-side switching devices. For each commutation cell, one of the respective switching devices (high-side and low-side switching devices) must be blocking in order to prevent a short circuit from occurring with respect to the high voltage provided as an input signal. Therefore, a dead time between switching operations of the high-side and low-side switching devices is taken into account. This means that first a first switching device is switched from conducting to blocking and then an interval corresponding to the dead time is waited before the corresponding switching device is switched from blocking to conducting. The dead time prevents hard short circuits between the high voltage poles. The dead time is chosen to be long enough to avoid even partial bridge short circuits.

However, the dead time causes power loss, which is why, according to previous approaches, it is chosen to be as short as possible, taking into account a safety margin (e.g. 0.5 µs).

For the purpose of coupling the direct current and alternating current circuits, today's power converters have an intermediate circuit capacitor whose capacity is very large (up to the mF regime), so that frequency-dependent interference occurs due to its dimensions, which are problematic with regard to electromagnetic compatibility (EMC). The EMC interference is largely caused by natural oscillations of the commutation cells excited in the high frequency range (>1 MHz), since the natural resonances depend on the inductance of the intermediate circuit capacitor, which is high in the MHz regime. Therefore, large interference amplitudes occur in the MHz range. In contrast, the low frequency ranges (kHz range) are uninteresting because the vehicle itself does not produce any significant emissions in this frequency range.

According to various standards, for example the so-called globally uniform light vehicle test procedure (WLTP), frequency-dependent EMC limit values are specified, which must be adhered to by the power converters or the vehicle's underlying electrical systems. Previous approaches provide for complex filter structures in order to reduce the interference caused in the MHz range to such an extent that the EMC limit values are adhered to. However, such filter devices increase the number of components and the required installation space, cause power losses themselves, require additional cost-intensive cooling concepts and thus cause increased production costs, especially in the area of high-voltage applications explained here.

The invention is therefore based on the object of eliminating or at least reducing the disadvantages of the prior art. In particular, it is desirable to provide a power converter for which dielectric strength can be guaranteed and for which a reduction in interference in the MHz range is possible with reduced effort.

The task is solved by the subject matter of the independent patent claims. Advantageous embodiments are specified in the dependent patent claims and the following description, each of which can represent aspects of the invention on its own or in (sub)combination. Individual aspects are explained with regard to methods, others with regard to devices. However, the aspects must be transferred to each other accordingly.

According to one aspect, a power converter for an electric machine of a vehicle is provided. The power converter at least points a B6 bridge with three half bridges, an intermediate circuit capacitor, and a DC input. Each half bridge has a pair of complementary switching devices, in particular field effect transistors, and a center tap arranged between them for supplying the electrical machine with a three-phase alternating current. The power converter is coupled to a control device which is set up in such a way that for each current phase of the three-phase alternating current, the complementary switching devices of the respective half bridges are switched by means of switching signals, in particular gate signals, in accordance with an application of a positive high voltage and a negative high voltage in such a way that complementary commutation cells are provided become. A dead time is taken into account by the control device between the switching of the first of the complementary switching devices and the second of the complementary switching devices of the respective half bridges. The dead time is selected in such a way that a reduction in magnitude is ensured for high-frequency interference signal components.

The switching devices are preferably implemented by field effect transistors. Accordingly, the switching signals are given by gate signals.

According to the invention, it was advantageously recognized that an extension of the dead time results in a reduction in interference in the high frequency range (HF range).

If, for example, transistors are used as switching devices, the complementary transistor of the respective half-bridge is intentionally operated in the third quadrant for a longer period of time by means of suitably selected, longer dead times. This makes the resistivity of the conducting channel usable as a high-frequency damper of the natural oscillations of the commutation cells in the high-frequency domain. In other words, the resistivity of the conducting channel ensures an improved damping effect with regard to the natural oscillations of the commutation cells in the HF range. As a result, HF interference only occurs with a reduced amplitude.

Predetermined limit values for electromagnetic compatibility (EMC) can therefore advantageously be adhered to more easily, for example by choosing the dead time to be so long that only simple and low-cost filter components are required, which only require little manufacturing effort. As a result, the required number of components can be reduced. In addition, the cooling concepts that are to be provided for the filter devices can also be advantageously guaranteed to be simpler and less costly. Overall, the manufacturing effort that is necessary to comply with the EMC limit values can be advantageously reduced. For example, cooling the power converter or its intermediate circuit capacitor and/or its switching devices is usually much simpler and possible with less effort than is the case for the filter devices.

Preferably, the control device is designed to select the dead time in such a way that the high-frequency interference signal components are reduced to such an extent that the power converter complies with a predetermined limit value for EMC. Then no separate filter devices are required at all, which means that the power converter is designed to be particularly low-complexity in terms of EMC.

The converter can be characterized in terms of electromagnetic compatibility using space vector modulation, also known as space vector pulse width modulation (SVPWM). For example, a frequency analyzer can be coupled to the busbar structure of the converter instead of a direct current source. The vehicle's internal electrical system is simulated using an equivalent circuit diagram. A so-called high voltage conducted emission test (HVCE) is then carried out to record a frequency-dependent interference spectrum, particularly in the high frequency range above 1 MHz. Peak values, quasi-peak values and average values can be recorded. According to the WLTP standard, the emitted interference must be below frequency-dependent EMC limits. The low frequency range (kHz range), on the other hand, is not of interest because the vehicle does not radiate there. In other words, no natural resonance occurs at such low frequencies.

As explained at the beginning, an extension of the dead time leads to increased power loss because the respective transistor is then operated in the third quadrant. There is then no transition of the respective field effect transistor, but rather a reverse conductivity, at least until the complementary field effect transistor is switched on. The power loss caused must be taken into account when choosing the dead time and can be quantified depending on the design of the converter, for example depending on the choice of switching devices and the intermediate circuit capacitor used.

On the other hand, the extension of the dead time makes it possible to comply with the EMC limits with reduced effort, for example, because instead of complex filter devices that are difficult to cool, simpler filter devices can be used, which may not require a separate cooling mechanism. These effects of dead time can also be quantified.

In contrast, influences of a changed dead time on the control of the electrical machine can be compensated for by the underlying control mechanism.

Therefore, an extension of the dead time results in conflicting effects with regard to the increased power loss and the efficiency gain with regard to the required filter measures. Therefore, the control device can optionally be set up to select the dead time in such a way that a Pareto optimum is ensured between an increase in the power loss and the reduction of high-frequency interference signal components, which are each caused by an extension of the dead time.

In other words, the opposing effects are quantified. The Pareto optimum then ensures the topology-dependent optimization of the power loss based on the effort required to achieve an EMC in the MHz regime that meets requirements or, alternatively, falls below the limit value.

Since both effects depend on the topology of the inverter (converter), for example the capacity of the intermediate circuit capacitor, the dead time depends on the design of the converter. However, the fact that an extension of the dead time enables a reduction in high-frequency interference, which reduces the effort required to comply with EMC limit values, has not been taken into account in previous control mechanisms of power converters.

A clock period of the power converter is preferably between 1 kHz and 50 kHz. Such power converters are suitable for use in supply systems for electrical machines for vehicles.

Optionally, the dead time is between at least 0.5 µs and at most 15 µs, preferably between 1 µs and at most 10 µs, more preferably at least 3 µs and at most 8 µs, more preferably at least 5 µs. While previously a dead time corresponding to a safety margin of typically 0.5 µs was provided in order to exclude partial bridge short circuits and at the same time cause the lowest possible power losses, extending the dead time in accordance with the specified limit values advantageously leads to drastic savings in terms of the effort required to implement the EMC To be able to comply with limit values in the MHz range. The associated increase in power loss is therefore acceptable within the limits mentioned.

The field effect transistors preferably comprise SiC, GaN or GaAs. Field effect transistors based on these materials are well suited for use in power converters intended for electrical machines in vehicles.

Optionally, the control device comprises at least one data processing device.

According to a further aspect, a method for operating a power converter for an electric machine of a vehicle is also provided. The power converter has at least one B6 bridge with three half bridges, an intermediate circuit capacitor, and a direct current input. Each half bridge has a pair of complementary switching devices, in particular field effect transistors, and a center tap arranged between them for supplying the electrical machine with a three-phase alternating current. The power converter is coupled to a control device which is set up in such a way that for each current phase of the three-phase alternating current, the complementary switching devices of the respective half bridges are switched by means of switching signals, in particular gate signals, in accordance with an application of a positive high voltage and a negative high voltage in such a way that complementary commutation cells are provided become. A dead time is taken into account by the control device between the switching of the first of the complementary switching devices and the second of the complementary switching devices of the respective half bridges. The control device selects the dead time in such a way that a reduction in magnitude is ensured for high-frequency interference signal components.

The advantages corresponding to the device are achieved for the method. In particular, an EMC-relevant reduction of high-frequency signal components in the MHz range is achieved, which is accompanied by an increase in power loss, which is acceptable in terms of the reduced effort required to comply with EMC limit values. The overall manufacturing effort of the power converter, which is required to comply with the EMC limits, is reduced, even taking into account the increased power loss that is associated with an extension of the dead time.

The dead time is preferably chosen in such a way that the high-frequency interference signal components can be reduced so that the power converter adheres to a specified limit value for EMC.

According to a further aspect, a computer program product is also provided which has instructions which, when executed by a data processing device of the control device, cause it to carry out the method as described above.

Furthermore, according to a further aspect, a storage medium is also provided which has the computer program product as described above, so that when executed by a data processing device, it causes it to carry out the method as described above.

According to a further aspect, a vehicle is also provided that has a power converter as described above, or a power converter that is operated according to the method described.

For the purposes of the present invention, at least partially electrically powered vehicles can include, in particular, land vehicles with an electric machine, namely, among others, tricycles, trikes, quads, off-road and road vehicles such as passenger cars, buses, trucks, tractors and other commercial vehicles, rail vehicles (trains), which have at least one electric motor used to propel the vehicle. Vehicles can be manned or unmanned. In addition to pure electric vehicles (BEV), plug-in hybrids (PHEV) and fuel cell vehicles (FCEV) can also be included.

• - 1 eine schematische Darstellung eines erfindungsgemäßen Stromrichters und einer elektrischen Maschine,
• - 2 eine schematische Darstellung eines Fahrzeugs mit einem erfindungsgemäßen Stromrichter, und
• - 3 bis 5 mehrere schematische Darstellungen von beispielhaften Störemissionsspektren des Stromrichters bei verschiedenen Totzeiten.

The invention and further advantageous embodiments and developments thereof are described and explained in more detail below using the examples shown in the drawings. The features that can be found in the description and the drawings can be used individually or in groups in any combination according to the invention. Show it:

• - 1 a schematic representation of a power converter according to the invention and an electrical machine,
• - 2 a schematic representation of a vehicle with a power converter according to the invention, and
• - 3 to 5 several schematic representations of exemplary interference emission spectra of the power converter at different dead times.

All features disclosed below with respect to the embodiments and/or the accompanying figures may be combined alone or in any sub-combination with features of the aspects of the present disclosure, including features of preferred embodiments, provided that the resulting combination of features is meaningful to a person skilled in the art.

1 shows a schematic representation of a power converter 10 according to the invention and an electrical machine 12.

The power converter 10 includes a B6 bridge 14 with three half-bridges 16. The following functionality is only shown in relation to one half-bridge 16, but is to be transferred accordingly to all half-bridges 16 of the B6 bridge 14.

In the present case, each half bridge 16 comprises a first field effect transistor 18, which acts as a high-side switch, and a second field effect transistor 20, which acts as a low-side switch. Between the first field effect transistor 18 and the second field effect transistor 20, each half bridge 16 includes a center tap 22 for providing an alternating current signal, here L2, for the electrical machine 12.

Through the three half bridges 16, the electrical machine 12 is supplied with three corresponding alternating current signals, L1, L2 and L3. However, other topologies, for example a six-phase electrical machine, are also possible, which then require corresponding modifications of the power converter 10.

The respective half bridges 16 are coupled to a busbar structure 24 of the power converter 10. The power converter 10 is coupled to a direct current source 26. The direct current source 26 includes connection terminals 28, 30, between which a high voltage HV is provided. The direct current source 26 further includes a center terminal 32 which is coupled to the star point N of the electrical machine 12. There is a positive or negative high voltage HV+, HVan between one of the connection terminals 28, 30 and the middle terminal 32.

In addition, the power converter 10 includes an intermediate circuit capacitor 34, which serves as a coupling element between the direct current source 26 and the electrical machine 12, which is supplied with a three-phase alternating current.

Depending on the switching positions of the field effect transistors 18, 20, corresponding commutation cells are formed in the power converter 10 when HV+ or HV- is applied.

In order to prevent a high-voltage short circuit between the connection terminals 28, 30, Both field effect transistors 18, 20 of a half bridge 16 must not be conductive at the same time. In other words, at least one of the field effect transistors 18, 20 must be blocking.

In order to control the switching positions of the field effect transistors 18, 20, the power converter 10 is coupled to a control device 36, which includes at least one data processing device 38.

The control device 36 is set up to provide corresponding gate signals G1, G2 as switching signals for the field effect transistors 18, 20, so that the switching positions of the field effect transistors 18, 20 are influenced based on these signals. The control device 36 is generally coupled to further components of the electrical circuit, for example the electrical machine 12 or the direct current source 26. The control device 36 can then generate corresponding gate signals G1, G2, for example depending on the relative positions of the rotor of the electrical machine 12 to the stator of the electrical Machine 12 output, so that as a result the windings of the electrical machine 12 are controlled as needed.

In order to exclude high-voltage short circuits and partial bridge short circuits, a lower limit value for the dead time must be taken into account, which must not be undershot. Typically this limit is 0.5 µs. However, if both field effect transistors 18, 20 are blocking (during the dead time), no transition occurs, but reverse conductivity. This reduces power loss, which according to previous approaches is minimized by making the dead time usually as short as possible.

Since the intermediate circuit capacitor 34 has a high capacity, frequency-dependent interference occurs due to its dimensions, which are caused by natural oscillations of the respective commenting cells of the power converter 10 excited in the high-frequency range. These interferences could generally affect peripheral electrical or electronic components, creating a risk of damage or reduced performance. Therefore, EMC limit values are specified, for example according to the WLTP standard, which must be adhered to by the power converter 10.

According to the invention, the dead time is adjusted, in particular extended beyond the usual amount, in order to reduce the amount of interference, especially in the high frequency range, above 1 MHz. Although this is accompanied by increased power loss, it means that complex filter measures can be avoided.

2 shows a schematic representation of a vehicle 40 with a power converter 10 according to the invention.

The vehicle 40 has a plurality of wheels 42, each of which is coupled to an electric machine 12. The power converter 10 is coupled to the respective electrical machines 12, of which only one is shown here, for the sake of simplicity. In general, each electrical machine 12 is assigned a power converter 10 or the power converter 10 is multi-phase according to the number of machines 12 coupled to it. The control device 36 is coupled to the power converter 10 in order to be able to supply the electrical machines 12 with signals as required.

3 to 5 show several schematic representations of exemplary interference emission spectra 44 of the power converter 10 at different dead times.

The frequency f is plotted on the abscissa 46 in Hz according to a logarithmic scale. The interference amplitude “noise” in dbpV is plotted on the ordinate 48.

This results in the course 52 of the interference emissions 44, as detected, for example, by means of a frequency analyzer via SVPWM, which is coupled to the power converter 10 instead of the direct current source 26.

The dashed line indicates a frequency-dependent EMC limit value of 50. Falling below the EMC limit value 50 is relevant for approval for such power converters 10.

According to the interference emission spectrum 44 3 the dead time is 1 µs. It can be seen that the course 52 exceeds the EMC limit 50, particularly in the high frequency range 54 above 1 MHz. This means that in this case additional filter devices are necessary so that the EMC limit value 50 can be maintained. However, such filter devices increase the number of components, require a complex cooling concept, themselves cause additional power losses and thus increase the overall manufacturing effort for the power converter 10.

The interference emission spectrum 44 4 shows a curve 52 for a dead time of 2 µs. It can be seen that the amount of interference emissions is reduced, particularly in the high-frequency range 54. This means that by extending the Dead time, on the one hand, increased power losses occur, but on the other hand, the effort required to achieve the EMC limit value 50 is significantly reduced.

The interference emission spectrum 44 5 shows a curve 52 for a dead time of 4 µs. Here, the extension of the dead time is already sufficient so that the amount of interference emissions in the high-frequency range 54 is reduced to such an extent that the EMC limit value 50 is undershot. The dead time can even be adjusted in such a way that no additional filter devices are necessary to comply with the EMC limit value 50. Even if this is accompanied by an increase in power loss due to the extended dead time, the reduction in the measures required to comply with the EMC limit value 50 enables a reduced overall effort for the power converter 10.

The extension of the dead time causes the respective complementary field effect transistor, for example field effect transistor 20, to be operated in the third quadrant for longer after blocking the field effect transistor 18. The resistivity of the guide channel is thus made usable as a high-frequency damper of the natural oscillations of the commutation cells of the power converter 10 in the high-frequency domain.

Operating the field effect transistor 20 in third square mode ensures a damping effect with regard to the natural oscillations of the commutation cells. As a result, RF interference only occurs with a reduced amplitude, which is exemplified in the sequence of interference emission spectra 44 based on 3 to 5 is shown.

The dead time generally depends on the topology of the power converter 10, for example the capacity of the intermediate circuit capacitor 34 and its impedance in the high-frequency range. In this respect, the opposing effects of increasing the power loss while simultaneously reducing the effort required to comply with the EMC limit value 50 by extending the dead time must be quantified and weighed against each other. There is therefore the possibility of choosing the dead time in such a way that a Pareto optimum between these opposing effects is achieved, i.e. the lowest possible increase in power loss while at the same time reducing the effort as much as possible in order to comply with the EMC limit value of 50.

The dead time can in particular be between 1 µs and 15 µs, preferably between 3 µs and 10 µs, in order to achieve the Pareto optimum.

In this application, reference may be made to quantities and numbers. Unless expressly stated, such quantities and numbers are not to be considered limiting, but rather as examples of the possible quantities or numbers in the context of this application. In this context, the term "plurality" may also be used in this application to refer to a quantity or number. In this context, the term "plurality" means any number greater than one, e.g., two, three, four, five, etc. The terms "about," "approximately," "near," etc. mean plus or minus 5% of the stated value.

Claims (8)

Power converter (10) for an electric machine (12) of a vehicle (40), the power converter (10) having at least one B6 bridge (14) with three half bridges (16), an intermediate circuit capacitor (34), and a direct current input ( 28, 30), each half bridge (16) having a pair of complementary field effect transistors (18, 20) and a center tap (22) arranged between them for applying a three-phase alternating current (L1, L2, L3) to the electrical machine (12). , wherein the power converter (10) is coupled to a control device (36), which is set up in such a way that for each current phase of the three-phase alternating current (L1, L2, L3), the complementary field effect transistors (18, 20) of the respective half bridges (16) are activated by means of gate signals (G1, G2) are switched in accordance with an application of a positive high voltage (HV+) and a negative high voltage (HV-) in such a way that complementary commutation cells are provided, with switching between the first of the complementary field effect transistors (18, 20) and the second of the complementary field effect transistors (18, 20) of the respective half bridges (16) a dead time is taken into account by the control device (36), and the dead time is selected such that an amount reduction is ensured for high-frequency interference signal components. Power converter (10). Claim 1 , characterized in that the control device (36) is set up to select the dead time in such a way that the high-frequency interference signal components are reduced to such an extent that the power converter (10) maintains a predetermined limit value (50) for electromagnetic compatibility. Power converter (10). Claim 1 or 2 , characterized in that the control device (36) is set up to select the dead time in such a way that a Pareto optimum between an increase in power loss and a reduction in high-frequency interference signal components, which are caused by an extension of the dead time, is guaranteed. Power converter (10) according to one of the preceding claims, characterized in that a clock period of the power converter is between 1 KHz and 50 KHz. Power converter (10) according to one of the preceding claims, characterized in that the dead time is between at least 0.5 µs and at most 15 µs, preferably from 1 µs and at most 10 µs, more preferably from at least 3 µs and at most 8 µs. Power converter (10) according to one of the preceding claims, characterized in that the field effect transistors (18, 20) comprise SiC, GaN or GaAs. Method for operating a power converter (10) for an electrical machine (12) of a vehicle (40), wherein the power converter (10) has at least one B6 bridge (14) with three half bridges (16), an intermediate circuit capacitor (34), and a DC input (28, 30), each half bridge (16) having a pair of complementary field effect transistors (18, 20) and a center tap (22) arranged between them for supplying the electrical machine (12) with a three-phase alternating current (L1, L2 . L3), the power converter (10) being coupled to a control device (36) which is set up in such a way that for each current phase of the three-phase alternating current (L1, L2, L3), the complementary field effect transistors (18, 20) of the respective half bridges ( 16) are switched by means of gate signals (G1, G2) corresponding to an application of a positive high voltage (HV+) and a negative high voltage (HV-) in such a way that complementary commutation cells are provided, with switching between the first of the complementary field effect transistors (18, 20 ) and the second of the complementary field effect transistors (18, 20) of the respective half bridges (16), a dead time is taken into account by the control device (36), and the control device (36) selects the dead time in such a way that an amount reduction is ensured for high-frequency interference signal components . Procedure according to Claim 7 , characterized in that the dead time is selected such that the high-frequency interference signal components are reduced to such an extent that the power converter (10) maintains a predetermined limit value for electromagnetic compatibility.

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