DE102022122981A1 - Method for producing an optoelectronic component and optoelectronic component - Google Patents

Abstract

The invention relates to a method for producing an optoelectronic component, in which the steps explained below are carried out. First, a carrier is provided. An element for the optoelectronic component is then produced on the carrier, the element consisting of an element material. A chip carrier with an optoelectronic semiconductor chip is then provided and the carrier is arranged above the chip carrier in such a way that the element faces the chip carrier. Now the element is detached from the carrier and transferred to the chip carrier.

Description

The present invention relates to a method for producing an optoelectronic component and an optoelectronic component.

Optoelectronic components are known in the prior art in which optoelectronic semiconductor chips with small dimensions are used. These can have dimensions in the micrometer range, in particular with edge lengths of less than 200 micrometers, and can be referred to, for example, as micro-light-emitting diodes (micro-LEDs) or as micro-laser diodes (micro-LDs). These can in particular be constructed from a semiconductor layer sequence without a substrate. Such micro-LEDs or micro-LDs may require additional elements such as conversion elements, reflection elements or housing elements to be integrated into an optoelectronic component. This requires miniaturization in the production of these elements, which is not yet available in the prior art.

One object of the present invention is to provide an improved method for producing the optoelectronic component, in which a micro-LED can optionally be combined with another element. A further object of the present invention is to provide such an optoelectronic component. These tasks are solved by a method for producing an optoelectronic component and by an optoelectronic component with the features of the independent claims. Advantageous developments are specified in the dependent claims.

According to a first aspect, the invention comprises a method for producing an optoelectronic component, in which the steps explained below are carried out. First, a carrier is provided. An element for the optoelectronic component is then produced on the carrier, the element consisting of an element material. A chip carrier with an optoelectronic semiconductor chip is then provided and the carrier is arranged above the chip carrier in such a way that the element faces the chip carrier. Now the element is detached from the carrier and transferred to the chip carrier.

This method makes it possible to provide elements with small dimensions on the carrier and then transfer them to the chip carrier. The optoelectronic semiconductor chip has edge lengths of a maximum of 200 micrometers and can be a micro-LED or a micro-LD. This means that small elements can be arranged on the chip carrier, which, in particular together with micro-LEDs or micro-LDs, allow further miniaturization of optoelectronic components. The element can in particular comprise a conversion element, a reflection element or a housing element. Furthermore, it can be provided that several elements are provided on the carrier and one or more elements are transferred to a chip carrier.

According to a second aspect, the invention comprises an optoelectronic component with a chip carrier, an optoelectronic semiconductor chip arranged on the chip carrier and an element.

This provides an optoelectronic component in which elements with small dimensions can be arranged on the chip carrier. This means that small elements can be used, which allow further miniaturization of optoelectronic components, especially together with micro-LEDs or micro-LDs. The element can in particular comprise a conversion element, a reflection element or a housing element.

In one embodiment of the method, the carrier has a cavity, with the element being at least partially produced within the cavity. This makes it possible to provide the element with small dimensions defined by the cavity. The carrier with the cavity can be reused after transferring the element to the chip carrier. If several elements are produced on the carrier, then the carrier can also have several cavities in this embodiment. The element material can in particular be doctored into the cavity or cavities.

In one embodiment of the method, the element is detached from the carrier and/or the element is transferred to the chip carrier by means of a light pulse. The carrier is transparent to electromagnetic radiation in at least one wavelength range, with a light of the light pulse lying in the transparent wavelength range of the carrier. This enables a simple and targeted manufacturing process. If several elements have been produced on the carrier, provision can also be made to select an element to be transferred and then to focus the light pulse on the element to be transferred.

In one embodiment of the method, the element material has a separating agent, the separating agent being activated by a light pulse is at least partially evaporated. The light pulse can be the light pulse used for releasing and/or transferring. The release agent can be, for example, a wax arranged in the element material. This is first melted by the light pulse and then evaporated, especially adjacent to the carrier. If the carrier has a cavity, the release agent can optionally be evaporated adjacent to walls of the cavity. The optical element is released from the carrier or the cavity and can be transferred to the chip carrier. In particular, a further process step can then be provided in which excess release agent is driven out of the element, for example by heating.

In one embodiment of the method, after the element has been produced, an adhesive is applied to the element. After the element has been transferred, a connection can be formed between the chip carrier or optoelectronic semiconductor chip and the element using the adhesive. If the element is detached from the carrier by means of a light pulse and transferred to the chip carrier, it can be provided that the adhesive is further hardened by means of the light pulse after the transfer.

In one embodiment of the method, an adhesive is applied to the chip carrier and/or the optoelectronic semiconductor chip. The adhesive can be applied at a position to which the element is transferred. The element can thus be attached to the chip carrier and/or the optoelectronic semiconductor chip.

In one embodiment of the method, a coating is applied to the support before the element is created. The coating can serve to make the element easier to remove from the carrier.

In one embodiment of the method, the coating has a high-boiling solvent. In particular, the coating consists of a high-boiling solvent. The solvent can be at least partially evaporated in particular by the light pulse. In particular, the light of the light pulse can be absorbed by the solvent and/or the element material and thereby a temperature of the solvent and/or the element material can be increased so that the solvent evaporates. The solvent can contain, for example, glycerin.

In one embodiment of the method, the element material is a curable material. A curable material may include, for example, a silicone, an epoxy hard and/or a siloxane.

In one embodiment of the method, the element material is partially hardened before the element is released in such a way that the element is essentially dimensionally stable. Substantially dimensionally stable can mean that the optical element undergoes no change in shape after partial hardening in a predetermined period of time or that a change in shape changes the dimensions of the element by a maximum of 2 percent. Furthermore, a viscosity of the element can be increased after partial hardening and in particular be greater than 1000 pascal seconds (PA s).

In one embodiment of the method, the element is a conversion element or a reflection element. Such elements can be referred to, for example, as optical elements.

In one embodiment of the method, the element is a conversion element. A color locus of the element is determined using pump light. The carrier is transparent to the pump light or a converted light from the conversion element. This allows optical properties of the conversion element to be determined before the conversion element is transferred to the chip carrier. This can be particularly advantageous if several elements are created on the carrier and a selection is to be made. The selection can be made, for example, based on the color location of the conversion element.

In one embodiment of the method, the element has a matrix material, in particular a matrix material with embedded particles. The matrix material can in particular have a siloxane, a polysiloxane, a silicone, an epoxy resin and/or a glass matrix. Furthermore, phosphates, silicates, borates, aluminates and/or sulfates can be used as matrix material. In particular, the particles can contain silicon dioxide, aluminum (III) oxide and/or aluminum phosphate. In the event that the element is a reflection element, the particles can be, for example, titanium dioxide, zirconium dioxide, aluminum (III) oxide, boron nitride, aluminum nitride, silicon dioxide and / or silicon (IV) nitride. The particles can have a size between 1 nanometer and 100 micrometers, preferably between 50 nanometers and 1 micrometer. In the event that the element is a conversion element, the particles can contain, for example, one or more phosphors, in particular organic phosphors. Eu2+, Ce3+, Mn4+ and/or Cr3+ can be used as dopants in the phosphors. For example, Eu2+ (oxy)nitrides can be used as a phosphor material. these can (Ca,Sr)AlSiN3:Eu2+, (Ca,Ba,Sr)2Si5N8:Eu2+; SrAlSi7N4:Eu2+; Sr[Al3LiN4]:Eu2+; Ca[Al3LiN4]:Eu2+; Eu2+ doped sulfides such as CaS:Eu2+; SrGa2S4:Eu2+,), α-SiAlON with the general formula (Li+,Mg2+,Ca2+Y3+)xSi12-m-nAlm+nOnN16-n or, β-SiAlON, nitrido-orthosilicates (e.g. AE2-x-aRExEuaSi1-yO4 -x-2yNx), Sr3Si13Al3O2N21, Ba3Si6O12N2, Ca8Mg(SiO4)4Cl2:Eu2+. Furthermore, Ce3+ doped garnets with the general formula {A}3[B]2(C)3O12 with A = Y3+, Lu3+, Gd3+, Tb3+, La3+, Sc3+, Nd3+, Er3+, Ce3+, Be2+, Ca2+, Ba2+, Sr2+, Mg2+, Zn2+ and B = Al3+,Ga3+, Sc3+, Sb3+, In3+, Mg2+, Mn2+; C = Ga3+ or Al3+, Si4+, Zr4+, Ti4+, Ge4+, Mn4+. Ce3+ doped RE3Si6N11 (RE = La, Lu, Y); Ce3+ doped (RE3-xEA1.5x)Si6N11 (RE = La, Lu, Y; EA = Ca, Ba, Sr) can be used as a conversion phosphor. Likewise, Mn4+-doped phosphor can be used (preferably with an activator content of ≤ 10%, ≤5% ≤ 3%, particularly preferably ≤ 1%). The host structure used, for example, is K2SiF6, Na2SiF6, K2TiF6, generally fluoridic and oxyfluorididic phosphors with the composition EAxAy[B(z)C(f)D(g)E(h)OaFb]:Mn+4c where A = Li, Na, K , Rb, Cs, Cu, Ag, NH4 or a combination thereof; EA = Be, Mg, Ca, Ba, Sr, Zn or a combination thereof; B = Si, Ge, Sn, Ti, Zr, Hf; C =Al, Ga, In, Gd, Y, Sc, La, Bi, Cr; D = Nb, Ta, V; E = W, Mon; or a combination thereof; The partial charge d from [EAxAy]d results from (2*x+y) and corresponds to the inverse of the partial charge e from [[B(z)C(f)D(g)E(h)OaFb]:Mn+4c ]e, which is composed of (4*z+3*f+5*g+6*h+4*c-2*ab). Likewise, Mg4GeO3.5F can be used as a host structure, generally formulated as (4-x)MgO xMgF2 GeO2:Mn4+). Mn4+ can also be doped A2Ge4O9 or A3A'Ge8O18 (A and A`= Li, K, Na, Rb) such as K2Ge4O9, Rb2Ge4O9 or Li3RbGe8O18. It can be Mn4+ doped Sr4Al14O25, Mg2TiO4, CaZrO3, Gd3Ga5O12, Al2O3, GdAlO3, LaAlO3 , LiAl5O8 , SrTiO3, Y2Ti2O7, Y2Sn2O7, CaAl12019, MgO, Ba2LaNbO6 can be used as a phosphor. The average particle size is preferably in the range 100 nm - 100 pm. The average particle size is preferably in a ratio of 1:10 - 1:100 relative to the edge length of the target substrate (for example the optoelectronic semiconductor chip). In one embodiment, for example, the edge length of the optoelectronic semiconductor chips can be in the range 10pm - 150 µm and the particle size in the range 1µm - 6 pm.

The transferred conversion element can be (nanoparticle) semiconductor material as (further) materials for photon-photon conversion. e.g. CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgTe, HgSe, GaP, GaAs, GaSb, AlP, AlAs, AlSb, InP, InAs, InSb, SiC, InN, AlN or their mixed crystals (ternary, quaternary,... .) or a combination of several different semiconductor materials. The nanoparticles can have a core-shell and/or alloy structure.

The (nanoparticle) semiconductor material can have an inorganic encapsulation, consisting for example of Al2O3, SiO2, ZrO2, BN, AlN, Si3N4 or mixtures of several oxides and nitrides.

In one embodiment of the method, the carrier has an electrically conductive area. A first partial material of the element material is applied to the conductive area by means of electrophoresis. This enables a simple manufacturing process.

In one embodiment of the method, the first partial material has particles, with a second partial material of the element material being introduced between the particles of the first partial material. The first partial material can in particular comprise the particles required for conversion and/or reflection, as explained above, while the second partial material can comprise the matrix material.

In one embodiment of the method, the electrically conductive area is partially covered with an insulating material before the first partial material is applied. The insulating material can in particular also form the cavities already explained above. The cover allows electrophoresis to take place in a structured manner and, for example, dimensions of the element can be set during electrophoresis.

In one embodiment of the method, the carrier is structured so that the element has a structured surface. The structured surface can in particular result in a coupling structure and/or a lens structure of the element.

In one embodiment of the method, several elements are created on the carrier. An element to be transferred is selected or several elements to be transferred are selected and transferred to the chip carrier.

In one embodiment of the method, the element is finally hardened after being transferred to the chip carrier, for example by a predetermined temperature and/or a predetermined period of time until further processing.

In one embodiment of the method, the optoelectronic semiconductor chip is a micro-LED or a micro-LD.

In one embodiment of the method, a further element is also transferred from a further carrier. In particular, the optoelectronic component can have any combination of housing element, conversion element and reflection element, the elements being generated and transferred to the chip carrier using the method according to the invention.

• 1 ein Ablaufdiagramm eines Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 2 Querschnitte durch mehrere Zwischenschritte eines Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 3 Querschnitte durch mehrere Zwischenschritte eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 4 Querschnitte durch mehrere Zwischenschritte eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 5 einen Querschnitt durch einen Zwischenschritt eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 6 eine Draufsicht auf einen Träger während eines Zwischenschritts eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 7 Querschnitte durch mehrere Zwischenschritte eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 8 eine Draufsicht auf einen Träger während eines Zwischenschritts eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 9 eine Draufsicht auf ein optoelektronisches Bauelement;
• 10 eine Draufsicht auf einen Träger während eines Zwischenschritts eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 11 eine Draufsicht auf ein optoelektronisches Bauelement;
• 12 eine Draufsicht auf einen Träger während eines Zwischenschritts eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 13 Querschnitte durch mehrere Zwischenschritte eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 14 einen Querschnitt durch ein optoelektronisches Bauelement;
• 15 eine Draufsicht auf einen Träger während eines Zwischenschritts eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 16 einen Querschnitt durch den Träger der 15 während eines Zwischenschritts des Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 17 eine Draufsicht auf des Träger der 15 und 16 nach weiteren Zwischenschritten des Verfahrens zum Herstellen eines optoelektronischen Bauelements;
• 18 Querschnitte durch mehrere Zwischenschritte eines Verfahrens zum Herstellen eines optoelektronischen Bauelements der 15 bis 17; und
• 19 eine Draufsicht auf einen Träger während eines Zwischenschritts eines weiteren Verfahrens zum Herstellen eines optoelektronischen Bauelements.

The characteristics, features and advantages of this invention described above, as well as the manner in which these are achieved, will be more clearly and clearly understood in connection with the following description of the exemplary embodiments, which will be explained in more detail in connection with the drawings. Shown in a schematic representation

• 1 a flowchart of a method for producing an optoelectronic component;
• 2 Cross sections through several intermediate steps of a method for producing an optoelectronic component;
• 3 Cross sections through several intermediate steps of a further method for producing an optoelectronic component;
• 4 Cross sections through several intermediate steps of a further method for producing an optoelectronic component;
• 5 a cross section through an intermediate step of a further method for producing an optoelectronic component;
• 6 a top view of a carrier during an intermediate step of a further method for producing an optoelectronic component;
• 7 Cross sections through several intermediate steps of a further method for producing an optoelectronic component;
• 8th a top view of a carrier during an intermediate step of a further method for producing an optoelectronic component;
• 9 a top view of an optoelectronic component;
• 10 a top view of a carrier during an intermediate step of a further method for producing an optoelectronic component;
• 11 a top view of an optoelectronic component;
• 12 a top view of a carrier during an intermediate step of a further method for producing an optoelectronic component;
• 13 Cross sections through several intermediate steps of a further method for producing an optoelectronic component;
• 14 a cross section through an optoelectronic component;
• 15 a top view of a carrier during an intermediate step of a further method for producing an optoelectronic component;
• 16 a cross section through the carrier 15 during an intermediate step of the method for producing an optoelectronic component;
• 17 a top view of the wearer 15 and 16 after further intermediate steps of the method for producing an optoelectronic component;
• 18 Cross sections through several intermediate steps of a method for producing an optoelectronic component 15 to 17 ; and
• 19 a top view of a carrier during an intermediate step of a further method for producing an optoelectronic component.

1 shows a flowchart 10 of a method for producing an optoelectronic component. In a first method step 11, a carrier is provided. In a second method step 12, an element for the optoelectronic component is produced on the carrier, the element consisting of an element material. In a third method step, a chip carrier with an optoelectronic semiconductor chip is provided and the carrier is arranged above the chip carrier in such a way that the element faces the chip carrier. In a fourth method step 14, the element is detached from the carrier. In a fifth method step 15, the element is transferred to the chip carrier.

The properties of the carrier and the chip carrier as well as the element are described below based on exemplary embodiments with further figures. These each show configurations of intermediate steps or end products in connection with 1 explained procedure. The optoelectronic semiconductor chip can consist of a semiconductor layer sequence and have edge lengths of a maximum of 200 micrometers. In particular, the optoelectronic semiconductor chip can be designed without a substrate. Furthermore, the optoelectronic semiconductor chip can comprise a micro-LED or a micro-LD.

2 shows cross sections through various intermediate steps in connection with 1 described procedure. First, a carrier 20 consisting of a carrier material 21 is provided. This corresponds to the first method step 11 1 . An element 40, consisting of an element material 41, is then produced on the carrier 20. This corresponds to the second method step 12 1 . A chip carrier 70 with an optoelectronic semiconductor chip 71 is then provided and the carrier 20 is arranged above the chip carrier 70 in such a way that the element 40 faces the chip carrier 70. This corresponds to the third step of the process. It is also shown here that the element 40 is detached from the carrier 20. This can be done, for example, by means of a light pulse 80 and correspond to the fourth method step 14. The element 40 is then transferred to the chip carrier 70, here in such a way that the element 40 is then arranged on the optoelectronic semiconductor chip 71. This can also be triggered or supported by the light pulse 80. The chip carrier 70, the optoelectronic semiconductor chip 71 and the element 40 ultimately form an optoelectronic component 1.

It can be provided that a light of the light pulse 80 lies in a transparent wavelength range of the carrier 20. This means in particular that the carrier material 21 is transparent to a wavelength of the light pulse 80. In particular, it can be provided that the light pulse 80 is a laser pulse. Furthermore, it can alternatively or additionally be provided that the light pulse 80 is focused on the element 40. This is particularly useful if the carrier 20 has several elements 40.

3 shows cross sections through various intermediate steps in connection with 1 described procedure. The cross sections correspond to those of 2 , unless differences are described below. In particular, the designs of the 3 i.e. further training in connection with 2 explained features.

The carrier 20 has at least one cavity 22, wherein in 3 three cavities 22 are shown. Of course, the number of cavities 22 can be significantly larger. The element 40 is at least partially generated within the cavity 22. In particular, it can be provided that the element material 41 is introduced into the cavity 22 or the cavities 22. It can be provided that the element material 41 is introduced into the cavity 22 by means of a spraying process, by means of a printing process or as a liquid. Furthermore, it can be provided that the element material 41 is doctored, thus completely filling the cavities 22 and also removing excess element material 41. This results in a simple manufacturing process for the elements 40.

The element material 41 may optionally be a curable material. It can be provided that the element material 41 is partially hardened before the element 40 is released in such a way that the element 40 is essentially dimensionally stable. In particular, the element material 41 can have a viscosity of at least 0.5 millipascal seconds (mPA s) in the uncured state. Substantially dimensionally stable can mean that the element material 41 undergoes no change in shape after partial hardening in a predetermined period of time or that a change in shape changes the dimensions of the element 40 by a maximum of 2 percent. Furthermore, a viscosity of the element material 41 can be increased after partial hardening and in particular be greater than 1000 pascal seconds (PA s).

In one embodiment, after element 40 has been created, an adhesive 42 is applied to element 40. This adhesive 42 can serve to attach the element 40 to the optoelectronic semiconductor chip 71. Provision can be made to harden the adhesive using the light pulse 80. This can also be reflected in the design of the 2 take place.

In one exemplary embodiment, a coating 24 is applied to the carrier 22, here in particular to walls 23 of the cavity 22, before the element 40 is produced. Analogously, a coating 24 can also be applied to the carrier 20 2 be applied. The coating 24 can be partially vaporized by the light pulse 80 and thus support the release of the element 40 from the cavity 22 or from the carrier 20. The coating 24 can have a high-boiling solvent or in particular consist of a high-boiling solvent. The solvent can be at least partially evaporated in particular by the light pulse 80. In particular, the light of the light pulse 80 can be absorbed by the solvent and/or the element material 41, thereby increasing a temperature of the solvent and/or the element material 41 so that the solvent evaporates. The solvent can contain, for example, glycerin.

Those related to 3 The embodiments explained can also be provided individually. For example, only the cavity 22, only the coating 24, only the adhesive 42 or only the design of the element material 41 could be cured Bare material can be provided, as well as any combination of these features.

In the designs of the 2 and 3 The element 40 is in particular a conversion element 43. Provision can be made to determine a color locus of the conversion element 43 using pump light, the carrier 20 and in particular the carrier material 21 being transparent to the pump light or a converted light of the conversion element 43. Subsequently, if necessary, a conversion element 43 to be transferred can be selected based on the color location. This can then be transferred to the chip carrier 70 or the optoelectronic semiconductor chip 71, in particular by focusing the light pulse 80 onto the conversion element 43 to be transferred.

It can be provided that the conversion element 43 has a matrix material, in particular a matrix material with embedded phosphor particles. The matrix material can in particular have a siloxane, a polysiloxane, a silicone, an epoxy resin and/or a glass matrix. Furthermore, phosphates, silicates, borates, aluminates and/or sulfates can be used as matrix material. In particular, the phosphor particles can contain silicon dioxide, aluminum (III) oxide and/or aluminum phosphate. The phosphor particles can have a size between 1 nanometer and 100 micrometers, preferably between 50 nanometers and 1 micrometer. The phosphor particles can contain, for example, one or more phosphors, in particular organic phosphors. Eu2+, Ce3+, Mn4+ and/or Cr3+ can be used as dopants in the phosphors. For example, Eu2+ (oxy)nitrides can be used as a phosphor material. These can be (Ca,Sr)AlSiN3:Eu2+, (Ca,Ba,Sr)2Si5N8:Eu2+; SrAlSi7N4:Eu2+; Sr[Al3LiN4]:Eu2+; Ca[Al3LiN4]:Eu2+; Eu2+ doped sulfides such as CaS:Eu2+; SrGa2S4:Eu2+,), α-SiAlON with the general formula (Li+,Mg2+,Ca2+Y3+)xSi12-m-nAlm+nOnN16-n or, β-SiAlON, nitrido-orthosilicates (e.g. AE2-x-aRExEuaSi1-yO4 -x-2yNx), Sr3Si13Al3O2N21, Ba3Si6O12N2, Ca8Mg(SiO4)4Cl2:Eu2+. Furthermore, Ce3+ doped garnets can be produced with the general formula {A}3[B]2(C)3O12 with A = Y3+, Lu3+, Gd3+, Tb3+, La3+, Sc3+, Nd3+, Er3+, Ce3+, Be2+, Ca2+, Ba2+, Sr2+, Mg2+, Zn2+ and B = Al3+, Ga3+, Sc3+, Sb3+, In3+, Mg2+, Mn2+; C = Ga3+ or Al3+, Si4+, Zr4+, Ti4+, Ge4+, Mn4+. Ce3+ doped RE3Si6N11 (RE = La, Lu, Y); Ce3+ doped (RE3-xEA1.5x)Si6N11 (RE = La, Lu, Y; EA = Ca, Ba, Sr) can be used as a conversion phosphor. Mn4+-doped phosphor can also be used (preferably with an activator content of ≤ 10%, ≤5% ≤ 3%, particularly preferably ≤ 1%). The host structure used is, for example, K2SiF6, Na2SiF6, K2TiF6, generally fluoride and oxyfluoride phosphors with the composition EAxAy[B(z)C(f)D(g)E(h)OaFb]:Mn+4c where A = Li, Na, K , Rb, Cs, Cu, Ag, NH4 or a combination thereof; EA = Be, Mg, Ca, Ba, Sr, Zn or a combination thereof; B = Si, Ge, Sn, Ti, Zr, Hf; C =Al, Ga, In, Gd, Y, Sc, La, Bi, Cr; D = Nb, Ta, V; E = W, Mo; or a combination thereof; The partial charge d from [EAxAy]d results from (2*x+y) and corresponds to the inverse of the partial charge e from [[B(z)C(f)D(g)E(h)OaFb] :Mn+4c ]e, which is composed of (4*z+3*f+5*g+6*h+4*c-2*a-b). Likewise, Mg4GeO3.5F can be used as a host structure, generally formulated as (4-x)MgO xMgF2 GeO2:Mn4+). Likewise, Mn4+ doped A2Ge4O9 or A3A'Ge8O18 (A and A`= Li, K, Na, Rb) such as K2Ge4O9, Rb2Ge4O9 or Li3RbGe8O18. Mn4+ doped Sr4Al14O25, Mg2TiO4, CaZrO3, Gd3Ga5O12, Al2O3, GdAlO3, La AlO3, LiAl5O8 , SrTiO3, Y2Ti2O7, Y2Sn2O7, CaAl12O19, MgO, Ba2LaNbO6 can be used as phosphors. The average particle size is preferably in the range 100nm - 100 pm. The average particle size is preferably in a ratio of 1:10 - 1:100 relative to the edge length of the target substrate (for example the optoelectronic semiconductor chip). In one embodiment, for example, the edge length of the optoelectronic semiconductor chips can be in the range 10pm - 150 µm and the particle size in the range 1µm - 6 pm.

The transferred conversion element 43 can be (nanoparticle) semiconductor material as (further) materials for photon-photon conversion. e.g. CdS, CdSe, CdTe, ZnS, ZnSe, ZnTe, HgTe, HgSe, GaP, GaAs, GaSb, AlP, AlAs, AlSb, InP, InAs, InSb, SiC, InN, AlN or their mixed crystals (ternary, quaternary,... .) or a combination of several different semiconductor materials. The nanoparticles can have a core-shell and/or alloy structure.

The (nanoparticle) semiconductor material can have an inorganic encapsulation, consisting for example of Al2O3, SiO2, ZrO2, BN, AlN, Si3N4 or mixtures of several oxides and nitrides.

4 shows further cross sections through intermediate steps of the method according to the invention, in which further optional features are shown which are in the embodiments of 2 and 3 can be used. The carrier 20 points as in 3 shown cavities 22. The element 40, designed as a conversion element 43, is again generated within the cavities 22. The conversion element 43 consists of a first sub-element 44 and a second sub-element 45. The first sub-element 44 is first introduced into the cavity 22 and then the second Partial element 45 is introduced into the cavity 22 and doctored, for example. For the first sub-element 44 and the second sub-element 45, all of the features described above with regard to the element 40 can be provided. In particular, it can be provided that the first sub-element 44 and/or the second sub-element 45 has one of the conversion phosphors described above and a corresponding matrix material. Also the conversion element 43 4 can be transmitted to the chip carrier 70 by means of the light pulse 80.

Also in 4 it is shown that the first sub-element 44 optionally has a separating agent 46. The separating agent 46 is at least partially evaporated by the light pulse 80. The separating agent 46 can, for example, be a wax arranged in the first sub-element 44. This is first melted by the light pulse 80 and then evaporated, so that evaporated release agent 47 is formed, in particular adjacent to walls 23 of the cavity 22. The element 40 is released from the cavity 22 and can be transferred to the chip carrier 70. In particular, a further process step can then be provided in which excess release agent 46 is expelled from the element 40, for example by heating. The release agent 46 can also be used in the 2 and 3 shown configurations can be used. In these cases, the entire element material 41 has the release agent 46.

5 shows a cross section through an intermediate step of a further method in which the carrier 22 is structured so that the element 40 has a structured surface 48. There are three cavities 22 arranged in the carrier 20, which are shown in the illustration 5 are each designed differently. Of course, all cavities 22 of a carrier 20 can be designed identically. In the left cavity 22 there is a structure 25 of the cavity 22 such that the conversion element 43 forms a decoupling structure 49 consisting of several elevations. Such a decoupling structure 49 can also be provided if the element 40 is not a conversion element 43, but is transparent to light emitted by the optoelectronic semiconductor chip 71. The middle cavity 22 is constructed identically to the left cavity, with the conversion element 43 being analogous here 4 a first sub-element 44, which includes the decoupling structure 49, and a second sub-element 45. It can be provided that the first sub-element 44 and/or the second sub-element 45 has a conversion phosphor as in connection with 4 described. Furthermore, it can also be provided that both sub-elements 44, 45 do not include any conversion phosphor. In the right cavity 22 there is a structure 25 of the cavity 22 such that the conversion element 43 forms a lens structure 51. Here too, it can be provided that the element 40 is not a conversion element 43, but rather transparent to light emitted by the optoelectronic semiconductor chip 71. Furthermore, a structure of the element 40 from two sub-elements 44, 45 can also be provided here. Those related to the 3 and 4 Further options described, such as the coating 24 or the adhesive 42 or the release agent 46, can also be used in the embodiments of 5 be provided.

6 shows a top view of an optoelectronic component 1, which is connected to the 1 to 5 may have been produced in the process explained. A conversion element 43 is arranged as an element 40 on an optoelectronic semiconductor chip 71. The conversion element 43 projects beyond the optoelectronic semiconductor chip 71, but it can also be provided that the conversion element 43 does not project beyond the optoelectronic semiconductor chip 71. Furthermore, the conversion element 43 has a recess so that a top contact 72 of the optoelectronic semiconductor chip 71 is accessible for contacting.

7 shows cross sections through intermediate steps of a further embodiment of the method according to the invention, which is related to the 2 to 4 can correspond to the procedures explained, provided that no differences are described below. The carrier 20 again has cavities 22, but it can also be analogous 2 it should be planned to dispense with the cavities. Elements, here reflection elements 52, are again arranged in the cavities 22. The reflection elements 52 can be set up to reflect light from the optoelectronic semiconductor chip 71. The reflection elements 52 are detached from the carrier 20 by means of a light pulse 80 and a further light pulse 81 and transferred to the chip carrier next to the optoelectronic semiconductor chip 71, so that a reflection element 52 is arranged to the left and right of the optoelectronic semiconductor chip 71.

The reflection element 52 can have a matrix material, in particular a matrix material with embedded reflection particles. The matrix material can in particular have a siloxane, a polysiloxane, a silicone, an epoxy resin and/or a glass matrix. Furthermore, phosphates, silicates, borates, aluminates and/or sulfates can be used as matrix material. In particular, the reflection particles can comprise silicon dioxide, aluminum (III) oxide and/or aluminum phosphate. Furthermore, the reflection particles can, for example, be made of titanium dioxide, zirconium dioxide, aluminum (III) oxide, boron nitride, aluminum nitride, silicon dioxide and/or silicon (IV) nitride or have these substances. The reflection particles can have a size between 1 nanometer and 100 micrometers, preferably between 50 nanometers and 1 micrometer. The average particle size is preferably in the range 100 nm - 100 pm. The average particle size is preferably in a ratio of 1:10 - 1:100 relative to the edge length of the target substrate (for example the optoelectronic semiconductor chip). In one embodiment, for example, the edge length of the optoelectronic semiconductor chips can be in the range 10pm - 150 µm and the particle size in the range 1µm - 6 pm.

Those related to the 3 and 4 Optional embodiments explained can also be provided if the element is as in 7 is a reflection element 52, in particular the coating 24, the adhesive 42, the release agent 46 and the structure consisting of a first sub-element 44 and a second sub-element 45.

8th shows a top view of a carrier 20 with cavities 22, the cavities 22 having an elongated shape. A width of the cavities 22 is, for example, significantly smaller (at least a factor of 3) than a length of the cavities 22. These are analogous to 7 filled, an elongated reflection element 52 can be formed in the cavities 22.

9 shows an optoelectronic component 1, in which the in the carrier 20 the 8th generated reflection elements 52 were transferred to the chip carrier 70, for example by means of the in 7 method shown. Rows of five optoelectronic semiconductor chips 71 are arranged between the reflection elements 52. Here, the method according to the invention enables the simple production of an optoelectronic component 1 with reflection elements 52.

10 shows a top view of another carrier 20 with a cavity 22. Webs 26 are arranged within the cavity, so that an element material 41 filled into the cavity 22 has recesses in the area of the webs 26. The cavity 22 becomes analogous to 7 filled, a grid-shaped reflection element 52 can be formed in the cavity 22.

11 shows an optoelectronic component 1, in which the in the carrier 20 10 generated reflection element 52 was transferred to the chip carrier 70, for example by means of the in 7 method shown. There where in 10 the webs 26 were arranged, the optoelectronic semiconductor chips 71 are now arranged, these being somewhat (for example 10 percent) smaller than the recesses caused by the webs 26. Here, the method according to the invention enables the simple production of an optoelectronic component 1 with a reflection element 52.

In the designs of the 8 to 11 It can be provided that the cavities 22 again have structured surfaces in order to increase reflection of the reflection elements 52 formed in the cavities 22.

12 shows a top view of a carrier 20 with cavities 22, the cavities 22 each being designed circumferentially around a web 26. The cavities 22 can now be filled with an element material 41, for example for a housing element.

13 shows cross sections through various intermediate steps of a method for producing an optoelectronic component 1, the carrier 20 being the 12 is used. A housing element 53 is formed in the cavities 22 by means of the element material 41. By means of a light pulse 80, the housing element 53 can be released from the cavity 22 or from the carrier 20 and transferred to the chip carrier 70. The housing element 53 is then arranged all around the optoelectronic semiconductor chip 71. In particular, a height of the housing element 53 can be greater than a height of the optoelectronic semiconductor chip 71. A housing cavity 44 formed in this way can then be filled, for example, with a conversion element.

14 shows a cross section through an optoelectronic component 1, in which an optoelectronic semiconductor chip 71 is arranged on a chip carrier. Furthermore, the optoelectronic component 1 has a conversion element 43, two reflection elements 52 and a housing element 53. The conversion element 43 can be as in connection with 2 to 6 explained and transferred. The reflection elements 52 can be as in connection with 7 to 11 explained and transferred. The housing element 53 can be as in connection with 12 and 13 explained and transferred. In particular, the elements 40 (conversion element 43, two reflection elements 52 and housing element 53) can have been transferred from different carriers 20 using the method explained. In general, after the element 40 has been transferred from the carrier 20, a further element 40 can be transferred from a further carrier 20. The methods already described can be used to produce the further element 40.

15 shows a top view of a carrier 20 during an intermediate step of a further method for producing an optoelectronic component 1. The carrier 20 has an electrically conductive region 27. The conductive region 27 is divided into element regions 28 and connecting webs 29, with the connecting webs 29 connecting the element regions 28 in an electrically conductive manner. The element areas 28 of the carrier 20 are analogous to the conversion element 43 6 shaped, but other shapes are also conceivable.

16 shows a cross section through the carrier 20 15 after further intermediate steps of a method for producing an optoelectronic component 1. A first partial material 55 of the element material 41 was applied to the conductive area 27 by means of electrophoresis. The first partial material 55 includes particles 56, which can correspond to the phosphor particles or reflection particles already described above. The particles 56 of the 16 are in particular phosphor particles. A second partial material 57 of the element material 41 is introduced between the particles 56 of the first partial material 55. The second partial material 57 can in particular comprise one of the matrix materials described above and can be applied, for example, by means of a printing process or a spraying process. For the sake of clarity, not all particles 56 or not all of the first partial material 55 are provided with reference numbers.

17 shows a top view of the carrier 20 16 . The particles 56 of the first partial material 55 and the second partial material 57 form the elements 40 in the area of the element regions 28. These can be, for example, conversion elements 43 or reflection elements 52.

18 shows cross sections through several intermediate steps of a method for producing an optoelectronic component 1, in which the in connection with 15 to 17 explained carrier 20 is used. The particles 56 of the first partial material 55 and the second partial material 57 form here, for example, a conversion element 43, which is to be transferred to the optoelectronic semiconductor chip 71. For this purpose, a light pulse 80 can again be used to detach the conversion element 43 from the carrier 20 and transfer it to the chip carrier 70. Analogously, this method can also be used if the element 40 is a reflection element 52.

This in connection with the 15 to 18 The procedure explained can be further improved with the options already explained. For example, a conductive coating could be arranged on the electrically conductive area 27 of the carrier, which supports the detachment of the element 40 from the carrier 20. Furthermore, an adhesive 42 can be applied to the element 40 analogously to 3 be arranged. In addition, the carrier 20 can have a structured surface in the area of the element areas 28 5 have to generate elements 40 with output structure 49 and/or lens structure 51.

19 shows a top view of a carrier 20, which is the carrier 20 of 15 corresponds, unless differences are described below. The carrier 20 can then replace the carrier 20 15 in the in connection with the 16 to 18 the process steps explained can be used. An insulating material 31 is arranged on the carrier all around the element regions 28. This allows more precise control of where the particles to be deposited using electrophoresis are deposited. A cavity 22 is also formed by the insulating material 31, which is arranged circumferentially around the element regions 28, and the element 40 produced below is at least partially arranged in the cavity. In contrast to the representation of the 19 It can also be provided that the insulating material 31 is not arranged all around the element regions 28, but only covers the connecting webs 29. Furthermore, in 19 an optional conductive coating 32 is applied to the element areas 28, which makes it easier to detach the elements 40 from the carrier.

In all embodiments it can be provided that the element 40 is finally hardened after being transferred to the chip carrier 70, for example by means of temperature or by waiting for a predetermined period of time. In all embodiments, the optoelectronic semiconductor chip 71 can be a micro-LED or a micro-LD.

The invention was illustrated and described in more detail using the preferred exemplary embodiments. However, the invention is not limited to the examples disclosed. Rather, other variations can be derived by those skilled in the art from the exemplary embodiments described without departing from the scope of the invention.

REFERENCE SYMBOL LIST

1

optoelectronic component

10

Flowchart

11

first step of the process

12

second procedural step

13

third step of the process

14

fourth step of the process

15

fifth procedural step

20

carrier

21

Carrier material

22

cavity

23

Wall

24

Coating

25

structure

26

web

27

electrically conductive area

28

Element area

29

connecting bridge

31

insulating material

32

conductive coating

40

element

41

Element material

42

Glue

43

Conversion element

44

first sub-element

45

second sub-element

46

release agent

47

evaporated release agent

48

structured surface

49

decoupling structure

51

Lens structure

52

Reflective element

53

Housing element

54

Housing cavity

55

first partial material

56

particles

57

second part material

70

Chip carrier

71

optoelectronic semiconductor chip

72

Top contact

80

light pulse

81

another light pulse

Claims (20)

Method for producing an optoelectronic component (1), with the following steps: - Providing a carrier (20); - Generating an element (40) for the optoelectronic component (1) on the carrier (20), the element (40) consisting of an element material (41); - Providing a chip carrier (70) with an optoelectronic semiconductor chip (71) and arranging the carrier (20) above the chip carrier (70) such that the element (40) faces the chip carrier (70); - Detaching the element (40) from the carrier (20); - Transferring the element (40) to the chip carrier (70). Procedure according to Claim 1 , wherein the carrier (20) has a cavity (22), the element (40) being at least partially produced within the cavity (22). Procedure according to Claim 1 or 2 , wherein the element (40) is detached from the carrier (20) and/or the element (40) is transferred to the chip carrier (70) by means of a light pulse (80), the carrier (20) being responsible for electromagnetic radiation in at least is transparent in a wavelength range, wherein a light of the light pulse (80) lies in the transparent wavelength range of the carrier (20). Procedure according to one of the Claims 1 until 3 , wherein the element material (41) has a separating agent (36), the separating agent (46) being at least partially evaporated by a light pulse (80). Procedure according to one of the Claims 1 until 4 , wherein after the element (40) has been produced, an adhesive (42) is applied to the element (40). Procedure according to one of the Claims 1 until 5 , wherein a coating (24) is applied to the carrier (20) before the element (40) is produced. Procedure according to one of the Claims 1 until 6 , wherein the element material (41) is a curable material. Procedure according to Claim 7 , wherein the element material (41) is partially hardened before the element (40) is released in such a way that the element (40) is essentially dimensionally stable. Procedure according to one of the Claims 1 until 8th , wherein the element (40) is a conversion element (43) or a reflection element (52). Procedure according to Claim 9 , wherein the element (40) is a conversion element (43) and wherein a color locus of the element (40) is determined by means of pump light, the carrier (20) being transparent for the pump light or a converted light of the conversion element (43). Procedure according to one of the Claims 1 until 10 , wherein the element (40) has a matrix material, and in particular has a matrix material with embedded particles. Procedure according to one of the Claims 1 until 11 , wherein the carrier (20) has an electrically conductive area (27), a first partial material (55) of the element material (41) being applied to the conductive area (27) by means of electrophoresis. Procedure according to Claim 12 , wherein the first partial material (55) has particles (56), wherein a second partial material (57) of the element material (41) is introduced between the particles (56) of the first partial material (55). Procedure according to Claim 12 or 13 , wherein the electrically conductive area (27) is partially covered with an insulating material (31) before the first partial material (55) is applied. Procedure according to one of the Claims 1 until 14 , wherein the carrier (20) is structured so that the element (40) has a structured surface (48). Procedure according to one of the Claims 1 until 15 , wherein a plurality of elements (40) are generated on the carrier (20) and wherein an element (40) to be transferred is selected and transferred to the chip carrier (70) or a plurality of elements (40) to be transferred are selected and onto the chip carrier (70) be transmitted. Procedure according to one of the Claims 1 until 16 , whereby the element (40) is finally hardened after being transferred to the chip carrier (70). Procedure according to one of the Claims 1 until 17 , wherein the optoelectronic semiconductor chip (71) is a micro-LED or a micro-LD. Procedure according to one of the Claims 1 until 18 , wherein further element (40) is transferred from another carrier (20). Optoelectronic component (1) with a chip carrier (70), an optoelectronic semiconductor chip (71) arranged on the chip carrier (70) and an element (40).

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