DE102021123308A1 - Semiconductor module with at least one first semiconductor element and a second semiconductor element connected in series with the first semiconductor element, electrical full bridge, power factor correction circuit and resonant converter - Google Patents

Abstract

The invention relates to a semiconductor module (22a, 22b) with at least a first semiconductor element (24) and a second semiconductor element (26), which are arranged together on an upper side (20) of a circuit board (18) and in which on an underside (30) at least one intermediate circuit capacitor (32) is arranged on the printed circuit board (18), the printed circuit board (18) having a first intermediate layer (38) and a second intermediate layer (42), a first metallic structure ( 44) is formed, which corresponds to surfaces of the first semiconductor element (24) and the second semiconductor element (26), wherein a second planar metallic structure (46) is formed in the second intermediate layer (42), which is metallic to the surface of the first Structure (44) corresponds, and wherein the first metallic structure (44) and the second metallic structure (46) at respective ends (48) with each other are electrically contacted. The invention also relates to an electrical full bridge (16a, 16b), a power correction factor circuit (14) and a resonant converter (12).

Description

The invention relates to a semiconductor module having at least a first semiconductor element and a second semiconductor element connected in series with the first semiconductor element. The invention also relates to an electrical full bridge, a power factor correction circuit and a resonant converter.

Electronic power half bridges, which are also referred to here as semiconductor modules, are formed from at least one actively switching element, for example a diode transistor or a transistor transistor, and generate a voltage change at the middle switching node at the moment of the switching process between the two potentials. Their speed is largely determined by the transistor technology used and effective gate drive impedances. These switching transients at the switching node lead to current changes in the involved control channels and output capacitances of the transistors as well as in externally located intermediate circuit capacitors, which in turn lead to voltage increases, in particular to periodic oscillations, in all inductive parasitic effects of commutation paths involved, in particular the so-called load commutation circuit, according to the law of induction. Geometrically extensive commutation circuits are unavoidable, especially in currently industrializable, discretely located PCB structures. As an undesirable side effect, however, they must be minimized.

The DE 69 233 450 T2 relates to a semiconductor module suitable for avoiding power loss caused by noise, downsizing, high-frequency switching, lower noise and improved reliability of a three-level inverter device.

The DE 199 474 76 A1 proposes converters for the conversion of electrical energy, in particular for a vehicle electrical system, which have at least one half-bridge, which in turn comprises at least one high-side and one low-side switch with a definable number of switches. The high-side and the low-side switch have a common connection which is connected to an electrical energy-generating means. There is an intermediate circuit capacitor in parallel with the half-bridge, the capacitance of which should be as small as possible. For this purpose, the switches of the half-bridge are driven offset from one another, so that the current to be supplied by the intermediate circuit capacitor remains as low as possible.

The object of the present invention is to create a semiconductor module, an electrical full bridge, a power factor correction circuit and a resonant converter, by means of which an improved switching process can be implemented.

This object is achieved by a semiconductor module, an electrical full bridge, a power factor correction circuit and a resonant converter according to the independent patent claims. Advantageous embodiments are specified in the dependent claims.

One aspect of the invention relates to a semiconductor module having at least a first semiconductor element and a second semiconductor element connected in series with the first semiconductor element, in which the first semiconductor element and the second semiconductor element are arranged together on an upper side of a printed circuit board and in which on an underside of the printed circuit board opposite the upper side at least one intermediate circuit capacitor of the semiconductor module is arranged.

Provision is made for the printed circuit board to have a first intermediate layer and a second intermediate layer between the upper side and the lower side, with a first planar metallic structure being formed in the first intermediate layer, which essentially corresponds to surfaces of the first semiconductor element and the second semiconductor element. wherein a second planar metallic structure is formed in the second intermediate layer, which corresponds to the surface of the first metallic structure, and wherein the first metallic structure and the second metallic structure are electrically contacted with one another at respective ends.

In particular, a semiconductor module is thus proposed, which is formed in particular on a four-layer printed circuit board. The at least two semiconductor elements are provided on the first layer of the circuit board. The first metallic structure is provided in the first intermediate layer and the second metallic structure is provided in the second intermediate layer. In turn, the intermediate circuit capacitor is provided in the lower layer. The enumerated layers are preferably formed in the enumerated order from top to bottom.

In particular, the effectively spanned area of the commutation cell is thus reduced, since a so-called mirror current flow occurs within the intermediate layers, which is directed exactly in the opposite direction to the induced current flow, which is induced by the two semiconductor elements during the switching process. On the underlayer, also known as the bottom layer is provided, a further suitable localization level of components involved in the commutation is provided, in particular the intermediate circuit capacitor can be provided there. The thermal path upwards is not blocked or restricted by the intermediate circuit capacitor, so that, for example, a cooling device, also referred to as topside cooling, can be provided on the upper side, which is also referred to as a top layer, in particular on the semiconductor elements.

In particular, the intermediate circuit capacitor is designed to correspondingly buffer the electronic power half bridge, which is formed by the semiconductor module. Particularly in the case of switching with a steep edge, the high-voltage DC voltage source is decoupled via the parasitic inductance and the switching process is largely determined by the intermediate circuit capacitor as part of the entire commutation cell. Its low-inductance design and connection is therefore of interest.

In particular, an inductive canceling is thus realized via the intermediate layers of the printed circuit board. On the canceling level, i.e. on the first intermediate layer and the second intermediate layer, a so-called mirror current arises, which corresponds exactly to the induced current during the switching process. As a result, the induced currents are “erased” (cancelled), so to speak, which means that no parasitic inductances arise, but at least they are lower. In particular, this enables an improved and faster switching operation of the semiconductor bridge.

According to an advantageous embodiment, the upper side, the first intermediate layer, the second intermediate layer and the lower side are arranged such that they are electrically isolated from one another. In particular, they may only be contacted with one another via appropriately predefined pins or connecting elements. For example, the first intermediate layer and the second intermediate layer are electrically insulated from one another, but are electrically connected to one another via corresponding connecting elements at the respective ends of the layers, so that a current flow is formed between the first intermediate layer and the second intermediate layer. In this way, unwanted short circuits within the respective layers can be prevented.

Furthermore, it has proven to be advantageous if a cooling device is arranged on a respective upper side of the first semiconductor element and/or the second semiconductor element. In particular, the first semiconductor element and/or the second semiconductor element are formed with the underside of the semiconductor elements on the top side of the printed circuit board. The upper side of the semiconductor elements thus forms a cooling surface, which can contribute to cooling, in particular when the semiconductor elements are in operation. When the semiconductor elements are in operation, in particular since they are provided as power electronic semiconductor elements, heat is generated which can lead to a defect in the semiconductor elements or can downgrade the performance of the semiconductor elements. The cooling device, which can be provided with cooling fins or as a fluidic cooling device, for example, can thus be used to cool the semiconductor elements, which in turn can lead to an increase in the performance of the semiconductor module.

In a further advantageous embodiment, the first semiconductor element and/or the second semiconductor element are designed as a gallium nitride transistor. In particular, a very steep switching edge can be achieved by means of the gallium nitride transistor, so that short switching times are realized in the semiconductor bridge. As a result, an improved semiconductor module, for example for motor vehicle construction, can be implemented.

According to a further advantageous embodiment, the first semiconductor element is electrically contacted with the high-voltage plus potential and/or the second semiconductor element is contacted with a high-voltage minus potential. For example, the semiconductor module can be used as part of an electrical full bridge inside a motor vehicle. For example, corresponding switching processes can then be provided via the semiconductor module, for example to provide a DC/DC converter.

In a further advantageous embodiment, the first semiconductor element and the second semiconductor element are designed for a voltage level of at least 650 volts and a current of at least 60 amperes. In particular, the semiconductor elements can thus be used in an on-board electrical system of an at least partially electrically operated motor vehicle. In particular, by using the proposed semiconductor module, steep-edged switching can be implemented even with a correspondingly high voltage and a correspondingly high current intensity.

It has also proven to be advantageous if a predetermined distance is maintained on the upper side at least between the first semiconductor element and the second semiconductor element, so that clearances and/or creepage distances depend on a voltage level and/or in Depending on a current are taken into account. In particular, appropriate distances between the semiconductor elements must be maintained so that, for example, no flashovers can take place during a switching process. These distances are in turn dependent on the voltage level and/or a set current intensity. This in turn increases the area, allowing more parasitic current to be induced. However, the semiconductor module according to the invention makes it possible for a mirror current to be reliably generated within the first intermediate layer and the second intermediate layer even with corresponding distances, as a result of which an improved semiconductor module can be provided and high voltages and currents can nevertheless be achieved.

A further aspect of the invention relates to an electrical full bridge with a first semiconductor module according to the preceding aspect and with a second semiconductor module according to the preceding aspect. The electrical full bridge is designed in particular for operation in a motor vehicle, in particular an at least partially electrically operated motor vehicle.

Furthermore, the invention also relates to a power correction factor circuit, which is also referred to as power factor correction (PFC), with at least one electrical full bridge according to the preceding aspect.

Furthermore, the invention also relates to a resonant converter for an electrical component, for example for a so-called onboard charger, with an electrical full bridge according to the preceding aspect. The resonant converter is designed in particular as a so-called LLC (inductance-inductance-capacitance) converter.

Yet another aspect of the invention relates to a motor vehicle with an electrical full bridge according to the preceding aspect and/or a power factor correction circuit according to the preceding aspect and/or a resonant converter according to the preceding aspect. The motor vehicle is designed in particular as an at least partially electrically operated motor vehicle, in particular as a fully electrically operated motor vehicle.

Advantageous configurations of the semiconductor module are to be regarded as advantageous configurations of the electrical full bridge, the power correction factor circuit, the resonance converter and the motor vehicle.

Further features of the invention result from the claims, the figures and the description of the figures. The features and combinations of features mentioned above in the description and the features and combinations of features mentioned below in the description of the figures and/or shown alone in the figures can be used not only in the combination specified in each case, but also in other combinations or on their own.

• 1 eine schematische Seitenansicht einer Ausführungsform eines Kraftfahrzeugs;
• 2 eine schematische Draufsicht auf eine Leiterplatte;
• 3 eine schematische Draufsicht auf eine Unterseite der Leiterplatte gemäß 2;
• 4 eine schematische Ansicht einer Oberseite der Leiterplatte gemäß 2;
• 5 eine schematische Ansicht der Unterseite der Leiterplatte gemäß 2;
• 6 eine schematische Draufsicht auf eine erste Zwischenschicht einer Leiterplatte;
• 7 eine weitere schematische Draufsicht auf eine zweite Zwischenschicht einer Leiterplatte;
• 8 eine schematische Schnittansicht gemäß einer Ausführungsform eines Halbleitermoduls; und
• 9 eine schematische Perspektivansicht gemäß einer weiteren Ausführungsform eines Halbleitermoduls.

The invention will now be explained in more detail using a preferred exemplary embodiment and with reference to the drawings. Show it:

• 1 a schematic side view of an embodiment of a motor vehicle;
• 2 a schematic plan view of a printed circuit board;
• 3 a schematic plan view of an underside of the printed circuit board according to FIG 2 ;
• 4 a schematic view of a top side of the circuit board according to FIG 2 ;
• 5 a schematic view of the underside of the circuit board according to FIG 2 ;
• 6 a schematic plan view of a first intermediate layer of a printed circuit board;
• 7 a further schematic plan view of a second intermediate layer of a printed circuit board;
• 8th a schematic sectional view according to an embodiment of a semiconductor module; and
• 9 a schematic perspective view according to a further embodiment of a semiconductor module.

Elements that are the same or have the same function are provided with the same reference symbols in the figures.

1 shows a schematic side view of an embodiment of a motor vehicle 10. In the present case, motor vehicle 10 has a resonant converter 12, which is designed in particular as a so-called LLC resonant converter. Furthermore, the motor vehicle 10 has a power factor correction circuit 14 . The resonant converter 12 and the power correction factor circuit 14 each have at least one electrical full bridge 16 .

2 shows a schematic plan view of an embodiment of a printed circuit board 18. In the present case, in particular, a top side 20 of the printed circuit board 18 is shown. In particular, a first full bridge 16a and a second full bridge 16b are shown on the upper side 20 of the printed circuit board 18 . A respective full bridge 16a, 16b in turn has at least one semiconductor module 22, in this case a first Semiconductor module 22a and a second semiconductor module 22b on. Each of the semiconductor modules 22a, 22b in turn has at least one respective semiconductor element 24, 26. In particular, it is shown, for example, only on the basis of the first semiconductor module 22a that this can have a first semiconductor element 24 and a second semiconductor element 26 . This applies analogously to the further shown semiconductor modules 22b and 22a of the second electrical full bridge 16b.

Respective driver stages 28 for the semiconductor elements 24, 26 are also shown on the upper side 20. FIG.

3 shows a schematic plan view of an underside 30 of the printed circuit board 18. In particular, it is shown here that on the underside 30 at least one intermediate circuit capacitor 32 for a respective semiconductor module 22a, 22b according to FIG 2 is trained.

4 shows a schematic plan view of a top side 20 of the circuit board 18 of FIG 2 . In the present case, in particular, the corresponding electrical components are not formed, rather only the electrical contacts, for example copper tracks, are shown on the printed circuit board 18 . In particular, it is shown that the first semiconductor element 24 is electrically contact-connected to a high-voltage plus potential 34 and/or the second semiconductor element 26 is contact-connected to a high-voltage minus potential 36 . This applies analogously to the further semiconductor modules 22a, 22b of the electrical full bridges 16a, 16b shown in accordance with 2 .

5 again shows the underside 30 of the printed circuit board 18 with the corresponding contacts. In the present case, the plane of the intermediate circuit capacitor 32 is thus shown in particular.

6 shows a schematic top view of a first intermediate layer 38 of the printed circuit board 18. In particular, it is shown that a mirror current 40 is generated during the switching process of the semiconductor elements 24, 26, this being produced in particular by the inductance during switching and thus setting the mirror current 40 on the first intermediate layer 38 , which essentially corresponds to the induced current through the half-bridge or the semiconductor module 22a, 22b.

7 shows a second intermediate layer 42, which is electrically contacted in particular with the first intermediate layer 38, so that a circulating current of the mirror current 40 is generated between the first intermediate layer 38 and the second intermediate layer 42.

In particular, it is therefore proposed that the semiconductor module 22a, 22b be provided with at least the first semiconductor element 24 and a second semiconductor element 26 connected in series with the first semiconductor element 24, in which the first semiconductor element 24 and the second semiconductor element 26 are mounted together on the top side 20 of the printed circuit board 18 are arranged and in which at least one intermediate circuit capacitor 32 of the semiconductor module 22a, 22b is arranged on the underside 30 of the printed circuit board 18 opposite the upper side 20. It is provided that the printed circuit board 18 has the first intermediate layer 38 and the second intermediate layer 42 between the upper side 20 and the lower side 30, with a first flat metal structure 44 being formed in the first intermediate layer 38, which is essentially connected to the surfaces of the first semiconductor element 24 and the second semiconductor element 26, wherein a second planar metallic structure 46 is formed in the second intermediate layer 42, which corresponds to the surface of the first metallic structure 44, and wherein the first metallic structure 44 and the second metallic structure 46 are electrically contacted with each other at respective ends 48.

In particular, it is provided that the upper side 20, the first intermediate layer 38, the second intermediate layer 42 and the lower side 30 are arranged electrically insulated from one another, it being possible for them to be connected to one another via corresponding connecting pins.

8th shows a schematic sectional view according to an embodiment of a semiconductor module 22a, 22b. In the present case, in particular, the semiconductor module 22a, 22b is rotated through 180 degrees. In other words, the top 20 is pointing down and the bottom 30 is pointing up. The 8th FIG. 1 shows in particular that a so-called canceling loop can be provided in the respective intermediate layers 38, 42, which loop corresponds in particular to the mirror current 40.

In particular, it is provided that the first semiconductor element 24 and/or the second semiconductor element 26 are designed as a gallium nitride transistor. Furthermore, it is provided in particular that the first semiconductor element 24 and the second semiconductor element 26 are designed for a voltage level of at least 650 volts and a current of 60 amperes. The 8th also shows that at least between the first semiconductor element 24 and the second semiconductor element 26, a predetermined distance 50 is maintained on the upper side 20, so that air gaps and/or creepage distances depending on a voltage level and/or depending on a current intensity can be taken into account.

9 shows a further schematic embodiment of a further possibility for improving a semiconductor module 22a, 22b. The present example shows in particular that instead of the two intermediate layers 38, 42, a purely metallic block 52 can also be introduced in order to induce a corresponding mirror current 40 within the metallic block 52, which in turn leads to an improved mirror current 40, whereby the parasitic inductance during Switching process can be further reduced.

Furthermore shows you 9 that independently of the metallic block 52, a cooling device 54 can be formed on the upper sides 56 of the semiconductor elements 24, 26.

Reference List

10

motor vehicle

12

resonant converter

14

power correction factor circuit

16a, 16b

full bridge

18

circuit board

20

top

22a, 22b

semiconductor module

24

first semiconductor element

26

second semiconductor element

28

driver stage

30

bottom

32

intermediate circuit capacitor

34

High-voltage plus potential

36

High-voltage minus potential

38

first intermediate layer

40

mirror current

42

second intermediate layer

44

first metallic structure

46

second metallic structure

48

end up

50

Distance

52

metallic block

54

cooling device

56

top

QUOTES INCLUDED IN DESCRIPTION

This list of documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• DE 69233450 T2 [0003]
• DE 19947476 A1 [0004]

Claims (10)

Semiconductor module (22a, 22b) with at least one first semiconductor element (24) and a second semiconductor element (26) connected in series with the first semiconductor element (24), in which the first semiconductor element (24) and the second semiconductor element (26) are located together on a top side ( 20) of a circuit board (18) and in which at least one intermediate circuit capacitor (32) of the semiconductor module (22a, 22b) is arranged on an underside (30) of the circuit board (18) opposite the top side (20), characterized in that the Printed circuit board (18) has a first intermediate layer (38) and a second intermediate layer (42) between the upper side (20) and the lower side (30), a first flat metallic structure (44) being formed in the first intermediate layer (38). , which corresponds substantially to surfaces of the first semiconductor element (24) and the second semiconductor element (26), wherein in the second intermediate layer (42) z wide, flat metallic structure (46) is formed, which corresponds to the surface of the first metallic structure (44), and wherein the first metallic structure (44) and the second metallic structure (46) make electrical contact with one another at respective ends (48). are. Semiconductor module (22a, 22b) after claim 1 , characterized in that in each case the top (20), the first intermediate layer (38), the second intermediate layer (42) and the bottom (30) are arranged electrically insulated from one another. Semiconductor module (22a, 22b) after claim 1 or 2 , characterized in that a cooling device (54) is arranged on a respective upper side (56) of the first semiconductor element (24) and/or of the second semiconductor element (26). Semiconductor module (22a, 22b) according to one of the preceding claims, characterized in that the first semiconductor element (24) and/or the second semiconductor element (26) are designed as a gallium nitride transistor. Semiconductor module (22a, 22b) according to one of the preceding claims, characterized in that the first semiconductor element (24) is electrically contacted with a high-voltage plus potential (34) and / or the second semiconductor element (26) with a high-voltage minus Potential (36) is contacted. Semiconductor module (22a, 22b) after claim 5 , characterized in that the first semiconductor element (24) and / or the second semiconductor element (26) are designed for a voltage level of at least 650 V and a current of at least 60 A. Semiconductor module (22a, 22b) according to one of the preceding claims, characterized in that at least between the first semiconductor element (24) and the second semiconductor element (26) a predetermined distance (50) is maintained on the upper side (20) of the printed circuit board (18). , so that clearances and/or creepage distances are taken into account as a function of a voltage level and/or as a function of an amperage. Electrical full bridge (16a, 16b) with a first semiconductor module (22a) according to one of Claims 1 until 7 and with a second semiconductor module (22b) according to one of Claims 1 until 7 . Power factor correction circuit (14) for an electrical component with an electrical full bridge (16a, 16b). claim 8 . Resonant converter (12) for an electrical component with an electrical full bridge (16a, 16b). claim 8 .

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