DE102020214966A1 - Commutation cell for an inverter - Google Patents

Abstract

The invention relates to a commutation cell for an inverter. The commutation cell has a semiconductor switch half-bridge. The semiconductor switch half-bridge comprises at least one high-side semiconductor switch and at least one low-side semiconductor switch. The commutation cell also includes at least one substrate, the semiconductor switches, in particular the semiconductor switches of the semiconductor switch half-bridge, being materially connected to the substrate, in particular soldered or sintered. According to the invention, the commutation cell has an intermediate circuit capacitor. The intermediate circuit capacitor is a polymer multi-layer capacitor whose electrical connection is formed by a surface area of the capacitor. In the commutation cell, at least one connection of the intermediate circuit capacitor is solder-connected to the substrate—in particular directly, and thus without sheet metal elements or sheet metal angle connection elements.

Description

State of the art

The invention relates to a commutation cell for an inverter. The commutation cell has a semiconductor switch half-bridge. The semiconductor switch half-bridge comprises at least one high-side semiconductor switch and at least one low-side semiconductor switch. The commutation cell also includes at least one substrate, the semiconductor switches, in particular the semiconductor switches of the semiconductor switch half-bridge, being integrally connected to the substrate, in particular soldered or sintered.

From the DE 103 44 633 A1 a converter for an electrical machine is known, which comprises bridge circuits and a film capacitor, wherein an electrical connection between the film capacitor and the bridge circuits is realized without a bus bar by means of thin separate strip conductors.

Disclosure of Invention

According to the invention, the commutation cell of the type mentioned at the outset has an intermediate circuit capacitor. The intermediate circuit capacitor is a capacitor, in particular a PML capacitor (PML=polymer multi-layer), whose electrical connection is formed by a surface area of the capacitor. In the commutation cell, at least one connection of the intermediate circuit capacitor is solder-connected to the substrate—in particular directly, and thus without sheet metal elements or sheet metal angle connection elements.

A low-inductance commutating cell can advantageously be provided in this way. The PML capacitor can also advantageously be soldered to the substrate together with the semiconductor switches of the semiconductor switch half-bridge—in particular by means of a reflow soldering process.

In a preferred embodiment, the substrate is a ceramic substrate. For example, the ceramic substrate is an AMB substrate (AMB=Active Metal Brazed), a DCB substrate (DCB=Direct Copper Bonded), or an IMS substrate (IMS=Insulated Metal Substrate). The substrate can advantageously withstand such high temperatures and, moreover, advantageously have good thermal conductivity for dissipating heat loss to a side opposite the semiconductor switches and the intermediate circuit capacitor. The substrate preferably comprises an electrically insulating ceramic layer and at least one electrically conductive layer. The at least one electrically conductive layer is preferably designed for surface soldering to electronic components.

In a preferred embodiment, the intermediate circuit capacitor and the semiconductor switches of the semiconductor switch half-bridge are arranged in the same substrate plane, in particular a solder plane of the substrate. The substrate preferably has at least one electrically conductive layer and one electrically insulating layer. The electrically conductive layer is formed by a copper layer, for example. In this exemplary embodiment, the at least one electrically conductive layer forms a rewiring for connecting the electronic components, in particular the semiconductor switches with the intermediate circuit capacitor, to one another. The rewiring is preferably arranged in a common plane. The electrically insulating layer is formed, for example, by a ceramic layer, in particular an aluminum oxide layer.

The substrate preferably has a (in particular particularly well) thermally conductive and electrically conductive rear side layer, which is designed to be connected to a heat sink. In this way, heat loss can advantageously be conducted from the semiconductor switches through the substrate to the heat sink.

In a preferred embodiment, the electrical connections of the intermediate circuit capacitor are formed as electrically conductive connection surfaces which are parallel to one another and are more preferably planar. At least one of the connection surfaces, in particular a connection surface of a negative connection of the intermediate circuit capacitor, or a connection surface of a positive connection of the intermediate circuit capacitor, is preferably soldered to the substrate. More preferably, both connections of the intermediate circuit capacitor are soldered to the substrate, in particular an electrically conductive layer of the substrate. In this way, a direct, and thus a low-impedance, and short electrically conductive connection to the substrate can advantageously be formed.

In a preferred embodiment, the connection pads extend transversely to a flat extension of the substrate. In this embodiment, the intermediate circuit capacitor is soldered to the substrate in a horizontal arrangement.

In a preferred embodiment, a connection of the intermediate circuit capacitor is electrically connected to one of the semiconductor switches, in particular low-side semiconductor switches, or to the substrate by means of at least one bonding wire, in particular a bonding tape. The Between Circular capacitor can be connected to the substrate in an upright position, for example. In a preferred embodiment, the connection is soldered to the substrate over its entire surface. In this way, a low-inductance arrangement can advantageously be formed by the commutation cell.

In a preferred embodiment, one connection of the intermediate circuit capacitor is soldered to the substrate, and the other connection of the intermediate circuit capacitor is electrically connected to one of the semiconductor switches, in particular low-side semiconductor switches, or the substrate by means of at least one bonding wire. If the bonding wire is connected to the substrate, the bonding wire is connected to an electrically conductive layer of the substrate.

The intermediate circuit capacitor can thus be electrically connected to the substrate in a standing position, and can thus form a low-inductance arrangement. In a preferred embodiment, the connection of the intermediate circuit capacitor--in particular in the above-described standing arrangement--is soldered to the substrate over its entire surface. The connection can advantageously be reflow-soldered to the substrate. In a further advantageous manner, the intermediate circuit capacitor can be connected to the substrate with the connection lying on the substrate, in particular an electrically conductive layer of the substrate, together with the semiconductor switches in a reflow soldering process.

In a preferred embodiment, the terminal bonded to the substrate is soldered to an electrically conductive metal member. More preferably, the at least one bonding wire is bonded to the metal element. A bondable surface can advantageously be formed between the intermediate circuit capacitor and the bonding wire by means of the metal element. The metal element is preferably a piece of sheet metal, in particular a piece of sheet metal containing copper and/or aluminum.

In a preferred embodiment, the at least one bonding wire forms an electrical safety fuse, which is designed to melt in the event of a short circuit in the intermediate circuit capacitor when a predetermined current is exceeded, and thus electrically isolate the capacitor from the intermediate circuit. In this way, a low-inductance arrangement can advantageously be formed with a fused electrical interconnection to protect the commutating cell from burning out.

Instead of the bond connection, the commutation cell can have a sheet metal piece, in particular a piece of copper sheet metal, which electrically connects the connections to be connected. The piece of sheet metal, in particular the stamped grid or lead frame, can be soldered or sintered to the connections. The sheet metal piece can be bent to bridge vertical steps, in particular angled in an S-shape.

The invention also relates to an inverter with a commutation cell of the type described above. The inverter preferably has at least one commutation cell for each phase. Advantageously, the inverter can thus be provided in a cost-effective and low-inductive manner. In a preferred embodiment of the inverter, the commutating cells are each arranged in a common substrate plane. More preferably, the commutation cells of the inverter are thermally conductively connected to a common heat sink. The heat sink is formed by an aluminum block, for example. The heat sink can have fluid channels for conducting a cooling fluid and/or cooling fins for dissipating heat loss.

In a preferred embodiment, the commutation cells are designed identically for each phase. More preferably, the intermediate circuit capacitors each face one another, so that a surface area is formed in the substrate plane, in which the intermediate circuit capacitors are arranged together. A low-inductance arrangement of the inverter can advantageously be formed in this way.

The intermediate circuit capacitor is designed, for example, as a cuboid capacitor with connecting surfaces that are parallel to one another. The intermediate circuit capacitor is preferably a PML capacitor (PML=polymer multilayer) or a supercapacitor.

• 1 zeigt ein Ausführungsbeispiel für eine Kommutierzelle, bei der ein quaderförmiger Zwischenkreiskondensator mit einem Substrat in liegender Anordnung verlötet ist;
• 2 zeigt die in 1 dargestellte Kommutierzelle in einer Aufsicht;
• 3 zeigt ein Ausführungsbeispiel für eine Kommutierzelle, bei der ein quaderförmiger Zwischenkreiskondensator mit einem Substrat in stehender Anordnung verlötet ist;
• 4 zeigt die in 3 dargestellte Kommutierzelle in einer Aufsicht;
• 5 zeigt eine Kommutierzellenanordnung für einen Inverter, bei dem die Zwischenkreiskondensatoren räumlich in einer Gruppe angeordnet sind.

The invention is now described below with reference to figures and further exemplary embodiments. Further advantageous embodiment variants result from a combination of the features described in the figures and in the dependent claims.

• 1 shows an exemplary embodiment of a commutation cell in which a cuboid intermediate circuit capacitor is soldered to a substrate in a horizontal arrangement;
• 2 shows the in 1 commutating cell shown in a top view;
• 3 shows an exemplary embodiment of a commutation cell in which a cuboid intermediate circuit capacitor is soldered to a substrate in an upright arrangement;
• 4 shows the in 3 commutating cell shown in a top view;
• 5 shows a commutation cell arrangement for an inverter in which the intermediate circuit con densators are spatially arranged in a group.

1 shows an embodiment of a commutating cell 1 in a sectional view. The commutation cell 1 includes a substrate 2. The substrate 2 is, for example, a ceramic substrate, in particular a DCB substrate, an AMB substrate or an IMS substrate. The commutation cell 1 also includes a semiconductor switch half-bridge, including a high-side semiconductor switch 3 and a low-side semiconductor switch 4. The commutation cell 1 also includes an intermediate circuit capacitor 5, which is designed as a PML capacitor in this exemplary embodiment. In this exemplary embodiment, the PML capacitor is solder-connected to the substrate 2 in a horizontal arrangement. Both the semiconductor switches of the semiconductor switch half-bridge and the intermediate circuit capacitor 5 are solder-connected to an electrically conductive layer of the substrate 2 in each case by means of solder 15 . The electronic components of the commutation cell 1 thus extend in the same plane formed by the substrate 2 .

The high-side semiconductor switch 3 is solder-connected to a positive electrically conductive layer 8 . The low-side semiconductor switch 4 is connected to an electrically conductive layer 10 which forms an output connection, in particular a phase connection, of the commutation cell 1 . The intermediate circuit capacitor 5 has an electrical connection for electrically connecting the intermediate circuit capacitor 5 on end faces which extend parallel to one another and point away from one another in the opposite direction. A negative connection 6 is formed on an end face of the intermediate circuit capacitor 5 . A positive electrical connection 7 is formed on the other end face of the intermediate circuit capacitor 7 . The intermediate circuit capacitor 5 is cuboid in this exemplary embodiment. The negative connection 6 is solder-connected to a negative electrically conductive layer 9 by means of solder 15 . The positive connection 7 is solder-connected to the positive layer 8 by means of solder 15 .

The substrate 2 has a back layer 12 which, together with the electrically conductive layers for rewiring, in particular the positive layer 8, the negative layer 9 and the electrically conductive layer 10 forming the output connection, has an electrically insulating ceramic layer 11 between one another—in particular in the manner of a Sandwiches - include.

In this exemplary embodiment, the semiconductor switches 3 and 4 are in the form of unpackaged semiconductor switches, also referred to as bare dies. A source connection formed by a surface area of the high-side semiconductor switch 3 is bonded to the electrically conductive layer 10 by means of a bond connection 13, in particular at least one bond ribbon. A source connection of the low-side semiconductor switch 4, which is formed by a surface region of the low-side semiconductor switch 4 that faces away from the substrate 2, is bonded to the negative electrically conductive layer 9 of the substrate 2 by means of a bond connection 14.

The bonding connections 13 and 14 can each be formed by at least one or more bonding wires connected in parallel to one another.

by means of the in 1 commutation cell 1 shown is a low-inductance commutation cell 1 is formed. The connection surfaces of the intermediate circuit capacitor 5, formed by the electrical connections 6 and 7, are each arranged orthogonally (that is to say transversely) in the commutation cell 1 to a planar extension of the substrate 2.

2 shows the in 1 commutation cell 1 shown in a sectional view in a top view.

At the in 2 In the substrate 1 shown, the electrically conductive layers 8, 9 and 10 each form a rewiring structure, by means of which the electronic components soldered to the substrate 2 are electrically connected to one another--in particular forming a circuit arrangement of a semiconductor switch half-bridge with an intermediate circuit capacitor.

In this exemplary embodiment, the positive electrically conductive layer 8 has a U-shape in the substrate plane, with the electrically conductive layers 9 and 10, in particular the negative layer 9, and the layer 10 forming the output connection between the U-legs of the U-shape are included.

The U-shaped positive electrically conductive layer 8 contacts the positive terminal 7 of the intermediate circuit capacitor 5 and the drain terminal of the high-side semiconductor switch 3. The negative electrically conductive layer 9 contacts the negative terminal 6 of the intermediate circuit capacitor 5 and the in this Exemplary embodiment bond connection 14 formed by three bond ribbons, and thus the source connection of the low-side semiconductor switch 4, which is electrically connected to the negative electrically conductive layer 9 by means of the bond connection 14.

A source connection of the high-side semiconductor switch 3 is electrically connected to the output connection 10 by means of the bond connection 13 . With the U-shaped arrangement formed in this way, formed by the positive electrically conductive layer 8 and the negative layer 9 framed by the positive layer 8, and the electrically conductive layer 10 framed by the positive layer 8, which forms the output or phase connection , A low-inductance arrangement can be formed. A current flow, starting from the intermediate circuit capacitor 5, can flow via the positive electrically conductive layer 8 to the high-side semiconductor switch 3, while a negative current can flow from the intermediate circuit capacitor 5, via the negative electrically conductive layer 9, further via the bond connection 14 and the low-side semiconductor switch 4, and can flow further via the bond connection 13 to the high-side semiconductor switch 3. The currents so opposed to one another, as in 2 indicated by dashed lines, can thus advantageously form a small parasitic inductance.

3 shows a variant of the in 1 shown commutation cell. In the 3 Commutation cell 20 shown in a sectional view has - unlike in 1 commutation cell 1 shown - an intermediate circuit capacitor 25 soldered to a substrate 21 in standing assembly. The substrate 21 has an electrically insulating ceramic layer 22 and electrically conductive layers for rewiring, and a back layer 34 . The back layer 34 is formed, for example, by a metal layer, in particular a copper layer.

The commutation cell 20 comprises the substrate 21, a high-side semiconductor switch 23 and a low-side semiconductor switch 24, the semiconductor switches each being in the form of semiconductor switches without a housing, and each having the substrate 21, in particular an electrically conductive layer of the substrate 21, are soldered.

The commutation cell 20 also includes the intermediate circuit capacitor 25 which has a positive connection 26 which is soldered to a positive electrically conductive layer 28 of the substrate 21 by means of a solder 15 . The intermediate circuit capacitor 25, which is cuboid in this exemplary embodiment, has end faces pointing in opposite directions, on each of which an electrical connection in the form of an electrically conductive layer is formed. The connections are thus formed on surfaces of the intermediate circuit capacitor 25 that are parallel to one another. A negative connection 27 formed on an end face of the intermediate circuit capacitor 25 is soldered to an electrically conductive contact element 29 by means of a solder 15 . In this exemplary embodiment, the contact element 29 is formed by a metal plate which is designed to be soldered to the terminal 27 and to be bonded to a side opposite thereto by means of a bonding wire 31 . The bonding wire 31 thus connects the negative terminal 27 of the intermediate circuit capacitor 25 to a source terminal of the low-side semiconductor switch 24.

The low-side semiconductor switch 24 is solder-connected by means of a solder 15 to an output connection 30 which is formed by an electrically conductive layer of the substrate 21 in this exemplary embodiment. The output connection 30 is connected to the source connection of the high-side semiconductor switch 23 by means of a further bond connection 32 . The drain connection of the high-side semiconductor switch 23 is soldered to the positive electrically conductive layer 28 .

The positive electrically conductive layer 28 forms a circumferential ring in the plane of the substrate 21, which encloses the output connection 30 already mentioned. Both the intermediate circuit capacitor 25 and the high-side semiconductor switch 23 are each arranged on the annular electrically conductive positive layer 28 . The low-side semiconductor switch 24 is arranged on the island-shaped electrically conductive layer 30 surrounded by the positive electrically conductive layer 28 in the form of a ring.

The currents supplied by the intermediate circuit capacitor 25 can thus flow along the ring-shaped positive electrically conductive layer, whereas negative currents can flow parallel thereto—in particular via the bond connections 31 and 32—in the opposite direction to the positive currents. In this way, parasitic inductances can advantageously be eliminated.

4 shows the in 3 already shown commutation cell 20 in a plan. What is visible is the electrically conductive layer 30, which is surrounded in a ring shape by the positive electrically conductive layer 28 and forms an island, which forms an output terminal of the semiconductor switch half bridge. The electrically conductive layer 30 forming an island and an output terminal of the commutation cell is electrically insulated from the electrically conductive positive layer 28 surrounding the layer 30 by a trench 33 . The currents fed by the intermediate circuit capacitor 25 in the commutation cell 20 can cancel each other out in terms of their parasitic inductance—as indicated by the dashed circles.

In another embodiment - unlike in the 3 and 4 shown - the substrate with the positive terminal of the intermediate circuit capacitor 25 be soldered directly. For this purpose, the intermediate circuit capacitor 25 can be connected to a positive electrically conductive layer carrying positive potential, which is connected to a high-side semiconductor switch adjacent to the intermediate circuit capacitor 25 and connected to the substrate, and is routed there to its drain connection. Adjacent to the high-side semiconductor switch is a low-side semiconductor switch, the drain connection of which is soldered or sintered to an electrically conductive layer of the substrate that forms a phase connection. The layer of the substrate forming the phase connection is connected to the source connection of the high-side semiconductor switch by means of at least one bonding tape. At least one bonding tape is routed from a source connection of the low-side semiconductor switch that faces away from the substrate to the negative connection of the intermediate circuit capacitor that faces away from the substrate. The at least one negative bonding band, which is routed from the intermediate circuit capacitor to the low-side semiconductor switch, can bridge the at least one bonding band from the high-side semiconductor switch to the output connection. This forms a particularly low-inductance arrangement for a commutating cell.

5 FIG. 1 shows an exemplary embodiment of an inverter 40, which in this exemplary embodiment comprises six semiconductor switch half-bridges. The semiconductor switch half-bridges, which are each part of a commutation cell, can each be driven in pairs to form a three-phase inverter, or can be used to drive a six-phase electrical machine.

In this exemplary embodiment, the inverter 40 comprises six commutation cells 42, 43, 44, 45, 46 and 47, each of which comprises a semiconductor switch half-bridge comprising a high-side semiconductor switch, a low-side semiconductor switch and an intermediate circuit capacitor. Of the semiconductor switches, a high-side semiconductor switch 53 of the commutation cell 42 and a low-side semiconductor switch 54 of the commutation cell 42, and an intermediate circuit capacitor 55 of the commutation cell 42 are designated as examples.

In this exemplary embodiment, the commutation cells of the inverter 40 are arranged in such a way that the intermediate circuit capacitors are arranged together in a central surface area 48 . Starting from the surface area 48, the semiconductor switches are arranged further outwards in the substrate plane.

The inverter 40 can have a common substrate 41 for all commutation cells, or can consist of commutation cells, in particular each having the same design, as for example in FIGS 1 or 3 shown - and which each have a separate substrate, be composed.

In the substrate plane of the inverter 40, the intermediate circuit capacitors are each arranged in a surface area 48, which is elongated, in particular rectangular, in this exemplary embodiment. The semiconductor switch half-bridges of the inverter 40 are each arranged in surface areas 49 and 50, respectively, which enclose the surface area 48 for the intermediate circuit capacitors between one another. In this way, a space-saving, low-inductance arrangement can be formed, in which the electronic components of the commutating cells are arranged in a planar manner in a common plane. The commutation cells, in particular the semiconductor switches and/or the intermediate circuit capacitors, can advantageously be arranged on a common heat sink and thus form a low-inductance and space-saving planar arrangement.

QUOTES INCLUDED IN DESCRIPTION

This list of the documents cited by the applicant was generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Patent Literature Cited

• DE 10344633 A1 [0002]

Claims (11)

Commutation cell (1, 20, 42, 43, 44, 45, 46, 47) for an inverter (40), with a semiconductor switch half-bridge, comprising at least one high-side semiconductor switch (3, 23, 53) and at least one low -Side semiconductor switches (4, 24, 54) and at least one substrate (2, 21), the semiconductor switches (3, 4, 23, 24, 53, 54) being materially connected to the substrate 2, 21), in particular soldered or sintered, are characterized in that the commutation cell (1, 20, 42, 43, 44, 45, 46, 47) has an intermediate circuit capacitor (5, 25), the intermediate circuit capacitor (5, 25) being a polymer multi-layer - is a capacitor whose electrical connection (6, 7, 26, 27) is formed by a surface area of the intermediate circuit capacitor (5, 25), at least one connection (6, 7, 26) of the intermediate circuit capacitor (5, 25) being connected to the Substrate (2, 21) is solder-connected. commutation cell (1, 20, 42, 43, 44, 45, 46, 47). claim 1 , characterized in that the substrate (2, 21) is a ceramic substrate. commutation cell (1, 20, 42, 43, 44, 45, 46, 47). claim 1 or 2 , characterized in that the electrical connections (6, 7, 26) of the intermediate circuit capacitor (5, 25) are formed as parallel, flat, electrically conductive connection surfaces. commutation cell (1, 20, 42, 43, 44, 45, 46, 47). claim 3 , characterized in that the connections (6, 7) of the intermediate circuit capacitor (5, 25) are each soldered to the substrate (2, 21). commutation cell (1, 20, 42, 43, 44, 45, 46, 47). claim 3 or 4 , characterized in that the connection surfaces (6, 7) extend transversely to a flat extension of the substrate. Commutation cell (1, 20, 42, 43, 44, 45, 46, 47) according to any one of the preceding Claims 1 or 2 , characterized in that a connection (27) of the intermediate circuit capacitor (25) is electrically connected to the substrate (2, 21) by means of at least one bonding wire (31), in particular bonding tape. commutation cell (1, 20, 42, 43, 44, 45, 46, 47). claim 6 , characterized in that one connection (26) of the intermediate circuit capacitor (25) is soldered to the substrate (2, 21), and the other connection (27) to the semiconductor switch (24) or the substrate (2, 21) by means of at least one Bonding wire (31) is electrically connected. commutation cell (1, 20, 42, 43, 44, 45, 46, 47). claim 7 , characterized in that the connection (26) is soldered to the substrate (2, 21) over its entire surface. Commutation cell (1, 20, 42, 43, 44, 45, 46, 47) according to any one of the preceding Claims 6 until 8th , characterized in that the connection (27) bonded to the semiconductor switch (24) or the substrate (2, 21) is soldered to an electrically conductive metal element (29), and the at least one bonding wire (31) is soldered to the metal element (29) is bonded. Commutation cell (1, 20, 42, 43, 44, 45, 46, 47) according to any one of the preceding Claims 5 until 8th , characterized in that the at least one bonding wire (31) forms an electrical safety fuse which is designed to melt in the event of a short circuit in the intermediate circuit capacitor (25) when a predetermined current is exceeded and thus to electrically isolate the intermediate circuit capacitor (25) from the intermediate circuit. Inverter (40) with a commutation cell (1, 20, 42, 43, 44, 45, 46, 47) according to one of the preceding claims, the inverter having at least one commutation cell (1, 20, 42, 43, 44, 45, 46, 47).

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