DE102020202613A1 - METHOD OF MANUFACTURING A SEMICONDUCTOR COMPONENT, SEMICONDUCTOR COMPONENT AND OPTOELECTRONIC DEVICE - Google Patents

Abstract

A method for producing a semiconductor component (10) comprises the structured application (S110) of an organic adhesive layer (150) on a semiconductor chip (105) and the bringing (S120) of the semiconductor chip (105) into contact with a substrate (170), the organic adhesive layer (150) is arranged between semiconductor chip (105) and substrate (170).

Description

In the manufacture of complex semiconductor components, functional elements, for example light-emitting diodes (LEDs), can be transferred to a substrate. For example, the substrate can be a semiconductor substrate in which microelectronic circuits are arranged. When the semiconductor chips are transferred to the substrate, a soldering process usually takes place in order to connect the electrical contacts of the semiconductor chip to associated electrical contacts within the substrate.

The present invention is based on the object of providing an improved method for producing a semiconductor component. The present invention is also based on the object of providing an improved semiconductor component and an improved optoelectronic device.

According to the present invention, the object is achieved by the subject matter or the method of the independent patent claims. Advantageous further developments are the subject of the dependent claims.

A method for producing a semiconductor component comprises the structured application of an organic adhesive layer on a semiconductor chip and the bringing the semiconductor chip into contact with a substrate, the organic adhesive layer being arranged between the semiconductor chip and the substrate.

According to embodiments, the method further comprises the formation of electrical chip contacts on the semiconductor chip before application of the organic adhesive layer and the formation of electrical substrate contacts on the substrate. After the semiconductor chip has been brought into contact with the substrate, at least one chip contact is electrically connected to at least one substrate contact. The electrical substrate contacts can be formed at any point in time before the semiconductor chip is brought into contact with the substrate.

For example, the organic adhesive layer can be applied in a structured manner such that it is arranged between electrical chip contacts. The organic adhesive layer can be applied in a structured manner in such a way that it is arranged between electrical chip contacts of different polarity.

According to embodiments, the organic adhesive layer can also be applied in a structured manner such that it is arranged at the edge of the semiconductor chip and surrounds an active area of the semiconductor chip in a frame-like manner.

According to embodiments, a multiplicity of semiconductor chips are arranged on a carrier substrate. The plurality of semiconductor chips is connected to the substrate, the carrier substrate being detached after the connection.

According to embodiments, a semiconductor component comprises a substrate, a semiconductor chip arranged above the substrate, and a structured organic adhesive layer arranged between the semiconductor chip and the substrate.

The semiconductor chip can have chip contacts, the substrate can have substrate contacts and at least one of the chip contacts can be electrically connected to a substrate contact.

For example, the substrate can be a semiconductor substrate with circuit components arranged therein, and the substrate contacts are electrically connected to circuit components.

The organic adhesive layer can be structured in such a way that parts of the organic adhesive layer are arranged between chip contacts.

For example, the organic adhesive layer can be structured in such a way that parts of the organic adhesive layer are arranged between chip contacts of different polarity.

According to embodiments, the organic adhesive layer can be structured in such a way that parts of the organic adhesive layer are arranged at the edge of the semiconductor chip and surround an active area of the semiconductor chip in a frame-like manner.

An optoelectronic device according to embodiments comprises the semiconductor component described above, in which the semiconductor chip is an optoelectronic semiconductor chip and the circuit components arranged in the semiconductor substrate are suitable for controlling the optoelectronic semiconductor chip or for processing signals generated by the optoelectronic semiconductor chip.

For example, a multiplicity of semiconductor chips can be arranged on the semiconductor substrate. Circuit components which are each assigned to the semiconductor chips can be arranged in the semiconductor substrate.

The optoelectronic device can be selected from a lighting device, a display device or a sensor device.

• 1A bis 1C zeigen Querschnittsansichten eines Halbleiterchips bei Durchführung des Verfahrens.
• 1D und 1E zeigen Querschnittsansichten eines Werkstücks bei Durchführung des Verfahrens gemäß Ausführungsformen.
• 2 zeigt eine Querschnittsansicht eines Halbleiterchips bei Durchführung des Verfahrens gemäß Ausführungsformen.
• 3A bis 3D zeigen Beispiele von Ansichten einer Unterseite eines Halbleiterchips gemäß Ausführungsformen.
• 4 fasst ein Verfahren gemäß Ausführungsformen zusammen.
• 5 zeigt ein Beispiel einer Halbleitervorrichtung gemäß Ausführungsformen.

The accompanying drawings serve to understand exemplary embodiments of the invention. The drawings illustrate exemplary embodiments and, together with the description, serve to explain them. Further exemplary embodiments and numerous of the intended advantages result directly from the following detailed description. The elements and structures shown in the drawings are not necessarily shown true to scale with respect to one another. The same reference symbols refer to the same or corresponding elements and structures.

• 1A until 1C show cross-sectional views of a semiconductor chip when carrying out the method.
• 1D and 1E show cross-sectional views of a workpiece when carrying out the method according to embodiments.
• 2 FIG. 11 shows a cross-sectional view of a semiconductor chip when carrying out the method according to embodiments.
• 3A until 3D show examples of views of an underside of a semiconductor chip according to embodiments.
• 4th summarizes a method according to embodiments.
• 5 FIG. 10 shows an example of a semiconductor device according to embodiments.

In the following detailed description, reference is made to the accompanying drawings, which form a part of the disclosure, and in which specific exemplary embodiments are shown for purposes of illustration. In this context, directional terminology such as "top", "bottom", "front", "back", "over", "on", "in front of", "behind", "in front", "behind" etc. is applied to the Orientation related to the figures just described. Since the components of the exemplary embodiments can be positioned in different orientations, the directional terminology is only used for explanation and is in no way restrictive.

The description of the exemplary embodiments is not restrictive, since other exemplary embodiments also exist and structural or logical changes can be made without deviating from the scope defined by the patent claims. In particular, elements from exemplary embodiments described below can be combined with elements from other exemplary embodiments described, unless the context indicates otherwise.

The term “vertical”, as it is used in this description, is intended to describe an orientation which runs essentially perpendicular to the first surface of a substrate or semiconductor body. The vertical direction can correspond, for example, to a direction of growth when layers are grown on.

The terms “lateral” and “horizontal”, as used in this description, are intended to describe an orientation or alignment that runs essentially parallel to a first surface of a substrate or semiconductor body. This can be the surface of a wafer or a chip (die), for example.

The horizontal direction can, for example, lie in a plane perpendicular to a direction of growth when layers are grown on.

The terms “wafer” or “semiconductor substrate” used in the following description can include any semiconductor-based structure that has a semiconductor surface. Wafer and structure are to be understood to include doped and undoped semiconductors, epitaxial semiconductor layers, optionally supported by a base substrate, and further semiconductor structures. For example, a layer made of a first semiconductor material can be grown on a growth substrate made of a second semiconductor material, for example a GaAs substrate, a GaN substrate or a Si substrate or made of an insulating material, for example on a sapphire substrate.

Depending on the intended use, the semiconductor can be based on a direct or an indirect semiconductor material. Examples of semiconductor materials particularly suitable for generating electromagnetic radiation include, in particular, nitride semiconductor compounds through which, for example, ultraviolet, blue or longer-wave light can be generated, such as, for example, GaN, InGaN, AlN, AlGaN, AlGaInN, Al-GaInBN, phosphide semiconductor compounds through which For example, green or longer-wave light can be generated, such as GaAsP, AlGaInP, GaP, AlGaP, and other semiconductor materials such as GaAs, AlGaAs, InGaAs, AlInGaAs, SiC, ZnSe, ZnO, Ga ₂ O ₃ , diamond, hexagonal BN and combinations of the above Materials. The stoichiometric ratio of the compound semiconductor materials can vary. Other examples of semiconductor materials can include silicon, silicon germanium, and germanium. In the context of the present description, the term “semiconductor” also includes organic semiconductor materials.

The term “substrate” generally includes insulating, conductive or semiconductor substrates.

As far as the terms “have”, “contain”, “comprise”, “have” and the like are used, these are open-ended terms that indicate the presence of said elements or features, but the presence of further elements or features do not exclude. The indefinite articles and the definite articles include both the plural and the singular, unless the context clearly indicates otherwise.

In the context of this description, the term “electrically connected” means a low-resistance electrical connection between the connected elements. The electrically connected elements do not necessarily have to be directly connected to one another. Further elements can be arranged between electrically connected elements.

The term “electrically connected” also includes tunnel contacts between the connected elements.

A semiconductor component will be described below which is a composite semiconductor component or also a composite semiconductor component. This comprises a semiconductor chip arranged on a substrate. For example, the substrate can be a semiconductor substrate. In this case, the semiconductor material of the semiconductor substrate and the semiconductor chip can each be different or the same. For example, the semiconductor substrate can be a silicon substrate in which circuit components for controlling the semiconductor chip or for processing signals that are supplied from the semiconductor chip are arranged. The substrate can, for example, also be constructed from an insulating material. The composite semiconductor component can contain one or more semiconductor chips. According to further embodiments, the semiconductor component can contain a large number, for example more than 20 × 20 semiconductor chips.

Even if the following drawings show components of a semiconductor chip as an example, it goes without saying that a multiplicity of semiconductor chips can be arranged on the carrier substrate shown. These can, for example, be identical or different from one another.

1A shows a carrier substrate 100 with a plurality of semiconductor components arranged thereon. For example, the carrier substrate can be a sapphire substrate, for example a sapphire wafer. A semiconductor layer 110 can over a first major surface 101 of the carrier substrate 100 be arranged. The carrier substrate 100 can, for example, be a growth substrate for the growth of the semiconductor layer 110 be. Over the semiconductor layer 110 can for example be an LED structure 120 be upset. Details of an example of an LED structure 120 are below in 2 are explained in more detail.

The in 1A The semiconductor chip shown further comprises contact structures 130 for contacting functional layers, for example the LED structure 120 . Furthermore is solder material 139 structured in contact with the contact structures 130 arranged. The solder material 139 can, for example, over a resulting surface of the LED structure and the contact structure 130 be arranged. The solder material 139 can opposite a first main surface 121 the LED structure 120 protrude. Although the semiconductor chip shown here 105 is described as an example as an LED structure, it goes without saying that it can implement any other type of optical component, for example a sensor and others. According to further embodiments, the semiconductor chip 105 also be a semiconductor chip different from an optoelectronic semiconductor chip. For example, any functional units such as transistors, diodes or others can be in the semiconductor chip 105 be arranged. The structured solder material 139 represents the chip contacts 140 represents. For example, the solder material of the chip contacts 140 comprise an AuSn alloy.

Below is an organic adhesive layer 150 structured over the semiconductor chip 105 upset. The organic adhesive layer can comprise, for example, BCB (benzocyclobutene). However, another material, for example a resin, for example epoxy resin or a photoresist, can also be used. It is important that it is plastically deformable due to its elasticity. For example, it can have a Young's modulus of ≤ 2 GPa. The organic adhesive material can itself contain photoactive substances, so that it can be structured directly photolithographically. According to further embodiments, the organic adhesive can also be structured using an additional photoresist material. For example, the organic adhesive can be applied over the entire surface and removed from predetermined locations, so that the adhesive material is only present at other predetermined locations. The term “structured application” means that, as a result, the organic adhesive material is present in certain places and is removed from other places.

As in 1B is shown, the organic adhesive layer 150 be structured in such a way that they are between adjacent chip contacts 140 is arranged. By arranging the organic adhesive layer between adjacent chip contacts 140 can, as later will be illustrated, short circuits of the chip contacts in a subsequent soldering process 140 be avoided. The organic adhesive layer can, for example, have a layer thickness of a few 100 nm up to several μm. The thickness of the organic adhesive layer 150 can be greater than the layer thickness of the chip contacts 140 or the structured solder material 139 be. For example, a distance between the exposed surface of the organic adhesive layer and the first main surface can be 121 of the semiconductor chip 105 greater than a distance between the exposed surface of the chip contacts 140 to the first main interface 121 of the semiconductor chip 105 be.

1B shows a semiconductor chip 105 with a structured inorganic adhesive layer 150 . According to embodiments, for example, the carrier substrate 100 then be thinned. Furthermore, individual, on the carrier substrate 100 arranged and, for example, jointly processed semiconductor chips are separated from one another. For example, this can be done by adding the LED structure and the semiconductor layer 110 be severed locally. According to further embodiments, it is also possible for the carrier substrate 100 with the layers applied to them into individual chips 105 to saw up.

According to further embodiments, the steps and methods described below can also be carried out at the wafer level. For example, a large number of individual chips can be applied together on a substrate at the wafer level.

For example, as in 1C shown, now the carrier substrate 100 on its second major surface 102 be brought into contact with a bondhead 160.

The semiconductor chip can then be via the bondhead 160 105 , as in 1D is illustrated with a substrate 170 be brought into contact. For example, on or in the substrate 170 Circuit components 177 , for example transistors and other components. The components within the substrate 170 can for example via substrate contacts 175 to the outside or with corresponding contacts of the semiconductor chip 105 get connected. Correspondingly, for example, via the substrate contacts 175 a substrate braze material 179 be applied and structured. In addition, above the substrate 170 functional layers 173 as well as dielectric layers 174 be upset. The substrate 170 can for example comprise a silicon substrate or also another semiconductor material. The semiconductor material of the substrate 170 can, for example, from the material of the semiconductor layer 110 or the carrier substrate 100 to be different.

According to embodiments, the semiconductor chip 105 at elevated temperature with the substrate 170 be brought into contact. For example, the temperature can be higher than 100 ° C. In this way the semiconductor chip becomes 105 independent of a soldering process with the substrate 170 mechanically connected. For example, the semiconductor chip is positioned such that the chip contacts 140 with the structured substrate solder material 179 or the substrate connection elements 180 spatially overlap so that they can be connected to one another. According to embodiments, a single semiconductor chip 105 with the substrate 170 be brought into contact. According to further embodiments, a multiplicity of semiconductor chips can also be used 105 with the substrate 170 be brought into contact. For example, a variety of semiconductor chips 105 on a semiconductor wafer with the substrate 170 be brought into contact.

In a next step, as in 1E is shown, a soldering process is carried out at an elevated temperature, for example approximately more than 300 ° C, for example 320 ° C. This way the chip contacts 140 with the substrate connection elements 180 be electrically connected. Thereafter, for example, the bondhead 160 can be removed from the second main surface 102 of the carrier substrate 100 removed. As a result, for example, the in 1E Semiconductor component shown 10 can be obtained. The semiconductor component 10 comprises a substrate 170 and one above the substrate 170 arranged semiconductor chip, as well as a structured organic adhesive layer 150 that between semiconductor chip 105 and substrate 170 is arranged. The semiconductor chip 105 has chip contacts, for example 140 on, and the substrate 170 has substrate contacts 175 on. At least one of the chip contacts 140 is with one of the substrate contacts 175 electrically connected. As in 1E is shown, according to embodiments, the substrate 170 a semiconductor substrate with circuit components arranged therein 177 be, and the substrate contacts 175 are with circuit components 177 electrically connected.

As in the 1D and 1E is illustrated, when the semiconductor chip is brought into contact with the substrate, the semiconductor chip is initially used 105 via the organic adhesive layer 150 connected to the substrate. Then there is a connection or a bonding process of the chip contacts 140 with the substrate contacts 175 instead, so that an electrical connection is realized.

According to embodiments, the organic adhesive layer in the Semiconductor component remain. According to further embodiments, it can be removed from the semiconductor component after connecting and performing the soldering process, for example by etching with KOH.

2 shows further components of the semiconductor chip 105 . For example, the LED structure 120 a first semiconductor layer 122 of a first conductivity type, for example n-type, and a second semiconductor layer 124 of a second conductivity type, for example p-type. An active zone 123 may be between the first semiconductor layer 122 and the second semiconductor layer 124 be arranged.

The active zone 123 can for example have a pn junction, a double heterostructure, a single quantum well structure (SQW, single quantum well) or a multiple quantum well structure (MQW, multi quantum well) for generating radiation. The term “quantum well structure” has no meaning with regard to the dimensionality of the quantization. It thus includes, among other things, quantum wells, quantum wires and quantum dots as well as any combination of these layers.

A first chip contact 141 can have a first contact element 131 with the first semiconductor layer 122 be electrically connected. For example, the first contact element 131 via a dielectric insulation material 133 from the second semiconductor layer 124 be isolated. A second chip contact 142 can have a second contact element 132 with the second semiconductor layer 124 be connected. The second contact element 132 can have an insulation material 133 compared to the first semiconductor layer 122 be isolated. It goes without saying that the LED structure 120 can also have a different structure. As in 2 shown comprises a semiconductor chip 105 a first chip contact 141 and a second chip contact 142 . The structured organic adhesive layer 150 can reduce the gap between the first chip contact 141 and the second chip contact 142 fill, so that an accidental connection or a short circuit of the solder between the first and the second chip contact 141 , 142 is prevented.

the 3A until 3D show examples of a possible structuring of the organic adhesive layer 150 . As in 3A shown, for example, the structured organic adhesive layer 150 between first chip contacts 141 and second chip contacts 142 be arranged.

According to further embodiments, the first chip contact 141 also be formed flat, while the second chip contacts 142 are each trained locally. This is in the 3B and 3C realized. As in 3B shown, the structured organic adhesive layer 150 between the isolated second chip contacts 142 and the planar first chip contact 141 be arranged.

According to embodiments described in 3C are shown, the structured organic adhesive layer 150 at the edge of the semiconductor chip 105 be arranged and surround active areas of the semiconductor chip like a frame. In addition, the structured organic adhesive layer 150 also here between the first chip contacts 141 and the second chip contacts 142 be arranged. Due to the adhesive layer formed on the edge of the semiconductor chip, the semiconductor chip can be encapsulated when the semiconductor chip is joined to the substrate. According to embodiments described in 3D are the first and second chip contacts 141 , 142 designed as isolated contacts. Here, too, the structured organic adhesive layer can be on the edge of the semiconductor chip 105 be arranged and surround active areas of the semiconductor chip like a frame.

As in the 3A until 3D has been illustrated, the chip contacts can be designed flexibly. As an additional function of the organic adhesive layer, the chip contacts and substrate contacts can be isolated. According to further embodiments, encapsulation of the semiconductor component can be achieved.

4th summarizes a method according to embodiments. A method for producing a semiconductor component comprises the structured application (S110) of an organic adhesive layer on a semiconductor chip and the bringing (S120) the semiconductor chip into contact with a substrate, the organic adhesive layer being arranged between the semiconductor chip and the substrate. According to embodiments, the method can further comprise the formation (S100) of electrical chip contacts on the semiconductor chip prior to application of the organic adhesive layer and the formation of electrical substrate contacts on the substrate. After the semiconductor chip (S120) has been brought into contact with the substrate, at least one chip contact is electrically connected to at least one substrate contact. The electrical substrate contacts can be formed on the substrate at any point in time before the semiconductor chip is brought into contact with the substrate.

5 shows an optoelectronic device 1 comprising the semiconductor device described above. For example, a large number of optoelectronic semiconductor chips can be used here 105 over a carrier substrate 170 be arranged and connected in the manner previously described. The substrate can be a semiconductor substrate. The circuit components arranged in the semiconductor substrate 177 can be suitable for controlling the optoelectronic semiconductor chip (s). When arranging a large number of optoelectronic semiconductor chips 105 can any semiconductor chip 105 be assigned its own circuit. For example, circuit components of the individual circuits can each be suitable, the associated optoelectronic semiconductor chip 105 to control or from the associated optoelectronic semiconductor chip 105 process received signals. For example, the optoelectronic device 1 a lighting device, for example a vehicle headlight with a large number of individually controllable light elements which are each implemented by the semiconductor chips. According to further refinements, the optoelectronic device can 1 a display device for displaying video signals, for example a video display device, a video screen or a large-area sensor device. For example, the optoelectronic device 1 be a video display device for augmented / mixed reality applications with very small monolithic components.

As has been described, using the described organic adhesive material that is patterned under the semiconductor chip 105 is applied, the functions of mechanical and electrical connection are separated from each other. The presence of the structured organic adhesive layer means that the mechanical connection can be carried out independently of the electrical connection that takes place after the mechanical connection. Due to the separation of the two functions, it is possible to use the individual semiconductor chips 105 to place very precisely even with increasing miniaturization and shrinking of the contacts. Even as the size of the contacts increases, the semiconductor chips 105 over large connection areas with the substrate 170 get connected. As a result, the heat dissipation is improved. The organic adhesive material described can be structured with very fine structure sizes and is temperature-stable up to about 330 ° C. Therefore, it can permanently remain in the component.

Although specific embodiments have been illustrated and described herein, those skilled in the art will recognize that the specific embodiments shown and described can be replaced by a variety of alternative and / or equivalent configurations without departing from the scope of the invention. The application is intended to cover any adaptations or variations of the specific embodiments discussed herein. Therefore, the invention is to be limited only by the claims and their equivalents.

List of reference symbols

1

Semiconductor optoelectronic device

10

Semiconductor component

100

Carrier substrate

101

first main interface

102

second main surface

105

Semiconductor chip

110

Semiconductor layer

120

LED structure

121

first main surface of the LED structure

122

first semiconductor layer

123

active zone

124

second semiconductor layer

130

Contact structure

131

first contact element

132

second contact contact

133

Insulation material

139

Solder material

140

Chip contact

141

first chip contact

142

second chip contact

150

structured organic adhesive layer

170

Substrate

173

functional layer

174

dielectric layer

175

Substrate contact

177

Circuit component

179

Substrate solder material

180

Substrate connection element

Claims (15)

A method for manufacturing a semiconductor device (10) comprising: structured application (S110) of an organic adhesive layer (150) on a semiconductor chip (105); and Bringing (S120) the semiconductor chip (105) into contact with a substrate (170), the organic adhesive layer (150) being arranged between the semiconductor chip (105) and the substrate (170). Procedure according to Claim 1 , further comprising: Formation (S100) of electrical chip contacts (140) on the semiconductor chip (105) before application of the organic adhesive layer (150), and formation of electrical substrate contacts (175) on the substrate (170), wherein after the semiconductor chip has been brought into contact (105) at least one chip contact (140) with at least one substrate contact (175) is electrically connected to the substrate (170). Procedure according to Claim 2 , in which the organic adhesive layer (150) is applied in a structured manner such that it is arranged between electrical chip contacts (140). Procedure according to Claim 3 , in which the organic adhesive layer (150) is applied in a structured manner such that it is arranged between electrical chip contacts (140) of different polarity. Method according to one of the preceding claims, in which the organic adhesive layer (150) is applied in a structured manner such that it is arranged at the edge of the semiconductor chip (105) and surrounds an active area of the semiconductor chip (105) in a frame-like manner. Method according to one of the preceding claims, in which a plurality of semiconductor chips (105) are arranged on a carrier substrate (100) and are connected to the substrate (170), the carrier substrate (100) being detached after the connection. Semiconductor component (10), with a Substrate (170); a semiconductor chip (105) arranged above the substrate (170), and a structured organic adhesive layer (150) which is arranged between the semiconductor chip (105) and the substrate (170). Semiconductor component (10) according to Claim 7 wherein the semiconductor chip (105) has chip contacts (140) and the substrate (170) has substrate contacts (175) and at least one of the chip contacts (140) is electrically connected to one of the substrate contacts (175). Semiconductor component (10) according to Claim 8 wherein the substrate (170) is a semiconductor substrate with circuit components (177) arranged therein and the substrate contacts (175) are electrically connected to circuit components (177). Semiconductor component (10) according to Claim 8 or 9 , in which the organic adhesive layer (150) is structured in such a way that parts of the organic adhesive layer (150) are arranged between chip contacts (140). Semiconductor component (10) according to Claim 10 , in which the organic adhesive layer (150) is structured in such a way that parts of the organic adhesive layer (150) are arranged between chip contacts (140) of different polarity. Semiconductor component (10) according to one of the Claims 7 until 11 , in which the organic adhesive layer (150) is structured in such a way that parts of the organic adhesive layer (150) are arranged at the edge of the semiconductor chip (105) and surround an active area of the semiconductor chip (105) like a frame. Optoelectronic device (1) comprising the semiconductor component (10) according to one of the Claims 9 until 12th , in which the semiconductor chip (105) is an optoelectronic semiconductor chip and the circuit components (177) arranged in the semiconductor substrate (170) are suitable for controlling the optoelectronic semiconductor chip (105) or for processing signals generated by the optoelectronic semiconductor chip (105). Optoelectronic device (1) according to Claim 13 wherein a plurality of semiconductor chips (105) are arranged on the semiconductor substrate (170) and circuit components (177) are arranged in the semiconductor substrate (170), which are respectively assigned to the semiconductor chips (105). Optoelectronic device (1) according to Claim 13 or 14th which is selected from a lighting device, a display device or a sensor device.

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