DE102019115142B3 - 3-level converter half bridge - Google Patents

Abstract

The invention relates to a 3-level converter half bridge with a plurality of power semiconductor modules which are electrically connected to one another and each have a housing and electrical connections arranged outside the respective housing, with a first, a second, a third and a fourth power semiconductor switch, each of which has a first and a first have second load connection, and with a plurality of diodes, the power semiconductor switches and the diodes being arranged such that they are distributed over the power semiconductor modules in such a way that the 3-level converter half bridge is designed to be low-inductance.

Description

The invention relates to a 3-level converter half bridge.

A 3-level converter half bridge 5, whose well-known electrical circuit topology in 1 is characterized by the fact that its power semiconductor switches are switched on and off accordingly T1 , T2 , T3 and T4 your AC voltage connection AC electrically conductive with their first or second DC voltage connection DC + and DC or can be electrically connected with its neutral connection N.

In order to keep electrical voltage peaks occurring at the power semiconductor switches as low as possible when switching the power semiconductor switches, there is a technical need to design a 3-level converter half bridge as low-inductance as possible.

From the DE 20 2015 105 568 U1 it is known to form a 3-level converter half-bridge by electrically interconnecting a plurality of power semiconductor modules, each of which contains part of the components required to form the 3-level converter half-bridge.

It is an object of the invention to provide a low-inductance design for a 3-level converter half bridge, which has a plurality of power semiconductor modules which are electrically connected to one another and which each contain a part of the components required to form the 3 level converter half bridge.

This object is achieved by a 3-level converter half bridge with a first, a second, a third and a fourth power semiconductor module, each of which has a housing and electrical connections arranged outside the respective housing, with a first, a second, a third and a fourth power semiconductor switches, each having a first and a second load connection, with a first, a second, a third, a fourth, a fifth, a sixth, a seventh and an eighth diode,
wherein the first power semiconductor switch and the fifth diode are arranged in the housing of the first power semiconductor module and a first connection of the first power semiconductor module is electrically conductively connected to the first load connection of the first power semiconductor switch and a second connection of the first power semiconductor module is electrically conductively connected to the anode of the fifth diode and the cathode of the fifth diode with the second load connection of the first power semiconductor switch and with a third connection of the first Power semiconductor module is electrically connected,
wherein the second power semiconductor switch, the third and fourth diode and the seventh diode are arranged in the housing of the second power semiconductor module and a first connection of the second power semiconductor module is electrically conductively connected to the anode of the fourth diode and the cathode of the fourth diode to the anode of the third diode is electrically conductively connected and the cathode of the third diode is electrically conductively connected to the second load connection of the second power semiconductor switch and to a third connection of the second power semiconductor module and a second connection of the second power semiconductor module is electrically conductively connected to the anode of the seventh diode and the cathode is seventh diode is electrically conductively connected to a fourth connection of the second power semiconductor module and to the first load connection of the second power semiconductor switch,
wherein the third power semiconductor switch, the first and second diodes and the eighth diode are arranged in the housing of the third power semiconductor module and a first connection of the third power semiconductor module is electrically conductively connected to the cathode of the first diode and the anode of the first diode to the cathode of the second diode is electrically conductively connected and the anode of the second diode is electrically conductively connected to the first load connection of the third power semiconductor switch and to a third connection of the third power semiconductor module and a second connection of the third power semiconductor module is electrically conductively connected to the cathode of the eighth diode and the anode is eighth diode with a fourth connection of the third power semiconductor module and with the second load connection of the third power semiconductor switch is electrically conductively connected, the fourth power semiconductor switch and the sixth diode in the housing se of the fourth power semiconductor module and a first terminal of the fourth power semiconductor module is electrically conductively connected to the second load terminal of the fourth power semiconductor switch and a second terminal of the fourth power semiconductor module is electrically conductively connected to the cathode of the sixth diode and the anode of the sixth diode to the first Load connection of the fourth power semiconductor switch and electrically conductively connected to a third connection of the fourth power semiconductor module,
wherein the second connection of the first power semiconductor module is electrically conductively connected to the second connection of the fourth power semiconductor module, to the second connection of the second power semiconductor module and to the second connection of the third power semiconductor module, the first connection of the first power semiconductor module being electrically connected to the first connection of the third power semiconductor module is conductively connected, the third connection of the second power semiconductor module being electrically conductively connected to the third connection of the third power semiconductor module, the third connection of the fourth power semiconductor module being electrically conductively connected to the fourth connection of the third power semiconductor module, the third connection of the first power semiconductor module being connected the fourth connection of the second power semiconductor module is electrically conductively connected, the first connection of the fourth power semiconductor Module is electrically conductively connected to the first connection of the second power semiconductor module.

It proves to be advantageous if a fifth connection of the third power semiconductor module, which is electrically conductively connected to the anode of the first diode, is electrically conductively connected to the fourth connection of the second power semiconductor module, and a fifth connection of the second power semiconductor module, which is electrically conductively connected to the anode of the third diode the fourth connection of the third power semiconductor module is electrically conductively connected. This reduces any electrical potential shifts that may occur during operation of the 3-level converter half bridge.

Furthermore, it proves to be advantageous if the power semiconductor modules have an identical geometrical external shape, the respective first and second connection of the power semiconductor modules being designed as a load current connection and being arranged on a first end region of the respective power semiconductor module, the respective third connection of the power semiconductor modules being a load current connection is formed and is arranged on a second end region of the respective power semiconductor module arranged opposite the first end region of the respective power semiconductor module, the first and second connections of the power semiconductor modules being arranged on a common first side of the 3-level converter half bridge. As a result, a 3-level converter half bridge realized by means of four power semiconductor modules which are electrically connected to one another is constructed to be particularly low-inductance.

Furthermore, this object is achieved by a 3-level converter half bridge with a first, a second and a third power semiconductor module, each of which has a housing and electrical connections arranged outside the respective housing, with a first, a second, a third and a fourth power semiconductor switch , each having a first and a second load connection, with a first, a second, a third, a fourth, a fifth, a sixth, a seventh and an eighth diode,
wherein the first and fourth power semiconductor switches and the fifth diode and the sixth diode are arranged in the housing of the first power semiconductor module and a first connection of the first power semiconductor module is electrically conductively connected to the first load connection of the first power semiconductor switch and a third connection of the first power semiconductor module to the anode fifth diode and the cathode of the sixth diode is electrically conductively connected and the cathode of the fifth diode is electrically conductively connected to the second load connection of the first power semiconductor switch and to a fourth connection of the first power semiconductor module, a second connection of the first power semiconductor module being connected to the second load connection of the fourth power semiconductor switch is electrically connected and a fifth connection of the first power semiconductor module with the anode of the sixth diode and with the first load connection of the vi first power semiconductor switch is electrically connected,
wherein the second power semiconductor switch, the third and fourth diode and the seventh diode are arranged in the housing of the second power semiconductor module and a first connection of the second power semiconductor module is electrically conductively connected to the anode of the fourth diode and the cathode of the fourth diode to the anode of the third diode is electrically conductively connected and the cathode of the third diode is electrically conductively connected to the second load connection of the second power semiconductor switch and to a third connection of the second power semiconductor module and a second connection of the second power semiconductor module is electrically conductively connected to the anode of the seventh diode and the cathode is seventh diode is electrically conductively connected to a fourth connection of the second power semiconductor module and to the first load connection of the second power semiconductor switch,
wherein the third power semiconductor switch, the first and second diodes and the eighth diode are arranged in the housing of the third power semiconductor module and a first connection of the third power semiconductor module is electrically conductively connected to the cathode of the first diode and the anode of the first diode to the cathode of the second diode is electrically conductively connected and the anode of the second diode is electrically conductively connected to the first load connection of the third power semiconductor switch and to a third connection of the third power semiconductor module and a second connection of the third power semiconductor module ( 3b ) is electrically conductively connected to the cathode of the eighth diode and the anode of the eighth diode to a fourth connection of the third power semiconductor module and to the second load connection of the third power semiconductor switch is electrically connected,
wherein the second connection of the first power semiconductor module is electrically conductively connected to the first connection of the second power semiconductor module, the first connection of the first power semiconductor module being electrically conductively connected to the first connection of the third power semiconductor module, the third connection of the second power semiconductor module being connected to the third connection of the third power semiconductor module is electrically conductively connected, wherein the third connection of the first power semiconductor module is electrically conductively connected to the second connection of the third power semiconductor module and to the second connection of the second power semiconductor module, the fifth connection of the first power semiconductor module being electrically conductive to the fourth connection of the third power semiconductor module is connected, the fourth connection of the first power semiconductor module being connected to the fourth connection of the second power semiconductor module uls is electrically connected.

It proves to be advantageous if a fifth connection of the third power semiconductor module, which is electrically conductively connected to the anode of the first diode, is electrically conductively connected to the fourth connection of the second power semiconductor module, and a fifth connection of the second power semiconductor module, which is electrically conductively connected to the anode of the third diode the fourth connection of the third power semiconductor module is electrically conductively connected. This reduces any electrical potential shifts that may occur during operation of the 3-level converter half bridge.

Furthermore, it proves to be advantageous if the power semiconductor modules have an identical geometrical external shape, the respective first and second connection of the second and third power semiconductor module being designed as a load current connection and being arranged on a first end region of the respective second and third power semiconductor module, the respective third and fourth connection of the second and third power semiconductor module is designed as a load current connection and is arranged on a second end area of the respective second and third power semiconductor module arranged opposite the first end area of the respective second and third power semiconductor module, the first, second and third connection of the first power semiconductor module as Load current connections are formed and are arranged on a second end region of the first power semiconductor module, the fourth and fifth connections of the first power Semiconductor module are designed as load current connections and are arranged on a first end region of the first power semiconductor module arranged opposite the second end region of the first power semiconductor module, the first power semiconductor module being arranged rotated by 180 ° with respect to the second and third power semiconductor modules, so that the first and second connections of the second and the third power semiconductor module and the third connection of the first power semiconductor module are arranged on a common first side of the 3-level converter half bridge. As a result, a 3-level converter half-bridge realized by means of three power semiconductor modules that are electrically interconnected is constructed to be particularly low-inductance.

It also proves to be advantageous if the second and third power semiconductor modules have an identical geometrical external shape and the first power semiconductor module has a geometrical external shape that differs from the second and third power semiconductor modules, the respective first and second connections of the second and third power semiconductor modules as load current connections is formed and is arranged on a first end area of the respective second and third power semiconductor module, the respective third and fourth connection of the second and third power semiconductor module being designed as a load current connection and on a second end area of the respective one arranged opposite the first end area of the respective second and third power semiconductor module second and third power semiconductor module is arranged, wherein the first, second and third connection of the first power semiconductor module from load current connections are formed and arranged on a first end region of the first power semiconductor module, the fourth and fifth connection of the first power semiconductor module being designed as load current connections and on a second end region of the first power semiconductor module arranged opposite the first end region of the first power semiconductor module, the first and second Connections of the second and third power semiconductor module and the first, second and third connection of the first power semiconductor module are arranged on a common first side of the 3-level converter half bridge. As a result, a 3-level converter half-bridge realized by means of three power semiconductor modules that are electrically interconnected is constructed to be particularly low-inductance.

Furthermore, this object is achieved by a 3-level converter half bridge with a first, a second, a third and a fourth power semiconductor module, each of which is a housing and outside the respective housing have arranged electrical connections, with a first, a second, a third and a fourth power semiconductor switch, each having a first and a second load connection, with a first, a second, a third, a fourth, a fifth and a sixth diode,
wherein the first power semiconductor switch and the fifth diode are arranged in the housing of the first power semiconductor module and a first connection of the first power semiconductor module is electrically conductively connected to the first load connection of the first power semiconductor switch and a second connection of the first power semiconductor module is electrically conductively connected to the anode of the fifth diode and the cathode of the fifth diode is electrically conductively connected to the second load connection of the first power semiconductor switch and to a third connection of the first power semiconductor module,
wherein the second power semiconductor switch and the third and fourth diodes are arranged in the housing of the second power semiconductor module and a first connection of the second power semiconductor module is electrically conductively connected to the anode of the fourth diode and the cathode of the fourth diode is electrically conductively connected to the anode of the third diode and the cathode of the third diode is electrically conductively connected to the second load connection of the second power semiconductor switch and to a second connection of the second power semiconductor module, and a third connection of the second power semiconductor module is electrically conductively connected to the first load connection of the second power semiconductor switch, the third power semiconductor switch and first and second diodes are arranged in the housing of the third power semiconductor module and a first connection of the third power semiconductor module with the cathode of the first diode is electrically conductive is connected and the anode of the first diode is electrically conductively connected to the cathode of the second diode and the anode of the second diode is electrically conductively connected to the first load connection of the third power semiconductor switch and to a second connection of the third power semiconductor module, and a third connection of the third power semiconductor module is electrically conductively connected to the second load connection of the third power semiconductor switch, the fourth power semiconductor switch and the sixth diode being arranged in the housing of the fourth power semiconductor module and a first connection of the fourth power semiconductor module being electrically conductively connected to the second load connection of the fourth power semiconductor switch and a second connection of the fourth power semiconductor module is electrically conductively connected to the cathode of the sixth diode and the anode of the sixth diode to the first load connection of the fourth power Albleiterschalters and electrically connected to a third terminal of the fourth power semiconductor module,
wherein the second connection of the first power semiconductor module is electrically conductively connected to the second connection of the fourth power semiconductor module, the first connection of the first power semiconductor module being electrically conductively connected to the first connection of the third power semiconductor module, the second connection of the second power semiconductor module being connected to the second connection of the third power semiconductor module is electrically conductively connected, the third terminal of the fourth power semiconductor module being electrically conductively connected to the third terminal of the third power semiconductor module, the third terminal of the first power semiconductor module being electrically conductively connected to the third terminal of the second power semiconductor module, the first terminal of the fourth power semiconductor module is electrically conductively connected to the first connection of the second power semiconductor module.

Furthermore, it proves to be advantageous if a fourth connection of the third power semiconductor module that is electrically conductively connected to the anode of the first diode is electrically conductively connected to the third connection of the second power semiconductor module and a fourth connection of the second power semiconductor module that is electrically conductively connected to the anode of the third diode is electrically conductively connected to the third connection of the third power semiconductor module. This reduces any electrical potential shifts that may occur during operation of the 3-level converter half bridge.

It also proves to be advantageous if the power semiconductor modules have an identical geometrical external shape, the respective first, second and third connection of the power semiconductor modules being designed as a load current connection, the first, second and third connection of the respective power semiconductor module being in a row on the top of the respective power semiconductor module are arranged. As a result, a 3-level converter half bridge realized by means of four power semiconductor modules which are electrically connected to one another is constructed to be particularly low-inductance.

It also proves to be advantageous if the power semiconductor modules have an identical geometrical external shape, the first and second connection of the first power semiconductor module, the first connection of the second power semiconductor module, the first connection of the third power semiconductor module and the first and second connection of the fourth power semiconductor module as Load current connections are formed and at a first end region of the Power semiconductor modules are arranged and are arranged on a common first side of the 3-level converter half bridge, the respective second connection of the second and third power semiconductor modules being designed as a load current connection and on a second end area of the second and third arranged opposite the first end area of the second and third power semiconductor module third power semiconductor module is arranged. As a result, a 3-level converter half bridge realized by means of four power semiconductor modules which are electrically connected to one another is constructed to be particularly low-inductance.

Furthermore, this object is achieved by a 3-level converter half bridge with a first, a second and a third power semiconductor module, each of which has a housing and electrical connections arranged outside the respective housing, with a first, a second, a third and a fourth power semiconductor switch , each having a first and a second load connection, with a first, a second, a third, a fourth, a fifth and a sixth diode,
wherein the first and fourth power semiconductor switches, the fifth diode and the sixth diode are arranged in the housing of the first power semiconductor module and a first connection of the first power semiconductor module is electrically conductively connected to the first load connection of the first power semiconductor switch and a third connection of the first power semiconductor module to the anode of the fifth diode and the cathode of the sixth diode is electrically conductively connected and the cathode of the fifth diode is electrically conductively connected to the second load connection of the first power semiconductor switch and to a fourth connection of the first power semiconductor module, a second connection of the first power semiconductor module being connected to the second load connection of the fourth power semiconductor switch is electrically connected and a fifth connection of the first power semiconductor module to the anode of the sixth diode and to the first load connection of the fourth en power semiconductor switch is electrically connected,
wherein the second power semiconductor switch, the third and fourth diodes are arranged in the housing of the second power semiconductor module and a first connection of the second power semiconductor module is electrically conductively connected to the anode of the fourth diode and the cathode of the fourth diode is electrically conductively connected to the anode of the third diode and the cathode of the third diode is electrically conductively connected to the second load connection of the second power semiconductor switch and to a second connection of the second power semiconductor module and a third connection of the second power semiconductor module is electrically conductively connected to the first load connection of the second power semiconductor switch,
wherein the third power semiconductor switch and the first and second diodes are arranged in the housing of the third power semiconductor module and a first connection of the third power semiconductor module is electrically conductively connected to the cathode of the first diode and the anode of the first diode is electrically conductively connected to the cathode of the second diode and the anode of the second diode is electrically conductively connected to the first load terminal of the third power semiconductor switch and to a second terminal of the third power semiconductor module, and a third terminal of the third power semiconductor module is electrically conductively connected to the second load terminal of the third power semiconductor switch, the second terminal of the first Power semiconductor module is electrically conductively connected to the first connection of the second power semiconductor module, the first connection of the first power semiconductor module being connected to the first connection of the third en power semiconductor module is electrically conductively connected, the second connection of the second power semiconductor module being electrically conductively connected to the second connection of the third power semiconductor module, the fifth connection of the first power semiconductor module being electrically conductively connected to the third connection of the third power semiconductor module, the fourth connection of the first power semiconductor module is electrically conductively connected to the third connection of the second power semiconductor module.

It proves to be advantageous if a fourth connection of the third power semiconductor module, which is electrically conductively connected to the anode of the first diode, is electrically conductively connected to the third connection of the second power semiconductor module, and a fourth connection of the second power semiconductor module, which is electrically conductively connected to the anode of the third diode the third connection of the third power semiconductor module is electrically conductively connected. This reduces any electrical potential shifts that may occur during operation of the 3-level converter half bridge.

Furthermore, it proves to be advantageous if the power semiconductor modules have an identical geometrical external shape, the respective first connection of the second and third power semiconductor modules being designed as a load current connection and being arranged on a first end region of the respective second and third power semiconductor modules, the respective second connection of the second and third power semiconductor modules is designed as a load current connection and on one of the first end regions of the respective second and third power semiconductor modules the second and third power semiconductor modules are arranged opposite one another, the first, second and third connection of the first power semiconductor module being designed as load current connections and being arranged on a second end area of the first power semiconductor module, the fourth and fifth connection of the first power semiconductor module being load current connections are formed and are arranged on a first end region of the first power semiconductor module arranged opposite the second end region of the first power semiconductor module, the first power semiconductor module being arranged rotated by 180 ° with respect to the second and third power semiconductor modules, so that the respective first connection of the second and third power semiconductor modules and the third connection of the first power semiconductor module is arranged on a common first side of the 3-level converter half bridge. As a result, a 3-level converter half-bridge realized by means of three power semiconductor modules which are electrically connected to one another has a particularly low-inductance design.

It also proves to be advantageous if the second and third power semiconductor modules have an identical geometrical external shape and the first power semiconductor module has a geometrical external shape that differs from the second and third power semiconductor modules, the respective first connection of the second and third power semiconductor modules being designed as a load current connection and is arranged on a first end area of the respective second and third power semiconductor module, the respective second connection of the second and third power semiconductor module being designed as a load current connection and on a second end area of the respective second and third power semiconductor module arranged opposite the first end area of the respective second and third power semiconductor module is arranged, the first, second and third connection of the first power semiconductor module being designed as load current connections and to ei are arranged in a first end area of the first power semiconductor module, the fourth and fifth connection of the first power semiconductor module being designed as load current connections and being arranged on a second end area of the first power semiconductor module arranged opposite the first end area of the first power semiconductor module, the respective first connection of the second and third Power semiconductor module and the third connection of the first power semiconductor module are arranged on a common first side of the 3-level converter half bridge. As a result, a 3-level converter half-bridge realized by means of three power semiconductor modules which are electrically connected to one another has a particularly low-inductance design.

• 1 eine allgemein bekannte elektrische Schaltungstopologie einer 3-Level-Stromrichterhalbbrücke,
• 2 eine Ausbildung einer erfindungsgemäßen 3-Level-Stromrichterhalbbrücke in Form eines elektrischen Schaltbilds,
• 3 eine Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 2 mit elektrisch verschalteten Leistungshalbleitermodulen,
• 4 eine weitere Ausbildung einer erfindungsgemäßen 3-Level-Stromrichterhalbbrücke in Form eines elektrischen Schaltbilds,
• 5 eine Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 4 mit elektrisch verschalteten Leistungshalbleitermodulen,
• 6 eine weitere Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 4 mit elektrisch verschalteten Leistungshalbleitermodulen,
• 7 eine weitere Ausbildung einer erfindungsgemäßen 3-Level-Stromrichterhalbbrücke in Form eines elektrischen Schaltbilds,
• 8 eine Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 7 mit elektrisch verschalteten Leistungshalbleitermodulen,
• 9 eine weitere Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 7 mit elektrisch verschalteten Leistungshalbleitermodulen,
• 10 eine weitere Ausbildung einer erfindungsgemäßen 3-Level-Stromrichterhalbbrücke in Form eines elektrischen Schaltbilds,
• 11 eine Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 10 mit elektrisch verschalteten Leistungshalbleitermodulen und
• 12 eine weitere Ausbildung der 3-Level-Stromrichterhalbbrücke gemäß 10 mit elektrisch verschalteten Leistungshalbleitermodulen.

Exemplary embodiments of the invention are explained below with reference to the figures below. Show:

• 1 a generally known electrical circuit topology of a 3-level converter half bridge,
• 2nd an embodiment of a 3-level converter half bridge according to the invention in the form of an electrical circuit diagram,
• 3rd a training of the 3-level converter half bridge according to 2nd with electrically connected power semiconductor modules,
• 4th a further embodiment of a 3-level converter half-bridge according to the invention in the form of an electrical circuit diagram,
• 5 a training of the 3-level converter half bridge according to 4th with electrically connected power semiconductor modules,
• 6 a further training of the 3-level converter half bridge according to 4th with electrically connected power semiconductor modules,
• 7 a further embodiment of a 3-level converter half-bridge according to the invention in the form of an electrical circuit diagram,
• 8th a training of the 3-level converter half bridge according to 7 with electrically connected power semiconductor modules,
• 9 a further training of the 3-level converter half bridge according to 7 with electrically connected power semiconductor modules,
• 10th a further embodiment of a 3-level converter half-bridge according to the invention in the form of an electrical circuit diagram,
• 11 a training of the 3-level converter half bridge according to 10th with electrically connected power semiconductor modules and
• 12th a further training of the 3-level converter half bridge according to 10th with electrically connected power semiconductor modules.

In the 2nd , 4th , 7 and 10th is an embodiment of a 3-level converter half-bridge according to the invention 5a shown in the form of an electrical circuit diagram. Electrically conductive external connections between power semiconductor modules, which can be realized, for example, in the form of busbars or cables, are with thick solid or dotted lines shown. Electrically conductive internal connections of the power semiconductor modules, ie electrically conductive connections between components of the respective power semiconductor module are shown with thin lines. In the 3rd , 5 , 6 , 8th , 9 , 11 and 12th , are arranged in the respective housing of the respective power semiconductor module, covered by the respective housing and thus actually in the 3rd , 5 , 6 , 8th , 9 , 11 and 12th Not visible power semiconductor switch of the respective power semiconductor module, shown in dashed lines.

In 1 A generally known circuit topology of a 3-level converter half bridge 5 is shown.

The 3-level converter half bridge 5 has a first, a second, a third and a fourth power semiconductor switch T1 , T2 , T3 and T4 , a first diode D1 , a second diode D2 , a third diode D3 , a fourth diode D4 , a fifth diode D5 and a sixth diode D6 , a first and second DC voltage connection DC + and DC , a neutral connection N and an AC voltage connection AC on. The first DC voltage connection DC + is preferably as a positive potential connection and the second DC voltage connection DC designed as a negative potential connection. The respective power semiconductor switch T1 , T2 , T3 or. T4 has a first and a second load current connection C. and E and a control port G on. The electrical functioning of the 3-level converter half bridge 5 is generally known prior art. By switching the power semiconductor switches on and off accordingly T1 , T2 , T3 and T4 can the AC voltage connection AC electrically conductive with the first or second DC voltage connection DC + or DC or be connected to the neutral connection N in an electrically conductive manner. This results in the switching of the power semiconductor switches T1 , T2 , T3 and T4 four commutation current paths, ie between the connections 3-level converter half bridge 5 running current paths in which when switching the power semiconductor switch T1 , T2 , T3 and T4 the amperage changes. A first commutation current path 10th runs between the first DC voltage connection DC + and the neutral connection N via the first power semiconductor switch T1 and through the fifth diode D5 . A second commutation current path 11 runs between the neutral connection N and the second DC voltage connection DC via the fifth diode D5 , via the second power semiconductor switch T2 , about the third D3 and through the fourth diode D4 . A third commutation current path 12th runs between the neutral connection N and the first DC voltage connection DC + via the sixth diode D6 , via the third power semiconductor switch T3 , via the second diode D2 and over the first diode D1 . A fourth commutation current path 13 runs between the second DC voltage connection DC and the neutral connection N via the fourth power semiconductor switch T4 and via the sixth diode D6 .

In 2nd is an embodiment of a 3-level converter half-bridge according to the invention 5a shown in the form of an electrical circuit diagram.

Since electrically conductive internal connections, that is, electrically conductive connections between components of the respective power semiconductor module, have a significantly lower inductance than electrically conductive external connections, that is, electrically conductive connections between power semiconductor modules, which can be implemented, for example, in the form of busbars or cables, takes place in the invention , to implement a low-inductance 3-level converter half-bridge, the division of the power semiconductor switches and diodes of the 3-level converter half-bridge according to the invention 5a according to the commutation current paths 10th , 11 , 12th , and 13 from 1 , ie the respective power semiconductor switches or respective diodes that lead to a respective commutation current path 10th , 11 , 12th , or. 13 belong in a respective power semiconductor module 1a , 2a , 3a or. 4a arranged. For the four commutation current paths 10th , 11 , 12th , and 13 this results in four power semiconductor modules 1a , 2a , 3a or. 4a by means of which the 3-level converter half-bridge according to the invention 5a is realized. When switching the power semiconductor switches on and off T1 , T2 , T3 and T4 Current commutations that occur therefore only take place within a respective power semiconductor module 1a , 2a , 3a or. 4a instead of. Because the fifth diode D5 in 1 in the first and in the second commutation current path 10th and 11 is included, this fifth diode D5 in the 3-level converter half-bridge according to the invention 5a according to 2nd to the fifth diode D5 and seventh diode D7 doubled and the fifth diode D5 in the first power semiconductor module 1a arranged and the seventh diode D7 in the second power semiconductor module 2a arranged. Because the sixth diode D6 in 1 in the third and fourth commutation current paths 12th and 13 is included, this sixth diode D6 in the 3-level converter half-bridge according to the invention 5a according to 2nd to the sixth diode D6 and eighth diode D8 doubled and the sixth diode D6 in the fourth power semiconductor module 4a arranged and the eighth diode D8 in the third power semiconductor module 3a arranged.

The 3-level converter half-bridge according to the invention 5a has a first, a second, a third and a fourth power semiconductor module 1a , 2a , 3a and 4a on, each a housing 61 , 62 , 63 , 64 and outside the respective housing 61 , 62 , 63 , 64 have arranged electrical connections. The 3-level converter half bridge 5a further comprises a first, a second, a third and a fourth power semiconductor switch T1 , T2 , T3 and T4 on, each a first and a second load connection C. and E have and has a first, a second, a third, a fourth, a fifth, a sixth, a seventh and an eighth diode D1 , D2 , D3 , D4 , D5 , D6 , D7 and D8 on.

The first power semiconductor switch T1 and the fifth diode D5 are in the housing 61 of the first power semiconductor module 1a arranged (see 3rd ). A first connection DC11 of the first power semiconductor module 1a is with the first load connection C. of the first power semiconductor switch T1 electrically connected and a second connection DC12 of the first power semiconductor module 1a is with the anode of the fifth diode D5 electrically connected and the cathode of the fifth diode D5 is with the second load connection E of the first power semiconductor switch T1 and with a third connector AC11 of the first power semiconductor module 1a electrically connected.

The second power semiconductor switch T2 , the third and fourth diode D3 and D4 and the seventh diode D7 are in the housing 62 of the second power semiconductor module 2a arranged. A first connection DC21 of the second power semiconductor module 2a is with the anode of the fourth diode D4 electrically connected. The cathode of the fourth diode D4 is with the anode of the third diode D3 electrically connected and the cathode of the third diode D3 is with the second load connection E of the second power semiconductor switch T2 and with a third connector AC21 of the second power semiconductor module 2a electrically connected. A second connection DC22 of the second power semiconductor module 2a is the seventh diode with the anode D7 electrically connected and the cathode of the seventh diode D7 is with a fourth connector AC22 of the second power semiconductor module 2a and with the first load connection C. of the second power semiconductor switch T2 electrically connected.

The third power semiconductor switch T3 , the first and second diode D1 and D2 and the eighth diode D8 are in the housing 63 of the third power semiconductor module 3a arranged. A first connection DC31 of the third power semiconductor module 3a is with the cathode of the first diode D1 electrically connected. The anode of the first diode D1 is with the cathode of the second diode D2 electrically connected. The anode of the second diode D2 is with the first load connection C. of the third power semiconductor switch T3 and with a third connector AC31 of the third power semiconductor module 3a electrically connected. A second connection DC32 of the third power semiconductor module 3a is the eighth diode with the cathode D8 electrically connected and the anode of the eighth diode D8 is with a fourth connector AC32 of the third power semiconductor module 3a and with the second load connection E of the third power semiconductor switch T3 electrically connected.

The fourth power semiconductor switch T4 and the sixth diode D6 are in the housing 64 of the fourth power semiconductor module 4a arranged. A first connection DC41 of the fourth power semiconductor module 4a is with the second load connection E of the fourth power semiconductor switch T4 electrically connected. A second connection DC42 of the fourth power semiconductor module 4a is the sixth diode with the cathode D6 electrically connected. The anode of the sixth diode D6 is with the first load connection C. of the fourth power semiconductor switch T4 and with a third connector AC41 of the fourth power semiconductor module 4a electrically connected.

The second connection DC12 of the first power semiconductor module 1a is with the second connector DC42 of the fourth power semiconductor module 4a , with the second connector DC22 of the second power semiconductor module 2a and with the second connector DC32 of the third power semiconductor module 3a electrically connected. The first connection DC11 of the first power semiconductor module 1a is with the first connection DC31 of the third power semiconductor module 3a electrically connected. The third connection AC21 of the second power semiconductor module 2a is with the third connector AC31 of the third power semiconductor module 3a electrically connected. The third connection AC41 of the fourth power semiconductor module 4a is with the fourth connector AC32 of the third power semiconductor module 3a electrically connected. The third connection AC11 of the first power semiconductor module 1a is with the fourth connector AC22 of the second power semiconductor module 2a electrically connected. The first connection DC41 of the fourth power semiconductor module 4a is with the first connection DC21 of the second power semiconductor module 2a electrically connected.

Preferably, for the electrical potential connection, one with the anode of the first diode D1 fifth connection connected in an electrically conductive manner AUX31 of the third power semiconductor module 3a with the fourth connector AC22 of the second power semiconductor module 2a electrically connected and one with the anode of the third diode D3 fifth connection connected in an electrically conductive manner AUX21 of the second power semiconductor module 2a with the fourth connector AC32 of the third power semiconductor module 3a electrically connected. The fifth port AUX31 of the third power semiconductor module 3a can with the fourth connector AC22 of the second power semiconductor module 2a be electrically connected by the fifth connector AUX31 of the third power semiconductor module 3a directly with the fourth connection AC22 of the second power semiconductor module 2a is electrically connected or as in 2nd and 3rd represented by the fifth connector AUX31 of the third power semiconductor module 3a directly with a sixth connector AUX22 of the second power semiconductor module 2a is electrically connected and the sixth connector AUX22 of the second power semiconductor module 2a with the fourth connector AC22 of the second power semiconductor module 2a is electrically connected. The fifth port AUX21 of the second power semiconductor module 2a can with the fourth connector AC32 of the third power semiconductor module 3a be electrically connected by the fifth connector AUX21 of the second power semiconductor module 2a directly with the fourth connection AC32 of the third power semiconductor module 3a is electrically connected or as in 2nd and 3rd represented by the fifth connector AUX21 of the second power semiconductor module 2a directly with a sixth connector AUX32 of the third power semiconductor module 3a is electrically connected and the sixth connection AUX32 of the third power semiconductor module 3a with the fourth connector AC32 of the third power semiconductor module 3a is electrically connected. Since these optional electrically conductive connections only serve for the electrical potential connection, only a small electrical current flows through these electrically conductive connections.

In 3rd is an embodiment of the 3-level converter half-bridge according to the invention 5a according to 2nd with four electrically connected power semiconductor modules 1a , 2a , 3a and 4a shown. The first, second, third and fourth power semiconductor modules 1a , 2a , 3a , and 4a have an identical geometric outer shape, the respective first and second connection DC11 , DC12 , DC21 , DC22 , DC31 , DC32 , DC41 , DC42 of the power semiconductor modules 1a , 2a , 3a , 4a is designed as a load current connection and at a first end region E1 of the respective power semiconductor module 1a , 2a , 3a , 4a is arranged. The fact that in the power semiconductor modules 1a , 2a , 3a and 4a those connections that are connected to the first or second DC voltage connection DC + and DC , or the neutral connection N of the 3-level converter half bridge 5a are electrically connected at the first end region E1 of the respective power semiconductor module 1a , 2a , 3a , 4a are arranged, is the respective power semiconductor module 1a , 2a , 3a , 4a trained particularly low inductance. The respective third connection AC11 , AC21 , AC31 , AC41 of the power semiconductor modules 1a , 2a , 3a , 4a is designed as a load current connection and is at one of the first end regions E1 of the respective power semiconductor module 1a , 2a , 3a , 4a oppositely arranged second end region E2 of the respective power semiconductor module 1a , 2a , 3a , 4a arranged, the first and second connections DC11 , DC12 , DC21 , DC22 , DC31 , DC32 , DC41 , DC42 of the power semiconductor modules 1a , 2a , 3a , 4a on a common first page 5a `the 3-level converter half bridge 5a are arranged. In that the first and second connections DC11 , DC12 , DC21 , DC22 , DC31 , DC32 , DC41 , DC42 of the power semiconductor modules 1a , 2a , 3a , 4a on a common first page 5a `the 3-level converter half bridge 5a are arranged, is the 3-level converter half bridge 5a trained particularly low inductance.

The third connection AC11 of the first power semiconductor module 1a , the third and fourth connection AC21 and AC22 of the second power semiconductor module 2a , the third and fourth connection AC31 and AC32 of the third power semiconductor module 3a and the first port AC41 of the fourth power semiconductor module 4a are on the first page 5a `the 3-level converter half bridge 5a oppositely arranged second side 5a "the 3-level converter half bridge 5a arranged.

The first, second, third and fourth power semiconductor modules 1a , 2a , 3a , 4a are preferred, as exemplified in 3rd shown, at their ends at which no connections designed as load current connections are arranged in a row.

The first, second, third and fourth power semiconductor modules 1a , 2a , 3a , 4a are preferably arranged at a distance from one another.

It should be noted that as in 3rd can be seen, the first and fourth power semiconductor module 1a and 4a one each at its second end area E2 one in 2nd may have further connection, not shown. This additional connection can be used to double the third connection AC11 of the first power semiconductor module 1a be used so that the first power semiconductor module 1a two third connections connected in an electrically conductive manner AC11 and for doubling the third connection AC41 of the fourth power semiconductor module 4a be used so that the fourth power semiconductor module 4a two third connections connected in an electrically conductive manner AC41 having. If the fourth connection AC22 of the second power semiconductor module 2a directly electrically conductive with the two third connections AC11 of the first power semiconductor module 1a is connected and the fourth connector AC32 of the third power semiconductor module 3a directly electrically conductive with the two third connections AC41 of the fourth power semiconductor module 4a is connected, then this will the ohmic resistance of the related electrical connections is reduced.

• DC11: erster Anschluss des ersten Leistungshalbleitermoduls
• DC12: zweiter Anschluss des ersten Leistungshalbleitermoduls
• AC11: dritter Anschluss des ersten Leistungshalbleitermoduls
• DC21: erster Anschluss des zweiten Leistungshalbleitermoduls
• DC22: zweiter Anschluss des zweiten Leistungshalbleitermoduls
• AC21: dritter Anschluss des zweiten Leistungshalbleitermoduls
• AC22: vierter Anschluss des zweiten Leistungshalbleitermoduls
• AUX21: fünfter Anschluss des zweiten Leistungshalbleitermoduls
• AUX22: sechster Anschluss des zweiten Leistungshalbleitermoduls
• DC31: erster Anschluss des dritten Leistungshalbleitermoduls
• DC32: zweiter Anschluss des dritten Leistungshalbleitermoduls
• AC31: dritter Anschluss des dritten Leistungshalbleitermoduls
• AC32: vierter Anschluss des dritten Leistungshalbleitermoduls
• AUX31: fünfter Anschluss des dritten Leistungshalbleitermoduls
• AUX32: sechster Anschluss des dritten Leistungshalbleitermoduls
• DC41: erster Anschluss des vierten Leistungshalbleitermoduls
• DC42: zweiter Anschluss des vierten Leistungshalbleitermoduls
• AC41: dritter Anschluss des vierten Leistungshalbleitermoduls

Reference symbol list of the connections of the 3-level converter half bridge 5a in terms of 2nd and 3rd :

• DC11: first connection of the first power semiconductor module
• DC12: second connection of the first power semiconductor module
• AC11: third connection of the first power semiconductor module
• DC21: first connection of the second power semiconductor module
• DC22: second connection of the second power semiconductor module
• AC21: third connection of the second power semiconductor module
• AC22: fourth connection of the second power semiconductor module
• AUX21: fifth connection of the second power semiconductor module
• AUX22: sixth connection of the second power semiconductor module
• DC31: first connection of the third power semiconductor module
• DC32: second connection of the third power semiconductor module
• AC31: third connection of the third power semiconductor module
• AC32: fourth connection of the third power semiconductor module
• AUX31: fifth connection of the third power semiconductor module
• AUX32: sixth connection of the third power semiconductor module
• DC41: first connection of the fourth power semiconductor module
• DC42: second connection of the fourth power semiconductor module
• AC41: third connection of the fourth power semiconductor module

In 4th is a further embodiment of a 3-level converter half-bridge according to the invention 5b shown in the form of an electrical circuit diagram. The 3-level converter half bridge 5b agrees with its 3-level converter half bridge in terms of its electrical circuit diagram 5a according to 2nd except for the feature that the 3-level converter half bridge 5b , The components of the first and fourth power semiconductor module 1a and 4a the 3-level converter half bridge 5a into a common first power semiconductor module 1b are integrated.

The 3-level converter half-bridge according to the invention 5b has a first, a second and a third power semiconductor module 1b , 2 B and 3b on, each a housing 61 , 62 , 63 and outside the respective housing 61 , 62 , 63 have arranged electrical connections. The 3-level converter half bridge 5b further comprises a first, a second, a third and a fourth power semiconductor switch T1 , T2 , T3 , T4 on, each a first and a second load connection C. and E exhibit. The 3-level converter half bridge 5b also has a first, second, third, fourth, fifth, sixth, seventh and an eighth diode D1 , D2 , D3 , D4 , D5 , D6 , D7 and D8 on.

The first and fourth power semiconductor switch T1 and T4 , the fifth diode D5 and the sixth diode D6 are in the housing 61 of the first power semiconductor module 1b arranged and a first connection DC11 of the first power semiconductor module 1b is with the first load connection C. of the first power semiconductor switch T1 electrically connected and a third connection DC13 of the first power semiconductor module 1b is with the anode of the fifth diode D5 and the cathode of the sixth diode D6 electrically connected. The cathode of the fifth diode D5 is with the second load connection E of the first power semiconductor switch T1 and with a fourth connector AC11 of the first power semiconductor module 1 b electrically connected. A second connection DC12 of the first power semiconductor module 1b is with the second load connection E of the fourth power semiconductor switch T4 electrically connected and a fifth connection AC12 of the first power semiconductor module 1b is with the anode of the sixth diode D6 and with the first load connection C. of the fourth power semiconductor switch T4 electrically connected.

The second power semiconductor module 2 B in 4th corresponds to the second power semiconductor module with regard to its electrical circuit diagram 2a , so that to avoid duplicate descriptions, with regard to the description of the electrical circuit diagram or the electrical components of the second power semiconductor module 2 B and their electrically conductive connections to each other on the relevant description of the second power semiconductor module 2a to 2nd is referred.

The third power semiconductor module 3b in 4th corresponds to the third power semiconductor module with regard to its electrical circuit diagram 3a , so that in order to avoid duplicate descriptions, with regard to the description of the electrical circuit diagram or the electrical components of the third power semiconductor module 3b and their electrically conductive connections to each other on the relevant description of the third power semiconductor module 3a to 2nd is referred.

The second connection DC12 of the first power semiconductor module 1b is with the first connection DC21 of the second power semiconductor module 2 B electrically connected. The first connection DC11 of the first power semiconductor module 1b is with the first connection DC31 of the third power semiconductor module 3b electrically connected. The third connection AC21 of the second power semiconductor module 2 B is with the third connector AC31 of the third power semiconductor module 3b electrically connected. The third connection DC13 of the first power semiconductor module 1b is with the second connector DC32 of the third power semiconductor module 3b and with the second connector DC22 of the second power semiconductor module 2 B electrically connected. The fifth port AC12 of the first power semiconductor module 1b is with the fourth connector AC32 of the third power semiconductor module 3b electrically connected, the fourth connection AC11 of the first power semiconductor module 1b with the fourth connector AC22 of the second power semiconductor module 2 B is electrically connected.

Preferably, for the electrical potential connection, one with the anode of the first diode D1 fifth connection connected in an electrically conductive manner AUX31 of the third power semiconductor module 3b with the fourth connector AC22 of the second power semiconductor module 2 B electrically connected and one with the anode of the third diode D3 fifth connection connected in an electrically conductive manner AUX21 of the second power semiconductor module 2 B is with the fourth connector AC32 of the third power semiconductor module 3b electrically connected. These optional electrical connections can, as in 5 and 6 represented directly or as in 4th shown, indirectly via a sixth connection AUX22 of the second power semiconductor module 2 B and a sixth connector AUX32 of the third power semiconductor module 3b be executed.

In 5 is an embodiment of the 3-level converter half-bridge according to the invention 5b according to 4th with three electrically connected power semiconductor modules 1b , 2 B and 3b shown. The first, second and third power semiconductor module 1b , 2 B and 3b has an identical geometric outer shape, the respective first and second connection DC21 , DC22 , DC31 , DC32 of the second and third power semiconductor modules 2 B and 3b is designed as a load current connection and at a first end region E1 of the respective second and third power semiconductor modules 2 B and 3b is arranged. The respective third and fourth connection AC21 , AC22 , AC31 , AC32 of the second and third power semiconductor modules 2 B and 3b is designed as a load current connection and is at one of the first end regions E1 of the respective second and third power semiconductor modules 2 B and 3b oppositely arranged second end region E2 of the respective second and third power semiconductor modules 2 B and 3b arranged. The first, second and third connection DC11 , DC12 and DC13 of the first power semiconductor module 1b are designed as load current connections and are at a second end region E2 of the first power semiconductor module 1b arranged. The fourth and fifth connection AC11 and AC12 of the first power semiconductor module 1b are designed as load current connections and at one of the second end regions E2 of the first power semiconductor module 1b oppositely arranged first end region E1 of the first power semiconductor module 1b arranged. The first power semiconductor module 1b is compared to the second and third power semiconductor module 2 B and 3b arranged rotated by 180 ° so that the first and second connections DC21 , DC22 , DC31 , DC32 of the second and third power semiconductor modules 2 B and 3b and the third port DC13 of the first power semiconductor module 1b on a common first page 5b `the 3-level converter half bridge 5b are arranged. As exemplified in 5 shown, the respective fifth connection AUX21 , AUX31 of the second and third power semiconductor modules 2 B and 3b be designed as a load current connection and at the respective second end region E2 of the second and third power semiconductor modules 2 B and 3b be arranged. The first power semiconductor module 1b is preferably between the second and third power semiconductor modules 2 B and 3b arranged.

In 6 is a further embodiment of the 3-level converter half-bridge according to the invention 5b according to 4th with three electrically connected power semiconductor modules 1b , 2 B and 3b shown. The second and third power semiconductor module 2 B and 3b have an identical geometric outer shape and the first power semiconductor module 1b has one of the second and third power semiconductor modules 2 B and 3b deviating geometric outer shape. The respective first and second connection DC21 , DC22 , DC31 , DC32 of the second and third power semiconductor modules 2 B and 3b is designed as a load current connection and is at a first end region E1 of the respective second and third power semiconductor modules 2 B and 3b arranged. The respective third and fourth connection AC21 , AC22 , AC31 , AC32 of the second and third power semiconductor modules 2 B and 3b is designed as a load current connection and is at one of the first end regions E1 of the respective second and third power semiconductor modules 2 B and 3b oppositely arranged second end region E2 of the respective second and third Power semiconductor module 2 B and 3b is arranged, the first, second and third connection DC11 , DC12 , DC13 of the first power semiconductor module 1b are designed as load current connections and at a first end region E1 of the first power semiconductor module 1b are arranged. The fourth and fifth connection AC11 and AC12 of the first power semiconductor module 1b are designed as load current connections and at one of the first end regions E1 of the first power semiconductor module 1b oppositely arranged second end region E2 of the first power semiconductor module 1b arranged. The first and second connections DC21 , DC22 , DC31 , DC32 of the second and third power semiconductor modules 2 B and 3b and the first, second and third port DC11 , DC12 and DC13 of the first power semiconductor module 1b are on a common first page 5b `the 3-level converter half bridge 5b arranged. The first power semiconductor module 1b is preferably between the second and third power semiconductor modules 2 B and 3b arranged.

With the 3-level converter half bridge 5b according to 5 and 6 is the fourth and fifth connection AC11 and AC12 of the first power semiconductor module 1b and the third and fourth port AC21 and AC22 of the second power semiconductor module 2 B and the third and fourth port AC31 and AC32 of the third power semiconductor module 3b on a first page 5b `the 3-level converter half bridge 5b oppositely arranged second side 5b "the 3-level converter half bridge 5b arranged.

The first, second and third power semiconductor module 1b , 2 B , 3b are preferred, as exemplified in 5 and 6 shown, at their ends at which no connections designed as load current connections are arranged in a row. The first, second, third power semiconductor module 1b , 2 B , 3b are preferably arranged objected to each other.

• DC11: erster Anschluss des ersten Leistungshalbleitermoduls
• DC12: zweiter Anschluss des ersten Leistungshalbleitermoduls
• DC13: dritter Anschluss des ersten Leistungshalbleitermoduls
• AC11: vierter Anschluss des ersten Leistungshalbleitermoduls
• AC12: fünfter Anschluss des ersten Leistungshalbleitermoduls
• DC21: erster Anschluss des zweiten Leistungshalbleitermoduls
• DC22: zweiter Anschluss des zweiten Leistungshalbleitermoduls
• AC21: dritter Anschluss des zweiten Leistungshalbleitermoduls
• AC22: vierter Anschluss des zweiten Leistungshalbleitermoduls
• AUX21: fünfter Anschluss des zweiten Leistungshalbleitermoduls
• AUX22: sechster Anschluss des zweiten Leistungshalbleitermoduls
• DC31: erster Anschluss des dritten Leistungshalbleitermoduls
• DC32: zweiter Anschluss des dritten Leistungshalbleitermoduls
• AC31: dritter Anschluss des dritten Leistungshalbleitermoduls
• AC32: vierter Anschluss des dritten Leistungshalbleitermoduls
• AUX31: fünfter Anschluss des dritten Leistungshalbleitermoduls
• AUX32: sechster Anschluss des dritten Leistungshalbleitermoduls

Reference symbol list of the connections of the 3-level converter half bridge 5b in terms of 4th , 5 and 6 :

• DC11: first connection of the first power semiconductor module
• DC12: second connection of the first power semiconductor module
• DC13: third connection of the first power semiconductor module
• AC11: fourth connection of the first power semiconductor module
• AC12: fifth connection of the first power semiconductor module
• DC21: first connection of the second power semiconductor module
• DC22: second connection of the second power semiconductor module
• AC21: third connection of the second power semiconductor module
• AC22: fourth connection of the second power semiconductor module
• AUX21: fifth connection of the second power semiconductor module
• AUX22: sixth connection of the second power semiconductor module
• DC31: first connection of the third power semiconductor module
• DC32: second connection of the third power semiconductor module
• AC31: third connection of the third power semiconductor module
• AC32: fourth connection of the third power semiconductor module
• AUX31: fifth connection of the third power semiconductor module
• AUX32: sixth connection of the third power semiconductor module

In 7 is a further embodiment of a 3-level converter half-bridge according to the invention 5c shown in the form of an electrical circuit diagram. The 3-level converter half bridge 5c agrees with its 3-level converter half bridge in terms of its electrical circuit diagram 5a according to 2nd except for the feature that the converter half bridge 5c , the seventh and eighth diode D7 and D8 and the connectors DC22 and DC32 , as well as the electrically conductive connections to the connections DC22 and DC32 omitted.

The first power semiconductor module 1c the 3-level converter half bridge 5c in 7 corresponds to the first power semiconductor module with regard to its electrical circuit diagram 1a and the fourth power semiconductor module 4c the converter half bridge 5c in 7 corresponds to the fourth power semiconductor module with regard to its electrical circuit diagram 4a , so that in order to avoid duplicate descriptions, with regard to the description of the electrical circuit diagram or the electrical components and their electrically conductive connections to one another, to the relevant description of the first and fourth power semiconductor modules 1a and 4a to 2nd is referred.

The second power semiconductor switch T2 and the third and fourth diodes D3 and D4 are in the housing 62 of the second power semiconductor module 2c the 3-level converter half bridge 5c arranged. A first connection DC21 of the second power semiconductor module 2c is with the anode of the fourth diode D4 electrically connected and the cathode of the fourth diode D4 is with the anode of the third diode D3 electrically connected. The cathode of the third diode D3 is with the second load connection E of the second power semiconductor switch T2 and with a second connector AC21 of the second power semiconductor module 2c electrically connected. A third connection AC22 of the second power semiconductor module 2c is with the first load connection C. of the second power semiconductor switch T2 electrically connected.

The third power semiconductor switch T3 and the first and second diodes D1 and D2 are in the housing 63 of the third power semiconductor module 3c arranged. A first connection DC31 of the third power semiconductor module 3c is with the cathode of the first diode D1 electrically connected and the anode of the first diode D1 is with the cathode of the second diode D2 electrically connected. The anode of the second diode D2 is with the first load connection C. of the third power semiconductor switch T3 and with a second connector AC31 of the third power semiconductor module 3c electrically connected. A third connection AC32 of the third power semiconductor module 3c is with the second load connection E of the third power semiconductor switch T3 electrically connected.

The second connection DC12 of the first power semiconductor module 1c is with the second connector DC42 of the fourth power semiconductor module 4c electrically connected. The first connection DC11 of the first power semiconductor module 1c is with the first connection DC31 of the third power semiconductor module 3c electrically connected. The second connection AC21 of the second power semiconductor module 2c is with the second connector AC31 of the third power semiconductor module 3c electrically connected. The third connection AC41 of the fourth power semiconductor module 4c is with the third connector AC32 of the third power semiconductor module 3c electrically connected. The third connection AC11 of the first power semiconductor module 1c is with the third connector AC22 of the second power semiconductor module 2c electrically connected. The first connection DC41 of the fourth power semiconductor module 4c is with the first connection DC21 of the second power semiconductor module 2c electrically connected.

The 3-level converter half bridge 5c points towards the 3-level converter half bridge 5a a higher inductance, but it is designed for this with fewer components.

Preferably, for the electrical potential connection, one with the anode of the first diode D1 fourth connection connected in an electrically conductive manner AUX31 of the third power semiconductor module 3c with the third port AC22 of the second power semiconductor module 2c electrically connected and one with the anode of the third diode D3 fourth connection connected in an electrically conductive manner AUX21 of the second power semiconductor module 2c is with the third connector AC32 of the third power semiconductor module 3c electrically connected. These optional electrical connections can, as in 9 represented directly or as in 7 and 8th shown, indirectly via a fifth connection AUX22 of the second power semiconductor module 2c and over a fifth port AUX32 of the third power semiconductor module 3c be executed.

In 8th is an embodiment of the 3-level converter half-bridge according to the invention 5c according to 7 shown. The first, second, third and fourth power semiconductor modules 1c , 2c , 3c and 4c have an identical geometric outer shape. The respective first, second and third connection DC11 , DC12 , AC11 , DC21 , AC21 , AC22 , DC31 , AC31 , AC32 , DC41 , DC42 , AC41 of the power semiconductor modules 1c , 2c , 3c , 4c is designed as a load current connection. The first, second and third connection DC11 , DC12 , AC11 , DC21 , AC21 , AC22 , DC31 , AC31 , AC32 , DC41 , DC42 , AC41 of the respective power semiconductor module 1c , 2c , 3c , 4c are in a row on the top of the respective power semiconductor module 1c , 2c , 3c , 4c arranged.

In 9 is a further embodiment of the 3-level converter half-bridge according to the invention 5c according to 7 shown. The first, second, third and fourth power semiconductor modules 1c , 2c , 3c and 4c have an identical geometric outer shape. The first and second connection DC11 and DC12 of the first power semiconductor module 1c , the first connection DC21 of the second power semiconductor module 2c , the first connection DC31 of the third power semiconductor module 3c and the first and second port DC41 and DC42 of the fourth power semiconductor module 4c are designed as load current connections and are at a first end region E1 of the power semiconductor modules 1c , 2c , 3c , and 4c arranged and are on a common first page 5c `the 3-level converter half bridge 5c arranged. The respective second connection AC21 , AC31 of the second and third power semiconductor modules 2c and 3c is designed as a load current connection and on one of the first End area E1 of the second and third power semiconductor modules 2c and 3c oppositely arranged second end region E2 of the second and third power semiconductor modules 2c and 3c arranged. The respective third connection AC22 , AC32 of the second and third power semiconductor modules 2c and 3c are at the first end E1 of the second and third power semiconductor modules 2c and 3c arranged. The respective third connection AC11 , AC41 of the first and fourth power semiconductor modules 1c and 4c are at the first end E1 of the first and fourth power semiconductor modules 1c and 4c oppositely arranged second end region E2 of the first and fourth power semiconductor modules 1c and 4c arranged. As exemplified in 9 shown, the respective fourth connection AUX21 , AUX31 of the second and third power semiconductor modules 2c and 3c be designed as a load current connection and at the respective second end region E2 of the second and third power semiconductor modules 2c and 3c be arranged.

The first, second, third and fourth power semiconductor modules 1c , 2c , 3c and 4c are preferred, as exemplified in 8th and 9 shown, at their ends at which no connections designed as load current connections are arranged in a row. The first, second, third and fourth power semiconductor modules 1c , 2c , 3c and 4c are preferably arranged objected to each other.

It should be noted that as in 9 can be seen, the first and fourth power semiconductor module 1c and 4c each at its second end area E2 one in 9 may have unused additional connection. This additional connection can be used to double the third connection AC11 of the first power semiconductor module 1c are used so that the first power semiconductor module 1c two third connections connected in an electrically conductive manner AC11 and for doubling the third connection AC41 of the fourth power semiconductor module 4c are used so that the fourth power semiconductor module 4c two third connections connected in an electrically conductive manner AC41 having. If the fourth connection AC22 of the second power semiconductor module 2c directly electrically conductive with the two third connections AC11 of the first power semiconductor module 1c is connected and the fourth connector AC32 of the third power semiconductor module 3c directly electrically conductive with the two third connections AC41 of the fourth power semiconductor module 4c is connected, the ohmic resistance of the relevant electrical connections is reduced as a result.

• DC11: erster Anschluss des ersten Leistungshalbleitermoduls
• DC12: zweiter Anschluss des ersten Leistungshalbleitermoduls
• AC11: dritter Anschluss des ersten Leistungshalbleitermoduls
• DC21: erster Anschluss des zweiten Leistungshalbleitermoduls
• AC21: zweiter Anschluss des zweiten Leistungshalbleitermoduls
• AC22: dritter Anschluss des zweiten Leistungshalbleitermoduls
• AUX21: vierter Anschluss des zweiten Leistungshalbleitermoduls
• AUX22: fünfter Anschluss des zweiten Leistungshalbleitermoduls
• DC31: erster Anschluss des dritten Leistungshalbleitermoduls
• AC31: zweiter Anschluss des dritten Leistungshalbleitermoduls
• AC32: dritter Anschluss des dritten Leistungshalbleitermoduls
• AUX31: vierter Anschluss des dritten Leistungshalbleitermoduls
• AUX32: fünfter Anschluss des dritten Leistungshalbleitermoduls
• DC41: erster Anschluss des vierten Leistungshalbleitermoduls
• DC42: zweiter Anschluss des vierten Leistungshalbleitermoduls
• AC41: dritter Anschluss des vierten Leistungshalbleitermoduls

Reference symbol list of the connections of the 3-level converter half bridge 5c in terms of 7 , 8th and 9 :

• DC11: first connection of the first power semiconductor module
• DC12: second connection of the first power semiconductor module
• AC11: third connection of the first power semiconductor module
• DC21: first connection of the second power semiconductor module
• AC21: second connection of the second power semiconductor module
• AC22: third connection of the second power semiconductor module
• AUX21: fourth connection of the second power semiconductor module
• AUX22: fifth connection of the second power semiconductor module
• DC31: first connection of the third power semiconductor module
• AC31: second connection of the third power semiconductor module
• AC32: third connection of the third power semiconductor module
• AUX31: fourth connection of the third power semiconductor module
• AUX32: fifth connection of the third power semiconductor module
• DC41: first connection of the fourth power semiconductor module
• DC42: second connection of the fourth power semiconductor module
• AC41: third connection of the fourth power semiconductor module

In 10th is a further embodiment of a 3-level converter half-bridge according to the invention 5d shown in the form of an electrical circuit diagram. The 3-level converter half bridge 5d agrees with its 3-level converter half bridge in terms of its electrical circuit diagram 5b according to 4th except for the feature that the converter half bridge 5d , the seventh and eighth diode D7 and D8 and the connectors DC22 and DC32 , as well as the electrically conductive connections to the connections DC22 and DC32 omitted.

The first power semiconductor module 1d the 3-level converter half bridge 5d in 10th corresponds to the first power semiconductor module with regard to its electrical circuit diagram 1b in 4th , so that in order to avoid duplicate descriptions, with regard to the description of the electrical circuit diagram or the electrical components and their electrically conductive connections to one another, to the relevant description of the first power semiconductor module 1b to 4th is referred.

The second power semiconductor switch T2 , the third and fourth diode D3 and D4 are in the housing 62 of the second power semiconductor module 2d the 3-level converter half bridge 5d arranged. A first connection DC21 of the second power semiconductor module 2d is with the anode of the fourth diode D4 electrically connected and the cathode of the fourth diode D4 is with the anode of the third diode D3 electrically connected. The cathode of the third diode D3 is with the second load connection E of the second power semiconductor switch T2 and with a second connector AC21 of the second power semiconductor module 2d is electrically connected. A third connection AC22 of the second power semiconductor module 2d is with the first load connection C. of the second power semiconductor switch T2 electrically connected.

The third power semiconductor switch T3 and the first and second diodes D1 and D2 are in the housing 63 of the third power semiconductor module 3d the 3-level converter half bridge 5d arranged. A first connection DC31 of the third power semiconductor module 3d is with the cathode of the first diode D1 electrically connected. The anode of the first diode D1 is with the cathode of the second diode D2 electrically connected and the anode of the second diode D2 is with the first load connection C. of the third power semiconductor switch T3 and with a second connector AC31 of the third power semiconductor module 3d electrically connected. A third connection AC32 of the third power semiconductor module 3d is with the second load connection E of the third power semiconductor switch T3 electrically connected.

The second connection DC12 of the first power semiconductor module 1d is with the first connection DC21 of the second power semiconductor module 2d electrically connected. The first connection DC11 of the first power semiconductor module 1d is with the first connection DC31 of the third power semiconductor module 3d electrically connected. The second connection AC21 of the second power semiconductor module 2d is with the second connector AC31 of the third power semiconductor module 3d electrically connected. The fifth port AC12 of the first power semiconductor module 1d is with the third connector AC32 of the third power semiconductor module 3d electrically connected. The fourth connection AC11 of the first power semiconductor module 1d is with the third connector AC22 of the second power semiconductor module 2d electrically connected.

The 3-level converter half bridge 5d points towards the -level half bridge 5b a higher inductance, but it is designed for this with fewer components.

Preferably, for the electrical potential connection, one with the anode of the first diode D1 fourth connection connected in an electrically conductive manner AUX31 of the third power semiconductor module 3d with the third port AC22 of the second power semiconductor module 2d electrically connected and one with the anode of the third diode D3 fourth connection connected in an electrically conductive manner AUX21 of the second power semiconductor module 2d with the third port AC32 of the third power semiconductor module 3d electrically connected. These optional electrical connections can, as in 11 and 12th represented directly or as in 10th shown, indirectly via a fifth connection AUX22 of the second power semiconductor module 2d and over a fifth port AUX32 of the third power semiconductor module 3c be executed.

In 11 is an embodiment of the 3-level converter half-bridge according to the invention 5d according to 10th shown. The first, second and third power semiconductor module 1d , 2d and 3d have an identical geometric outer shape. The respective first connection DC21 , DC31 of the second and third power semiconductor modules 2d and 3d is designed as a load current connection and is at a first end region E1 of the respective second and third power semiconductor modules 2d and 3d arranged. The respective second connection AC21 , AC31 of the second and third power semiconductor modules 2d and 3d is designed as a load current connection and at one of the first end regions E1 of the respective second and third power semiconductor modules 2d and 3d oppositely arranged second end region E2 of the respective second and third power semiconductor modules 2d and 3d arranged. The first, second and third connection DC11 , DC12 , and DC13 of the first power semiconductor module 1d are designed as load current connections and are at a second end region E2 of the first power semiconductor module 1d arranged. The fourth and fifth connection AC11 and AC12 of the first power semiconductor module 1d are designed as load current connections and at one of the second end regions E2 of the first power semiconductor module 1d oppositely arranged first end region E1 of the first power semiconductor module 1d arranged. The first power semiconductor module 1d is compared to the second and third power semiconductor module 2d and 3d arranged rotated by 180 ° so that the respective first connection DC21 , DC31 of the second and third power semiconductor modules 2d and 3d and the third port DC13 of the first power semiconductor module 1d on a common first page 5d `the 3-level converter half bridge 5d are arranged.

In 12th is a further embodiment of the 3-level converter half-bridge according to the invention 5d according to 10th shown. The second and third power semiconductor module 2d and 3d have an identical geometrical external shape and the first power semiconductor module 1d has one of the second and third power semiconductor modules 2d and 3d deviating geometric outer shape. The respective first connection DC21 , DC31 of the second and third power semiconductor modules 2d and 3d is designed as a load current connection and is at a first end region E1 of the respective second and third power semiconductor modules 2d and 3d arranged. The respective second connection AC21 , AC31 of the second and third power semiconductor modules 2d and 3d is designed as a load current connection and is at one of the first end regions E1 of the respective second and third power semiconductor modules 2d , 3d oppositely arranged second end region E2 of the respective second and third power semiconductor modules 2d and 3d arranged. The first, second and third connection DC11 , DC12 and DC13 of the first power semiconductor module 1d are designed as load current connections and at a first end region E1 of the first power semiconductor module 1d arranged. The fourth and fifth connection AC11 and AC12 of the first power semiconductor module 1d are designed as load current connections and at one of the first end regions E1 of the first power semiconductor module 1d oppositely arranged second end region E2 of the first power semiconductor module 1d arranged. The respective first connection DC21 , DC31 of the second and third power semiconductor modules 2d and 3d and the third port DC13 of the first power semiconductor module 1d are on a common first page 5d` the 3-level converter half bridge 5d arranged. As exemplified in 12th shown, the respective fourth connection AUX21 , AUX31 of the second and third power semiconductor modules 2d and 3d be designed as a load current connection and at the respective second end region E2 of the second and third power semiconductor modules 2d and 3d be arranged.

With the 3-level converter half bridge 5d according to 11 and 12th is the fourth and fifth connection AC11 and AC12 of the first power semiconductor module 1d and the second port AC21 of the second power semiconductor module 2d and fourth connection AC31 of the third power semiconductor module 3d on a first page 5d `the 3-level converter half bridge 5d oppositely arranged second side 5d "the 3-level converter half bridge 5d arranged.

The first, second and third power semiconductor module 1d , 2d , 3d are preferred, as exemplified in 11 and 12th shown, at their ends at which no connections designed as load current connections are arranged in a row. The first, second, third power semiconductor module 1d , 2d , 3d are preferably arranged objected to each other. The first power semiconductor module 1c is preferably between the second and third power semiconductor modules 2c and 3c arranged.

• DC11: erster Anschluss des ersten Leistungshalbleitermoduls
• DC12: zweiter Anschluss des ersten Leistungshalbleitermoduls
• DC13: dritter Anschluss des ersten Leistungshalbleitermoduls
• AC11: vierter Anschluss des ersten Leistungshalbleitermoduls
• AC12: fünfter Anschluss des ersten Leistungshalbleitermoduls
• DC21: erster Anschluss des zweiten Leistungshalbleitermoduls
• AC21: zweiter Anschluss des zweiten Leistungshalbleitermoduls
• AC22: dritter Anschluss des zweiten Leistungshalbleitermoduls
• AUX21: vierter Anschluss des zweiten Leistungshalbleitermoduls
• AUX22: fünfter Anschluss des zweiten Leistungshalbleitermoduls
• DC31: erster Anschluss des dritten Leistungshalbleitermoduls
• AC31: zweiter Anschluss des dritten Leistungshalbleitermoduls
• AC32: dritter Anschluss des dritten Leistungshalbleitermoduls
• AUX31: vierter Anschluss des dritten Leistungshalbleitermoduls
• AUX32: fünfter Anschluss des dritten Leistungshalbleitermoduls

Reference symbol list of the connections of the 3-level converter half bridge 5d in terms of 10th , 11 and 12th :

• DC11: first connection of the first power semiconductor module
• DC12: second connection of the first power semiconductor module
• DC13: third connection of the first power semiconductor module
• AC11: fourth connection of the first power semiconductor module
• AC12: fifth connection of the first power semiconductor module
• DC21: first connection of the second power semiconductor module
• AC21: second connection of the second power semiconductor module
• AC22: third connection of the second power semiconductor module
• AUX21: fourth connection of the second power semiconductor module
• AUX22: fifth connection of the second power semiconductor module
• DC31: first connection of the third power semiconductor module
• AC31: second connection of the third power semiconductor module
• AC32: third connection of the third power semiconductor module
• AUX31: fourth connection of the third power semiconductor module
• AUX32: fifth connection of the third power semiconductor module

It should be noted at this point that within the scope of the exemplary embodiments, the power semiconductor switches T1 , T2 , T3 and T4 in the form of IGBTs and the first load current connection C. of the respective power semiconductor switch in the form of the collector of the respective IGBT and the second load current connection E of the respective power semiconductor switch in the form of the emitter of the respective IGBT. The control connection G the power semiconductor switch is present in the exemplary embodiments in the form of the gate of the respective IGBT.

It should also be noted that in the sense of the invention, a connection designed as a load current connection is understood to mean a connection whose stationary current carrying capacity is at least as large as the stationary current carrying capacity of the power semiconductor switches of the power semiconductor module. In contrast, connections designed as auxiliary power connections have a significantly lower current carrying capacity. For example, in the exemplary embodiment according to 3rd the connections DC11 , DC12 , AC11 , DC21 , DC22 , AC21 , AC22 , DC31 , DC32 , AC31 , AC32 , DC41 , DC42 , AC41 designed as a load current connection and the connections AUX21 , AUX22 , AUX31 and AUX 32 trained as auxiliary power connections. In the exemplary embodiments according to 5 , 9 , 11 and 12th the connections are AUX 21 and AUX31 designed as load current connections, although only small currents flow through them, since they only serve for electrical potential connection. As a result, a mechanically highly loadable connection (for example by means of a screw connection) of the corresponding electrically conductive external connections to the connections AUX 21 and AUX31 enables.

It should also be noted that in the invention, the housing 62 of the respective power semiconductor module can be formed in one piece or in several pieces. A front housing component of the housing 62 can, for example, be formed by a cup-shaped plastic housing component that covers the power semiconductor switches and diodes and a rear housing component of the housing 62 can be formed, for example, by a housing-forming element, such as, for example, a substrate (for example a DCB substrate) on which the power semiconductor switches and diodes of the power semiconductor module are arranged, or from a base plate on which the substrate is in turn arranged.

It should also be noted that the first or second DC voltage connection DC + and DC or the neutral connection N of the respective 3-level converter half bridge 5a , 5b , 5c or. 5d may be present in the form of a respective section of the electrically conductive external connections between power semiconductor modules.

It should also be noted that if at least two connections labeled DC ** are arranged on the first or second end region of the respective power semiconductor module, these connections are preferably designed to be low-inductance. For this purpose, sections of internal electrical conductive connections to these connections run within the housing of the respective power semiconductor module, preferably at a short distance from one another.

For example, provided the respective power semiconductor modules are used in the respective exemplary embodiment to form the respective 3-level converter half bridge 5a , 5b , 5c or. 5d are used, have sufficient load connections, also to form a respective 3-level converter half bridge 5a , 5b , 5c or. 5d can be used in another embodiment.

Claims (15)

3-level converter half bridge (5a) with a first, a second, a third and a fourth power semiconductor module (1a, 2a, 3a, 4a), each with a housing (61,62,63,64) and outside the respective housing ( 61,62,63,64) arranged electrical connections, with a first, a second, a third and a fourth power semiconductor switch (T1, T2, T3, T4), each having a first and a second load connection (C, E) , with a first, a second, a third, a fourth, a fifth, a sixth, a seventh and an eighth diode (D1, D2, D3, D4, D5, D6, D7, D8), the first power semiconductor switch (T1 ) and the fifth diode (D5) are arranged in the housing (61) of the first power semiconductor module (1a) and a first connection (DC11) of the first power semiconductor module (1a) is electrically conductively connected to the first load connection (C) of the first power semiconductor switch (T1) and a second connection (DC12) of the first Lei power semiconductor module (1a) is electrically conductively connected to the anode of the fifth diode (D5) and the cathode of the fifth diode (D5) to the second load connection (E) of the first power semiconductor switch (T1) and to a third connection (AC11) of the first power semiconductor module (1a) is electrically conductively connected, the second power semiconductor switch (T2), the third and fourth diodes (D3, D4) and the seventh diode (D7) being arranged in the housing (62) of the second power semiconductor module (2a) and a first connection (DC21) of the second power semiconductor module (2a) is electrically conductively connected to the anode of the fourth diode (D4) and the cathode of the fourth diode (D4) is electrically conductively connected to the anode of the third diode (D3) and the cathode of the third diode (D3) with the second load connection (E) of the second power semiconductor switch (T2) and with a third connection (AC21) of the second power semiconductor module (2a) electrically connected and a second connection (DC22) of the second power semiconductor module (2a) is electrically conductively connected to the anode of the seventh diode (D7) and the cathode of the seventh diode (D7) is connected to a fourth connection (AC22) of the second power semiconductor module (2a) and is electrically conductively connected to the first load connection (C) of the second power semiconductor switch (T2), the third power semiconductor switch (T3), the first and second diodes (D1, D2) and the eighth diode (D8) in the housing (63) of the third power semiconductor module (3a) are arranged and a first connection (DC31) of the third power semiconductor module (3a) is electrically conductively connected to the cathode of the first diode (D1) and the anode the first diode (D1) is electrically conductively connected to the cathode of the second diode (D2) and the anode of the second diode (D2) is connected to the first load connection (C) of the third power semiconductor switch (T3) and to a third connection (AC31) of the third Power semiconductor module (3a) is electrically conductively connected and a second connection (DC32) of the third power semiconductor module (3a) is electrically conductively connected to the cathode of the eighth diode (D8) and the anode of the eighth diode (D8) is connected to a fourth connection (AC32) of the third power semiconductor module (3a) and to the second load connection (E) of the third power semiconductor switch (T3) is electrically conductively connected, the fourth power semiconductor switch (T4) and the sixth diode (D6) in the housing (64) of the fourth power semiconductor module (4a) are arranged and a first connection (DC41) of the fourth power semiconductor module (4a) to the second load connection (E) of the fourth power semiconductor switch (T4) is electrically conductively connected and a second connection (DC42) of the fourth power semiconductor module (4a) is electrically conductively connected to the cathode of the sixth diode (D6) and the anode of the sixth diode (D6) is connected to the first load connection (C) of the fourth power semiconductor switch (T4) and electrically conductively connected to a third connection (AC41) of the fourth power semiconductor module (4a), the second connection (DC12) of the first power semiconductor module (1a) having the second connection (DC42) of the fourth power semiconductor module (4a) , with the second connection (DC22) of the second power semiconductor module (2a) and with the second connection (DC32) of the third power semiconductor module (3a) is electrically conductively connected, wherein the first connection (DC11) of the first power semiconductor module (1a) with the first connection (DC31) of the third power semiconductor module (3a) is electrically conductively connected, the third connection (AC21) of the second power ngs Semiconductor module (2a) is electrically conductively connected to the third connection (AC31) of the third power semiconductor module (3a), the third connection (AC41) of the fourth power semiconductor module (4a) being electrically conductive to the fourth connection (AC32) of the third power semiconductor module (3a) is connected, the third connection (AC11) of the first power semiconductor module (1a) being electrically conductively connected to the fourth connection (AC22) of the second power semiconductor module (2a), the first connection (DC41) of the fourth power semiconductor module (4a) being connected to the first Connection (DC21) of the second power semiconductor module (2a) is electrically conductively connected. 3-level converter half bridge (5a) Claim 1 , characterized in that a fifth connection (AUX31) of the third power semiconductor module (3a) which is electrically conductively connected to the anode of the first diode (D1) is electrically conductively connected to the fourth connection (AC22) of the second power semiconductor module (2a) and one is connected to the Anode of the third diode (D3) is electrically connected to the fifth connection (AUX21) of the second power semiconductor module (2a) and is connected to the fourth connection (AC32) of the third power semiconductor module (3a). 3-level converter half-bridge (5a) according to one of the preceding claims, characterized in that the power semiconductor modules (1a, 2a, 3a, 4a) have an identical geometric external shape, the respective first and second connection (DC11, DC12, DC21, DC22, DC31, DC32, DC41, DC42) of the power semiconductor modules (1a, 2a, 3a, 4a) is designed as a load current connection and is arranged on a first end region (E1) of the respective power semiconductor module (1a, 2a, 3a, 4a), the the respective third connection (AC11, AC21, AC31, AC41) of the power semiconductor modules (1a, 2a, 3a, 4a) is designed as a load current connection and is arranged on an opposite end of the first end region (E1) of the respective power semiconductor module (1a, 2a, 3a, 4a) second end region (E2) of the respective power semiconductor module (1a, 2a, 3a, 4a) is arranged, the first and second connections (DC11, DC12, DC21, DC22, DC31, DC32, DC41, DC42) of the power semiconductor modules (1a, 2a, 3a, 4a) on a common e First side (5a`) of the 3-level converter half-bridge (5a) are arranged. 3-level converter half bridge (5b) with a first, a second and a third power semiconductor module (1b, 2b, 3b), each of which has a housing (61,62,63) and is arranged outside the respective housing (61,62,63) Have electrical connections, with a first, a second, a third and a fourth power semiconductor switch (T1, T2, T3, T4), each having a first and a second load connection (C, E), with a first, a second, one third, fourth, fifth, sixth, seventh and eighth diode (D1, D2, D3, D4, D5, D6, D7, D8), the first and fourth power semiconductor switches (T1, T4) and the fifth diode (D5) and the sixth diode (D6) are arranged in the housing (61) of the first power semiconductor module (1b) and a first connection (DC11) of the first power semiconductor module (1b) with the first load connection (C) of the first power semiconductor switch (T1) is electrical is conductively connected and a third connection (DC1 3) of the first power semiconductor module (1b) is electrically conductively connected to the anode of the fifth diode (D5) and the cathode of the sixth diode (D6) and the cathode of the fifth diode (D5) to the second load connection (E) of the first power semiconductor switch ( T1) and with a fourth connection (AC11) of the first power semiconductor module (1b) is electrically conductively connected, a second terminal (DC12) of the first power semiconductor module (1b) being electrically conductively connected to the second load terminal (E) of the fourth power semiconductor switch (T4) and a fifth terminal (AC12) of the first power semiconductor module (1b) being connected to the Anode of the sixth diode (D6) and to the first load terminal (C) of the fourth power semiconductor switch (T4) is electrically conductively connected, the second power semiconductor switch (T2), the third and fourth diodes (D3, D4) and the seventh diode (D7 ) are arranged in the housing (62) of the second power semiconductor module (2b) and a first connection (DC21) of the second power semiconductor module (2b) is electrically conductively connected to the anode of the fourth diode (D4) and the cathode of the fourth diode (D4) the anode of the third diode (D3) is electrically conductively connected and the cathode of the third diode (D3) is connected to the second load connection (E) of the second power semiconductor switch (T2) and with a third connection (AC21) of the second power semiconductor module (2b) is electrically conductively connected and a second connection (DC22) of the second power semiconductor module (2b) is electrically conductively connected to the anode of the seventh diode (D7) and the Cathode of the seventh diode (D7) with a fourth connection (AC22) of the second power semiconductor module (2b) and with the first load connection (C) of the second power semiconductor switch (T2) is electrically conductively connected, the third power semiconductor switch (T3), the first and second diode (D1, D2) and the eighth diode (D8) in the housing (63) of the third power semiconductor module (3b) are arranged and a first connection (DC31) of the third power semiconductor module (3a) with the cathode of the first diode (D1) electrically is conductively connected and the anode of the first diode (D1) is electrically conductively connected to the cathode of the second diode (D2) and the anode of the second diode (D2) is connected to the first Load connection (C) of the third power semiconductor switch (T3) and electrically conductively connected to a third connection (AC31) of the third power semiconductor module (3b) and a second connection (DC32) of the third power semiconductor module (3b) to the cathode of the eighth diode (D8) is electrically conductively connected and the anode of the eighth diode (D8) is electrically conductively connected to a fourth connection (AC32) of the third power semiconductor module (3b) and to the second load connection (E) of the third power semiconductor switch (T3), the second connection ( DC12) of the first power semiconductor module (1b) is electrically conductively connected to the first connection (DC21) of the second power semiconductor module (2b), the first connection (DC11) of the first power semiconductor module (1b) being connected to the first connection (DC31) of the third power semiconductor module (1b) 3b) is electrically conductively connected, the third connection (AC21) of the second power semiconductor module (2b) is electrically conductively connected to the third connection (AC31) of the third power semiconductor module (3b), the third connection (DC13) of the first power semiconductor module (1b) being connected to the second connection (DC32) of the third power semiconductor module (3b) and to the second terminal (DC22) of the second power semiconductor module (2b) is electrically conductively connected, the fifth terminal (AC12) of the first power semiconductor module (1b) being electrically conductively connected to the fourth terminal (AC32) of the third power semiconductor module (3b), the fourth Connection (AC11) of the first power semiconductor module (1b) with the fourth connection (AC22) of the second power semiconductor module (2b) is electrically conductively connected. 3-level converter half bridge (5b) Claim 4 , characterized in that a fifth connection (AUX31) of the third power semiconductor module (3b) which is electrically conductively connected to the anode of the first diode (D1) is electrically conductively connected to the fourth connection (AC22) of the second power semiconductor module (2b) and one is connected to the Anode of the third diode (D3) is electrically connected to the fifth connection (AUX21) of the second power semiconductor module (2b) and is connected to the fourth connection (AC32) of the third power semiconductor module (3b). 3-level converter half bridge (5b) Claim 4 or 5 , characterized in that the power semiconductor modules (1b, 2b, 3b) have an identical geometric external shape, the respective first and second connection (DC21, DC22, DC31, DC32) of the second and third power semiconductor module (2b, 3b) being designed as a load current connection and is arranged at a first end region (E1) of the respective second and third power semiconductor module (2b, 3b), the respective third and fourth connection (AC21, AC22, AC31, AC32) of the second and third power semiconductor module (2b, 3b) as Load current connection is formed and is arranged on a second end region (E2) of the respective second and third power semiconductor module (2b, 3b) arranged opposite the first end region (E1) of the respective second and third power semiconductor module (2b, 3b), the first, second and third connection (DC11, DC12, DC13) of the first power semiconductor module (1b) are designed as load current connections and at a second end region I (E2) of the first power semiconductor module (1b) are arranged, the fourth and fifth connection (AC11, AC12) of the first power semiconductor module (1b) being designed as load current connections and on one opposite the second end region (E2) of the first power semiconductor module (1b) arranged first end region (E1) of the first power semiconductor module (1b), the first power semiconductor module (1b) being opposite the second and third Power semiconductor module (2b, 3b) is arranged rotated by 180 °, so that the first and second connections (DC21, DC22, DC31, DC32) of the second and third power semiconductor modules (2b, 3b) and the third connection (DC13) of the first power semiconductor module ( 1b) are arranged on a common first side (5b ') of the 3-level converter half-bridge (5b). 3-level converter half bridge (5b) Claim 4 or 5 , characterized in that the second and third power semiconductor modules (2b, 3b) have an identical geometrical external shape and the first power semiconductor module (1b) has a different geometrical external shape from the second and third power semiconductor modules (2b, 3b), the respective first and the second connection (DC21, DC22, DC31, DC32) of the second and third power semiconductor modules (2b, 3b) is designed as a load current connection and is arranged on a first end region (E1) of the respective second and third power semiconductor modules (2b, 3b), the The respective third and fourth connection (AC21, AC22, AC31, AC32) of the second and third power semiconductor module (2b, 3b) is designed as a load current connection and is arranged on a side opposite the first end region (E1) of the respective second and third power semiconductor module (2b, 3b) second end region (E2) of the respective second and third power semiconductor module (2b, 3b) is arranged, wob ei, the first, second and third connection (DC11, DC12, DC13) of the first power semiconductor module (1b) are designed as load current connections and are arranged on a first end region (E1) of the first power semiconductor module (1b), the fourth and fifth connection (AC11 , AC12) of the first power semiconductor module (1b) are designed as load current connections and are arranged on a second end area (E2) of the first power semiconductor module (1b) arranged opposite the first end area (E1) of the first power semiconductor module (1b), the first and second connections (DC21, DC22, DC31, DC32) of the second and third power semiconductor module (2b, 3b) and the first, second and third connection (DC11, DC12, DC13) of the first power semiconductor module (1b) on a common first side (5b`) of the 3-level converter half-bridge (5b) are arranged. 3-level converter half bridge (5c) with a first, a second, a third and a fourth power semiconductor module (1c, 2c, 3c, 4c), each with a housing (61,62,63,64) and outside the respective housing ( 61,62,63,64) arranged electrical connections, with a first, a second, a third and a fourth power semiconductor switch (T1, T2, T3, T4), each having a first and a second load connection (C, E) , With a first, a second, a third, a fourth, a fifth and a sixth diode (D1, D2, D3, D4, D5, D6), the first power semiconductor switch (T1) and the fifth diode (D5) in the housing (61) of the first power semiconductor module (1c) are arranged and a first connection (DC11) of the first power semiconductor module (1c) is electrically conductively connected to the first load connection (C) of the first power semiconductor switch (T1) and a second connection (DC12) of the first Power semiconductor module (1c) with the Anode of the fifth diode (D5) is electrically conductively connected and the cathode of the fifth diode (D5) is electrically conductively connected to the second load connection (E) of the first power semiconductor switch (T1) and to a third connection (AC11) of the first power semiconductor module (1c) The second power semiconductor switch (T2) and the third and fourth diodes (D3, D4) are arranged in the housing (62) of the second power semiconductor module (2c) and a first connection (DC21) of the second power semiconductor module (2c) with the anode of the fourth diode (D4) is electrically conductively connected and the cathode of the fourth diode (D4) is electrically conductively connected to the anode of the third diode (D3) and the cathode of the third diode (D3) is connected to the second load terminal (E) of the second power semiconductor switch (T2) and with a second connection (AC21) of the second power semiconductor module (2c) is electrically conductively connected and a third connection (AC22) of the second power The semiconductor module (2c) is electrically conductively connected to the first load connection (C) of the second power semiconductor switch (T2), the third power semiconductor switch (T3) and the first and second diodes (D1, D2) in the housing (63) of the third power semiconductor module (3c ) are arranged and a first connection (DC31) of the third power semiconductor module (3c) is electrically conductively connected to the cathode of the first diode (D1) and the anode of the first diode (D1) is electrically conductively connected to the cathode of the second diode (D2) and the anode of the second diode (D2) is electrically conductively connected to the first load connection (C) of the third power semiconductor switch (T3) and to a second connection (AC31) of the third power semiconductor module (3c) and a third connection (AC32) of the third Power semiconductor module (3c) is electrically conductively connected to the second load connection (E) of the third power semiconductor switch (T3), the fourth power semiconductor switch (T4) and the sixth diode (D6) in the housing (64) of the fourth power semiconductor module (4c) and a first connection (DC41) of the fourth power semiconductor module (4c) with the second load connection (E) of the fourth power semiconductor switch (T4) is electrically conductively connected and a second terminal (DC42) of the fourth power semiconductor module (4c) is electrically conductively connected to the cathode of the sixth diode (D6) and the anode of the sixth diode (D6) with the first load connection (C) of the fourth power semiconductor switch (T4) and with a third connection (AC41) of the fourth power semiconductor module (4c) is electrically conductively connected, the second connection (DC12) of the first power semiconductor module (1c) is electrically conductively connected to the second connection (DC42) of the fourth power semiconductor module (4c), the first connection (DC11) of the first power semiconductor module (1c) being electrically conductively connected to the first connection (DC31) of the third power semiconductor module (3c), wherein the second connection (AC21) of the second power semiconductor module (2c) is electrically conductively connected to the second connection (AC31) of the third power semiconductor module (3c), the third connection (AC41) of the fourth power semiconductor module (4c) being connected to the third connection (AC32) of the third power semiconductor module (3c) is electrically conductively connected, the third connection (AC11) of the first th power semiconductor module (1c) is electrically conductively connected to the third connection (AC22) of the second power semiconductor module (2c), the first connection (DC41) of the fourth power semiconductor module (4c) being electrically connected to the first connection (DC21) of the second power semiconductor module (2c) is conductively connected. 3-level converter half bridge (5c) Claim 8 , characterized in that a fourth terminal (AUX31) of the third power semiconductor module (3c) which is electrically conductively connected to the anode of the first diode (D1) is electrically conductively connected to the third terminal (AC22) of the second power semiconductor module (2c) and one is connected to the Anode of the third diode (D3) fourth connection (AUX21) of the second power semiconductor module (2c) which is electrically conductively connected to the third connection (AC32) of the third power semiconductor module (3c) is electrically conductively connected. 3-level converter half bridge (5c) Claim 8 or 9 , characterized in that the power semiconductor modules (1c, 2c, 3c, 4c) have an identical geometric external shape, the respective first, second and third connection (DC11, DC12, AC11, DC21, AC21, AC22, DC31, AC31, AC32 , DC41, DC42, AC41) of the power semiconductor modules (1c, 2c, 3c, 4c) is designed as a load current connection, the first, second and third connection (DC11, DC12, AC11, DC21, AC21, AC22, DC31, AC31, AC32, DC41, DC42, AC41) of the respective power semiconductor module (1c, 2c, 3c, 4c) are arranged in a row on the top of the respective power semiconductor module (1c, 2c, 3c, 4c). 3-level converter half bridge (5c) Claim 8 or 9 , characterized in that the power semiconductor modules (1c, 2c, 3c, 4c) have an identical geometric external shape, the first and second connection (DC11, DC12) of the first power semiconductor module (1c), the first connection (DC21) of the second power semiconductor module (2c), the first connection (DC31) of the third power semiconductor module (3c) and the first and second connection (DC41, DC42) of the fourth power semiconductor module (4c) are designed as load current connections and are connected to a first end region (E1) of the power semiconductor modules (1c, 2c, 3c, 4c) and are arranged on a common first side (5c`) of the 3-level converter half-bridge (5c), the respective second connection (AC21, AC31) of the second and third power semiconductor modules (2c, 3c) is designed as a load current connection and is arranged on a second end region (E2) of the second which is arranged opposite the first end region (E1) of the second and third power semiconductor modules (2c, 3c) and third power semiconductor module (2c, 3c) is arranged. 3-level converter half bridge (5d) with a first, a second and a third power semiconductor module (1d, 2d, 3d), each of which has a housing (61,62,63) and is arranged outside the respective housing (61,62,63) Have electrical connections, with a first, a second, a third and a fourth power semiconductor switch (T1, T2, T3, T4), each having a first and a second load connection (C, E), with a first, a second, one third, fourth, fifth and sixth diodes (D1, D2, D3, D4, D5, D6), the first and fourth power semiconductor switches (T1, T4), the fifth diode (D5) and the sixth diode (D6) are arranged in the housing (61) of the first power semiconductor module (1d) and a first connection (DC11) of the first power semiconductor module (1d) is electrically conductively connected to the first load connection (C) of the first power semiconductor switch (T1) and a third connection (DC13) of the first power semiconductor module s (1b) with the anode of the fifth diode (D5) and the cathode of the sixth diode (D6) is electrically conductively connected and the cathode of the fifth diode (D5) with the second load terminal (E) of the first power semiconductor switch (T1) and with a fourth terminal (AC11) of the first power semiconductor module (1b) is electrically conductively connected, a second terminal (DC12) of the first power semiconductor module (1d) being electrically conductively connected to the second load terminal (E) of the fourth power semiconductor switch (T4) and a fifth Connection (AC12) of the first power semiconductor module (1d) with the anode of the sixth diode (D6) and with the first load connection (C) of the fourth power semiconductor switch (T4) is electrically conductively connected, the second power semiconductor switch (T2), the third and fourth Diode (D3, D4) in the housing (62) of the second power semiconductor module (2d) are arranged and a first connection (DC21) of the second power semiconductor module (2d) is electrically conductively connected to the anode of the fourth diode (D4) and the cathode of the fourth diode (D4) is electrically conductively connected to the anode of the third diode (D3) and the cathode of the third diode (D3) the second load connection (E) of the second power semiconductor switch (T2) and with a second connection (AC21) of the second power semiconductor module (2d) is electrically conductively connected and a third connection (AC22) of the second power semiconductor module (2d) with the first load connection (C) of the second power semiconductor switch (T2) is electrically conductively connected, the third power semiconductor switch (T3) and the first and second diodes (D1, D2) being arranged in the housing (63) of the third power semiconductor module (3d) and a first connection (DC31) of the third power semiconductor module (3d) is electrically conductively connected to the cathode of the first diode (D1) and the anode of the first diode (D1) to the catho de the second diode (D2) is electrically conductively connected and the anode of the second diode (D2) is electrically conductively connected to the first load connection (C) of the third power semiconductor switch (T3) and to a second connection (AC31) of the third power semiconductor module (3d) and a third connection (AC32) of the third power semiconductor module (3d) is electrically conductively connected to the second load connection (E) of the third power semiconductor switch (T3), the second connection (DC12) of the first power semiconductor module (1d) being connected to the first connection ( DC21) of the second power semiconductor module (2d) is electrically conductively connected, the first connection (DC11) of the first power semiconductor module (1d) being electrically conductively connected to the first connection (DC31) of the third power semiconductor module (3d), the second connection (AC21 ) of the second power semiconductor module (2d) with the second connection (AC31) of the third power semiconductor module (3d ) is electrically conductively connected, the fifth connection (AC12) of the first power semiconductor module (1d) being electrically conductively connected to the third connection (AC32) of the third power semiconductor module (3d), the fourth connection (AC11) of the first power semiconductor module (1d) is electrically conductively connected to the third connection (AC22) of the second power semiconductor module (2d). 3-level converter half bridge (5d) after Claim 12 , characterized in that a fourth connection (AUX31) of the third power semiconductor module (3d) which is electrically conductively connected to the anode of the first diode (D1) is electrically conductively connected to the third connection (AC22) of the second power semiconductor module (2d) and one is connected to the Anode of the third diode (D3) fourth connection (AUX21) of the second power semiconductor module (2d) which is electrically conductively connected to the third connection (AC32) of the third power semiconductor module (3d) is electrically conductively connected. 3-level converter half bridge (5d) after Claim 12 or 13 , characterized in that the power semiconductor modules (1d, 2d, 3d) have an identical geometric outer shape, the respective first connection (DC21, DC31) of the second and third power semiconductor modules (2d, 3d) being designed as a load current connection and at a first end region (E1) of the respective second and third power semiconductor module (2d, 3d) is arranged, the respective second connection (AC21, AC31) of the second and third power semiconductor module (2d, 3d) being designed as a load current connection and at one of the first end regions (E1) of the respective second and third power semiconductor modules (2d, 3d) the second and third power semiconductor modules (2d, 3d) are arranged opposite one another, the first, second and third connection (DC11, DC12, DC13) of the first power semiconductor module (1d) being designed as load current connections and on a second End area (E2) of the first power semiconductor module (1d) are arranged, the fourth and fifth connection (AC11, AC12) of the first power semiconductor module (1d) being designed as load current connections and opposite one of the second end area (E2) of the first power semiconductor module (1d) arranged first end region (E1) of the first power semiconductor module (1d), the first power semiconductor module (1d) being arranged rotated by 180 ° with respect to the second and third power semiconductor modules (2d, 3d), so that the respective first connection (DC21, DC31 ) of the second and third power semiconductor module (2d, 3d) and the third connection (DC13) of the first th power semiconductor module (1d) are arranged on a common first side (5d ') of the 3-level converter half-bridge (5d). 3-level converter half bridge (5d) after Claim 12 or 13 , characterized in that the second and third power semiconductor modules (2d, 3d) have an identical geometrical outer shape and the first power semiconductor module (1d) has a different geometrical outer shape from the second and third power semiconductor modules (2d, 3d), the respective first Connection (DC21, DC31) of the second and third power semiconductor module (2d, 3d) is designed as a load current connection and is arranged on a first end region (E1) of the respective second and third power semiconductor module (2d, 3d), the respective second connection (AC21, AC31) of the second and third power semiconductor module (2d, 3d) is designed as a load current connection and is arranged on a second end area (E2) of the respective second and third power semiconductor module (2d, 3d) opposite the first end area (E1) of the respective second and third power semiconductor module (2d, 3d) 2d, 3d) is arranged, the first, second and third connection (DC11, DC12, DC13) of the first power semiconductor module (1d) are designed as load current connections and are arranged on a first end region (E1) of the first power semiconductor module (1d), the fourth and fifth connection (AC11, AC12) of the first power semiconductor module (1d ) are designed as load current connections and are arranged on a second end region (E2) of the first power semiconductor module (1d) arranged opposite the first end region (E1) of the first power semiconductor module (1d), the respective first connection (DC21, DC31) of the second and third Power semiconductor module (2d, 3d) and the third connection (DC13) of the first power semiconductor module (1d) are arranged on a common first side (5d ') of the 3-level converter half bridge (5d).

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