DE102019105744A1 - Semiconductor device - Google Patents
Semiconductor device Download PDFInfo
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- DE102019105744A1 DE102019105744A1 DE102019105744.2A DE102019105744A DE102019105744A1 DE 102019105744 A1 DE102019105744 A1 DE 102019105744A1 DE 102019105744 A DE102019105744 A DE 102019105744A DE 102019105744 A1 DE102019105744 A1 DE 102019105744A1
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 91
- 239000012535 impurity Substances 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 26
- 210000000746 body region Anatomy 0.000 claims abstract description 20
- 239000010410 layer Substances 0.000 description 66
- 230000004888 barrier function Effects 0.000 description 31
- 238000009413 insulation Methods 0.000 description 16
- 239000011229 interlayer Substances 0.000 description 2
- 238000000034 method Methods 0.000 description 2
- BUHVIAUBTBOHAG-FOYDDCNASA-N (2r,3r,4s,5r)-2-[6-[[2-(3,5-dimethoxyphenyl)-2-(2-methylphenyl)ethyl]amino]purin-9-yl]-5-(hydroxymethyl)oxolane-3,4-diol Chemical compound COC1=CC(OC)=CC(C(CNC=2C=3N=CN(C=3N=CN=2)[C@H]2[C@@H]([C@H](O)[C@@H](CO)O2)O)C=2C(=CC=CC=2)C)=C1 BUHVIAUBTBOHAG-FOYDDCNASA-N 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 230000001629 suppression Effects 0.000 description 1
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Abstract
Eine Halbleitervorrichtung kann ein Halbleitersubstrat umfassen, das mit einem IGBT-Bereich und einem Diodenbereich versehen ist. Das Halbleitersubstrat kann n-Typ-Emitter-Gebiete, die in dem IGBT-Bereich bereitgestellt sind, ein p-Typ-Body-Gebiet, das in dem IGBT-Bereich bereitgestellt ist, ein p-Typ-Anodengebiet, das in dem Diodenbereich bereitgestellt ist, und ein n-Typ-Drift-Gebiet, das über den IGBT-Bereich und den Diodenbereich bereitgestellt ist, umfassen. Das Drift-Gebiet kann in einem Grenz-Zwischengraben-Halbleitergebiet, das an einer Stelle am nächsten zum Diodenbereich angeordnet ist, eine Hochkonzentrationsschicht umfassen. Eine n-Typ-Verunreinigungskonzentration in der Hochkonzentrationsschicht kann höher als die n-Typ-Verunreinigungskonzentration in dem Drift-Gebiet unter der Hochkonzentrationsschicht sein.A semiconductor device may include a semiconductor substrate provided with an IGBT region and a diode region. The semiconductor substrate may include n-type emitter regions provided in the IGBT region, a p-type body region provided in the IGBT region, a p-type anode region provided in the diode region and an n-type drift region provided across the IGBT region and the diode region. The drift region may comprise a high concentration layer in a boundary inter-trench semiconductor region located at a location closest to the diode region. An n-type impurity concentration in the high concentration layer may be higher than the n-type impurity concentration in the drift region below the high concentration layer.
Description
QUERVERWEISCROSS REFERENCE
Diese Anmeldung beansprucht die Priorität der am 08. März 2018 eingereichten japanischen Patentanmeldung mit der Nummer
TECHNISCHES GEBIET DER ERFINDUNGTECHNICAL FIELD OF THE INVENTION
Die hier offenbarte Technik betrifft eine Halbleitervorrichtung.The technique disclosed herein relates to a semiconductor device.
HINTERGRUNDBACKGROUND
Die japanische Patentoffenlegungsschrift mit der Nummer 2012-054403 beschreibt eine Halbleitervorrichtung, die mit einem IGBT (Bipolartransistor mit isolierter Gate-Elektrode) und einer Diode ausgestattet ist. Diese Halbleitervorrichtung umfasst ein Emitter-Gebiet des IGBT, ein Body-Gebiet des IGBT, und ein Anodengebiet der an eine obere Elektrode angeschlossenen Diode. Ferner sind ein Kollektorgebiet des IGBT und ein Kathodengebiet der Diode an eine untere Elektrode angeschlossen. Ein Drift-Gebiet ist über einen IGBT-Bereich und einen Diodenbereich bereitgestellt. Das Drift-Gebiet ist zwischen dem Body-Gebiet und dem Kollektorgebiet in dem IGBT-Bereich bereitgestellt und ist zwischen dem Anodengebiet und dem Kathodengebiet in dem Diodenbereich angeordnet.Japanese Laid-Open Patent Publication No. 2012-054403 discloses a semiconductor device equipped with an IGBT (Insulated Gate Bipolar Transistor) and a diode. This semiconductor device includes an emitter region of the IGBT, a body region of the IGBT, and an anode region of the diode connected to an upper electrode. Further, a collector region of the IGBT and a cathode region of the diode are connected to a lower electrode. A drift region is provided across an IGBT region and a diode region. The drift region is provided between the body region and the collector region in the IGBT region and is disposed between the anode region and the cathode region in the diode region.
ZUSAMMENFASSUNGSUMMARY
Bei der Halbleitervorrichtung gemäß der japanischen Patentoffenlegungsschrift mit der Nummer 2012-054403, wird die Diode eingeschaltet, wenn ein Potenzial an die obere Elektrode angelegt wird, das höher als das der unteren Elektrode ist. Das heißt, ein Strom fließt von dem Anodengebiet durch das Drift-Gebiet zu dem Kathodengebiet. Weil das Body-Gebiet an die obere Elektrode angeschlossen ist, wird bei dieser Gelegenheit eine Durchlassspannung an einen pn-Übergang an einer Grenzfläche zwischen dem Body-Gebiet und dem Drift-Gebiet angelegt. Als Folge davon fließen Löcher von dem Body-Gebiet durch das Drift-Gebiet zu dem Kathodengebiet. Das heißt, die Löcher fließen in eine Grenze zwischen dem Diodenbereich und dem IGBT-Bereich. Wenn gemäß Obigem die Löcher in die Grenze fließen, gibt es das Problem, dass eine Durchlassspannung zum Einschalten der Diode nicht stabilisiert ist. Die hier vorliegende Offenbarung schlägt eine Technik zum Unterdrücken des Fließens von Löchern in eine Grenze zwischen einem Diodenbereich und einem IGBT-Bereich vor.In the semiconductor device disclosed in Japanese Patent Laid-Open No. 2012-054403, the diode is turned on when a potential higher than that of the lower electrode is applied to the upper electrode. That is, a current flows from the anode region through the drift region to the cathode region. On this occasion, because the body region is connected to the upper electrode, a forward voltage is applied to a pn junction at an interface between the body region and the drift region. As a result, holes from the body region flow through the drift region to the cathode region. That is, the holes flow into a boundary between the diode region and the IGBT region. According to the above, when the holes flow into the boundary, there is the problem that a forward voltage for turning on the diode is not stabilized. The present disclosure proposes a technique for suppressing the flow of holes in a boundary between a diode region and an IGBT region.
Eine hierin offenbarte Halbleitervorrichtung kann einen IGBT (Bipolartransistor mit isolierter Gate-Elektrode) und eine Diode umfassen. Diese Halbleitervorrichtung kann ein Halbleitersubstrat; eine obere Elektrode, die eine obere Fläche des Halbleitersubstrats bedeckt; und eine untere Elektrode, die eine untere Fläche des Halbleitersubstrats bedeckt, umfassen. Das Halbleitersubstrat kann einen IGBT-Bereich, in dem ein p-Typ-Kollektorgebiet an einer Position in direktem Kontakt mit der unteren Elektrode bereitgestellt ist; und einen Diodenbereich, in dem ein n-Typ-Kathodengebiet an einer Position in direkten Kontakt mit der unteren Elektrode bereitgestellt ist, umfassen. Eine Vielzahl von Gräben kann in der oberen Fläche des Halbleitersubstrats in dem IGBT-Bereich bereitgestellt sein. Gate-Isolationsfilme und Gate-Elektroden, die durch die Gate-Isolationsfilme von dem Halbleitersubstrat isoliert sind, können in den jeweiligen Gräben bereitgestellt sein. Das Halbleitersubstrat kann ferner umfassen: In dem IGBT-Bereich bereitgestellte n-Typ-Emitter-Gebiete, die in direktem Kontakt mit der oberen Elektrode sind, und die in direktem Kontakt mit den Gate-Isolationsfilmen sind; ein in dem IGBT-Bereich bereitgestelltes p-Typ-Body-Gebiet, das in direktem Kontakt mit der oberen Elektrode ist, und das unter den Emitter-Gebieten in direktem Kontakt mit den Gate-Isolationsfilmen ist; ein p-Typ-Anodengebiet, das in dem Diodenbereich bereitgestellt ist und das in direktem Kontakt mit der oberen Elektrode ist; und ein über den IGBT-Bereich und den Diodenbereich bereitgestelltes n-Typ-Drift-Gebiet, das in dem IGBT-Bereich unter dem Body-Gebiet und über dem Kollektorgebiet bereitgestellt ist, in dem Diodenbereich unter dem Anodengebiet und über dem Kathodengebiet bereitgestellt ist, in direktem Kontakt mit den Gate-Isolationsfilmen unter dem Body-Gebiet ist, und eine n-Typ-Verunreinigungskonzentration umfasst, die geringer als eine n-Typ-Verunreinigungskonzentration des Kathodengebiets ist. Jedes der Halbleitergebiete, das über unteren Enden der Gräben platziert ist und zwischen jeweiligen Paaren der Gräben eingefügt ist, kann als ein Zwischengraben-Halbleitergebiet definiert werden. Eines der Zwischengraben-Halbleitergebiete, das an einer Stelle am nächsten zu dem Diodenbereich positioniert ist, kann als ein Grenz-Zwischengraben-Halbleitergebiet definiert werden. Das Drift-Gebiet in dem Grenz-Zwischengraben-Halbleitergebiet kann eine Hochkonzentrationsschicht umfassen. Eine n-Typ-Verunreinigungskonzentration in der Hochkonzentrationsschicht kann höher als die n-Typ-Verunreinigungskonzentration in dem Drift-Gebiet unter der Hochkonzentrationsschicht sein.A semiconductor device disclosed herein may include an IGBT (Insulated Gate Bipolar Transistor) and a diode. This semiconductor device may be a semiconductor substrate; an upper electrode covering an upper surface of the semiconductor substrate; and a lower electrode covering a lower surface of the semiconductor substrate. The semiconductor substrate may include an IGBT region in which a p-type collector region is provided at a position in direct contact with the lower electrode; and a diode region in which an n-type cathode region is provided at a position in direct contact with the lower electrode. A plurality of trenches may be provided in the upper surface of the semiconductor substrate in the IGBT region. Gate insulating films and gate electrodes insulated from the semiconductor substrate by the gate insulating films may be provided in the respective trenches. The semiconductor substrate may further include: n-type emitter regions provided in the IGBT region in direct contact with the upper electrode and in direct contact with the gate insulating films; a p-type body region provided in the IGBT region, which is in direct contact with the upper electrode, and which is in direct contact with the gate insulating films among the emitter regions; a p-type anode region provided in the diode region and in direct contact with the upper electrode; and an n-type drift region provided over the IGBT region and the diode region, provided in the IGBT region under the body region and above the collector region, in the diode region below the anode region and above the cathode region, is in direct contact with the gate insulating films under the body region, and includes an n-type impurity concentration that is less than an n-type impurity concentration of the cathode region. Each of the semiconductor regions, which is placed over lower ends of the trenches and interposed between respective pairs of the trenches, may be defined as an inter-trench semiconductor region. One of the inter-trench semiconductor regions positioned at a location closest to the diode region may be defined as a boundary inter-trench semiconductor region. The drift region in the boundary inter-trench semiconductor region may comprise a high concentration layer. An n-type impurity concentration in the high concentration layer may be higher than the n-type impurity concentration in the drift region below the high concentration layer.
Die Hochkonzentrationsschicht kann nur in dem Grenz-Zwischengraben-Halbleitergebiet bereitgestellt sein, kann in der Vielzahl von Zwischengraben-Halbleitergebieten, die das Grenz-Zwischengraben-Halbleitergebiet umfassen, bereitgestellt sein oder kann in allen Zwischengraben-Halbleitergebieten in dem IGBT-Bereich bereitgestellt sein.The high concentration layer may be provided only in the boundary inter-trench semiconductor region, may be provided in the plurality of inter-trench semiconductor regions including the boundary inter-trench semiconductor region or may be provided in all inter-trench semiconductor regions in the IGBT region.
In dieser Halbleitervorrichtung umfasst das Drift-Gebiet in dem Grenz-Zwischengraben-Halbleitergebiet die Hochkonzentrationsschicht, die die hohe n-Typ-Verunreinigungskonzentration aufweist. Dadurch fungiert die Hochkonzentrationsschicht als eine Barriere, um ein Fließen von Löchern zu unterdrücken. Wenn die Diode eingeschaltet wird, ist es in dieser Halbleitervorrichtung somit weniger wahrscheinlich, dass Löcher in eine Grenze zwischen dem Diodenbereich und dem IGBT-Bereich fließen.In this semiconductor device, the drift region in the boundary inter-trench semiconductor region includes the high-concentration layer having the high n-type impurity concentration. As a result, the high concentration layer functions as a barrier to suppress the flow of holes. Thus, when the diode is turned on, holes are less likely to flow into a boundary between the diode region and the IGBT region in this semiconductor device.
Figurenlistelist of figures
-
1 ist eine Querschnittsansicht einer Halbleitervorrichtung eines Ausfü h ru ngsbeispiels.1 FIG. 10 is a cross-sectional view of a semiconductor device of an embodiment. FIG.
DETAILLIERTE BESCHREIBUNGDETAILED DESCRIPTION
Eine Halbleitervorrichtung
Ein p-Typ-Kollektorgebiet 32 und ein n-Typ-Kathodengebiet 39 sind in dem Halbleitersubstrat
Eine Vielzahl von Gräben
Eine innere Fläche von jedem Graben
Jedes der Zwischengraben-Halbleitergebiete
Die Emitter-Gebiete
Die Body-Kontaktgebiete
Das obere Body-Gebiet
Das Barriere-Gebiet
Das untere Body-Gebiet
Jedes der Zwischengraben-Halbleitergebiete
Die Anodenkontaktgebiete
Das obere Anodengebiet
Das Barriere-Gebiet
Das untere Anodengebiet
Ein Drift-Gebiet
Das Drift-Gebiet
Die Floating-Schicht
Die obere Schicht
Die Primärschicht
Das Buffer-Gebiet
Der IGBT-Bereich
Der Diodenbereich
Der IGBT-Bereich
Der Diodenbereich
Ein Betrieb des IGBT in dem IGBT-Bereich
Ein Betrieb der Diode in dem Diodenbereich
Eine Struktur von jedem Zwischengraben-Halbleitergebiet
Wie oben erwähnt, ist die Floating-Schicht
In dem oben beschriebenen Ausführungsbeispiel erstreckt sich die Floating-Schicht
In dem oben beschriebenen Ausführungsbeispiel ist die obere Schicht
In dem oben beschriebenen Ausführungsbeispiel ist das obere Body-Gebiet
In dem oben beschriebenen Ausführungsbeispiel ist das obere Anodengebiet
In dem oben beschriebenen Ausführungsbeispiel ist die Floating-Schicht
Die Floating-Schicht
Einige der hierin offenbarten technischen Elemente werden im Folgenden aufgelistet. Es gilt zu beachten, dass die respektiven technischen Elemente voneinander unabhängig sind und einzeln sowie in Kombination nützlich sind.Some of the technical elements disclosed herein are listed below. It should be noted that the respective technical elements are independent of each other and are useful individually and in combination.
In einem Beispiel einer hierin offenbarten Halbleitervorrichtung, kann die Hochkonzentrationsschicht in direktem Kontakt mit jedem der Gate-Isolationsfilme sein, die an beiden Seiten des Grenz-Zwischengraben-Halbleitergebiets angeordnet sind.In one example of a semiconductor device disclosed herein, the high concentration layer may be in direct contact with each of the gate insulating films disposed on both sides of the boundary inter-trench semiconductor region.
Gemäß dieser Konfiguration kann das Fließen der Löcher an der Grenze des Diodenbereichs und des IGBT-Bereichs effektiver unterdrückt werden.According to this configuration, the flow of the holes at the boundary of the diode region and the IGBT region can be suppressed more effectively.
In einem Beispiel einer hierin offenbarten Halbleitervorrichtung, kann das Drift-Gebiet eine obere Schicht umfassen, die zwischen der Hochkonzentrationsschicht und dem Body-Gebiet bereitgestellt ist, und eine n-Typ-Verunreinigungskonzentration umfassen, die geringer als die n-Typ-Verunreinigungskonzentration in der Hochkonzentrationsschicht ist.In one example of a semiconductor device disclosed herein, the drift region may include a upper layer provided between the high concentration layer and the body region, and include an n-type impurity concentration that is lower than the n-type impurity concentration in the high concentration layer.
Gemäß dieser Konfiguration kann das IGBT davon abgehalten werden unbeabsichtigt eingeschaltet zu werden.According to this configuration, the IGBT can be prevented from being inadvertently turned on.
Während spezifische Beispiele der vorliegenden Erfindung oben im Detail beschrieben wurden, sind diese Beispiele lediglich illustrativ und stellen keine Begrenzungen des Schutzbereichs der Patentansprüche dar. Die in den Patentansprüchen beschriebene Technologie umfasst auch verschiedene Änderungen und Modifikationen der oben beschriebenen Beispiele. Die technischen Beispiele, die in der vorliegenden Beschreibung oder Zeichnungen erklärt sind, stellen einen technischen Nutzen dar, entweder unabhängig oder durch verschiedene Kombinationen. Die vorliegende Erfindung ist nicht auf die Kombinationen beschränkt, die zu dem Zeitpunkt des Einreichens der Ansprüche beschrieben sind. Der Zweck der durch die vorliegende Beschreibung oder Zeichnungen veranschaulichten Beispiele ist ferner, mehrere Aufgaben gleichzeitig zu erfüllen, und das Erfüllen einer dieser Aufgaben gibt der vorliegenden Erfindung einen technischen Nutzen.While specific examples of the present invention have been described above in detail, these examples are merely illustrative and do not constitute limitations on the scope of the claims. The technology described in the claims also encompasses various changes and modifications to the examples described above. The technical examples explained in the present specification or drawings represent a technical benefit, either independently or through various combinations. The present invention is not limited to the combinations described at the time of filing the claims. The purpose of the examples illustrated by the present specification or drawings is further to accomplish a plurality of tasks simultaneously, and the fulfillment of any of these objects provides the present invention with a technical benefit.
Eine Halbleitervorrichtung kann ein Halbleitersubstrat umfassen, das mit einem IGBT-Bereich und einem Diodenbereich versehen ist. Das Halbleitersubstrat kann n-Typ-Emitter-Gebiete, die in dem IGBT-Bereich bereitgestellt sind, ein p-Typ-Body-Gebiet, das in dem IGBT-Bereich bereitgestellt ist, ein p-Typ-Anodengebiet, das in dem Diodenbereich bereitgestellt ist, und ein n-Typ-Drift-Gebiet, das über den IGBT-Bereich und den Diodenbereich bereitgestellt ist, umfassen. Das Drift-Gebiet kann in einem Grenz-Zwischengraben-Halbleitergebiet, das an einer Stelle am nächsten zum Diodenbereich angeordnet ist, eine Hochkonzentrationsschicht umfassen. Eine n-Typ-Verunreinigungskonzentration in der Hochkonzentrationsschicht kann höher als die n-Typ-Verunreinigungskonzentration in dem Drift-Gebiet unter der Hochkonzentrationsschicht sein.A semiconductor device may include a semiconductor substrate provided with an IGBT region and a diode region. The semiconductor substrate may include n-type emitter regions provided in the IGBT region, a p-type body region provided in the IGBT region, a p-type anode region provided in the diode region and an n-type drift region provided across the IGBT region and the diode region. The drift region may comprise a high concentration layer in a boundary inter-trench semiconductor region located at a location closest to the diode region. An n-type impurity concentration in the high concentration layer may be higher than the n-type impurity concentration in the drift region below the high concentration layer.
ZITATE ENTHALTEN IN DER BESCHREIBUNG QUOTES INCLUDE IN THE DESCRIPTION
Diese Liste der vom Anmelder aufgeführten Dokumente wurde automatisiert erzeugt und ist ausschließlich zur besseren Information des Lesers aufgenommen. Die Liste ist nicht Bestandteil der deutschen Patent- bzw. Gebrauchsmusteranmeldung. Das DPMA übernimmt keinerlei Haftung für etwaige Fehler oder Auslassungen.This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.
Zitierte PatentliteraturCited patent literature
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