DE102018112847A1 - Multiplexer circuit with improved isolation and multiplexer device - Google Patents

Abstract

A multiplexer circuit with improved isolation is provided. The multiplexer circuit comprises a first port, a second port and a common port. Furthermore, the multiplexer circuit comprises a first, a second, a third and a fourth branch and a corresponding filter in each branch. The third branch and the fourth branch provide a leak signal path for a leak signal having a phase difference as compared to a leakage signal through the first and second filters.

Description

The present invention relates to multiplexer circuits, e.g. Front-end circuits of mobile communication devices, with improved isolation and corresponding multiplexer components.

In wireless communication systems, filters are needed to select desired RF signals over unwanted RF signals. In particular, diplexers or duplexers are used to selectively pass receive and transmit signals in the correct signal paths, and in particular to separate a receive signal path from high-power RF signals of a transmit signal path.

A multiplexer is generally a device having at least three ports, one of the ports being connected to all other two (or more) ports via frequency selective circuits (ie, filters) and the transfer functions of the filters with respect to the location of the frequency of their passbands and attenuation maxima of each other are different.

The degree of isolation of a multiplexer is characterized by the amount of RF power that is leaking from one port to another port, with neither port being the common port.

A high degree of isolation can be obtained by arranging a plurality of filter elements in a transmission filter or in a reception filter. However, such a high degree of cascading also increases the insertion loss in a corresponding passband.

Furthermore, the use of envelope tracking on the power amplifier side of a transmit port increases the noise level, which also generates unwanted signals in a receive frequency band that can not be removed by a receive filter.

Furthermore, isolation requirements are stringent and can be even more stringent with other specifications.

What is desired is thus a multiplexer with an improved degree of isolation, i. sufficient isolation between a send port and a receive port. Furthermore, the multiplexer should have high attenuation of strong transmit signals at a receive port, and noise on the transmit side falling in receive signal frequencies should be attenuated.

In addition, a corresponding multiplexer should be able to support sufficient isolation between two frequency ranges that are close in frequency, eg, bands 66 and 40 with a narrow guard band with a width of only 100 MHz in between.

Furthermore, the isolation / insertion loss ratio should be good.

Finally, the multiplexer should have improved robustness over antenna port impedance mismatching.

Duplexers with a good degree of isolation are off US 9,240,622 known. However, such duplexers require multiple circuit components.

Thus, what is desired is a multiplexer that is compatible with stringent isolation requirements using an envelope tracking power amplifier and that should be manufacturable with low production cost and small physical dimensions.

For this purpose, a multiplexer according to the independent claim is provided. Dependent claims provide preferred embodiments.

A corresponding multiplexer circuit with improved isolation comprises a first port, a second port, a common port (third port), and a termination or load port (fourth port). Furthermore, the multiplexer circuit comprises a first branch between the first port and the common port and a second branch between the common port and the second port. Furthermore, the multiplexer circuit has a third branch, which is electrically connected between the first port and the final port. Furthermore, the multiplexer circuit has a fourth branch between the termination port and the second port.

In addition, the multiplexer circuit has a first filter, a second filter, a third filter and a fourth filter. The first filter is switched to the first branch. The second filter is switched to the second branch. The third filter is switched to the third branch. The fourth filter is switched to the fourth branch. The third branch and the fourth branch provide a defined leaky signal path for a leaky signal which has a phase difference as compared to a leaking signal through the first and second filters.

Thus, a multiplexer circuit is provided, in which - with respect to the first port and the second port. The first and second branches form the Main path of Port 1 to the common port and from the common port to port 2 , The third and fourth branches form the leak path of Port 1 to the completion or load port and from the completion or load port to port 2 ,

The two muxing functions, the first consisting of the first and second branches and the common port, and the second multiplying function consisting of the third and fourth branches and the terminating port, are with respect to the ports 1 and 2 connected in parallel. Two three ports are relative to port 1 and port 2 connected in parallel.

A node common to the third branch and the fourth branch may be electrically coupled to a defined termination, preferably identical to the load on the common port between the first and second branches.

The first filter and the second filter may provide a first diplexer or a first duplexer. The third filter and the fourth filter may provide a second diplexer or a second duplexer.

Additional circuit elements, for example for the impedance matching, may be electrically connected to the first and the second filter or to the third and to the fourth filter. In addition, additional circuit elements can be connected to all four ports (port 1 , Port 2 , common port or ANT port and termination or load port).

The common port may be connected to an antenna or circuit located between the antenna and the common port.

The first port can be a send port. The second port can be a receive port.

In general, the first port sends signals to or from the common port at frequencies other than the second port to or from the common port.

If the multiplexer is a diplexer, port one could be connected to a low pass filter and port two could be connected to a high pass filter, in case of a duplexer port one might be a Tx filter (which would have the passband on a frequency other than Rx) port 2 would be connected to an Rx filter (with a passband on a frequency other than Tx). In general, the circuit can also be understood as a device having a transfer function from port one to the common port, from the common port to the port 2 and a minimized transfer function of port 1 to port 2 allowed by means of the circuit consisting of branch three and four. The final port can be made adjustable to minimize the transfer function between port 1 and port 2 contribute.

It is possible, but not necessarily required, that this signal transfer be realized by transmit and receive signals.

Such a multiplexer circuit can be obtained by receiving transmission signals from an external circuit environment, e.g. from a power amplifier. The transmit signals are routed via the first branch and via the first filter to the common port. Furthermore, receiving signals can be received from the common port and passed via the second filter and via the second branch to the second port.

In general, the degree of isolation of the multiplexer circuit is characterized by the degree of isolation between the first port and the second port, i. Leak signals propagating from the first port over the first branch and over the second branch to the second port reduce the isolation level of the multiplexer circuit.

The leak can only be a transfer signal coming from port 1 to port 2 goes, but also vice versa. In the case of a bidirectional diplexer, RX (Receive) signals and TX (Transmit) signals go in equal and opposite directions.

However, in order to reduce or eliminate the negative effects of the leakage signals, the series connection of the third branch and the fourth branch between the first port and the second port is provided in parallel to the series connection of the first branch and the second branch, which is a parallel circuit two three-ports with respect to port 1 and port 2 creates, leaving the common port and the terminating port separate ports. Thus, with the third branch and the fourth branch, a defined parallel leakage path is provided, via which additional leakage signals can propagate from the first port to the second port. A properly chosen one - either fixed or variable / reconfigurable to broaden the bandwidth - phase difference between a leaking signal propagating across the first branch and the second branch and the leaking signal propagating across the third second and fourth branches , leads to a negative interference at the second port, whereby the degree of isolation of the multiplexer circuit is improved.

Thus, it is preferable that the phase difference between the two leakage signals is about 180 ° or an odd multiple of 180 °, so that a negative, destructive interference is obtained.

It is possible that the multiplexer circuit is a second order, fourth order, sixth order or even higher order multiplexer.

A second order multiplexer may be a diplexer or a duplexer. A fourth order multiplexer may be a quadplexer. A sixth order multiplexer may be a hexplexer, etc.

Thus, it is possible and preferable that the phase difference be N times 180 °, where N is an odd integer.

It is possible that the multiplexer circuit further comprises a first phase shifter, a second phase shifter, a third phase shifter and / or a fourth phase shifter.

Thus, it is possible that the multiplexer circuit comprises one, two, three or four phase shifters.

It is also possible that more additional leak paths are used. In addition to duplexers, diplexers (which are three-port circuits), four ports (triplexer), five ports (quadplexer), ... and n ports are also possible.

Thus, in general, a multiplexer as described in the present invention is an N + 1 port (eg, a quadplex is a 5-port), where it is possible to have N / 2 pairs of ports where their mutual isolation improves with the restriction that no port may appear more than once in any of the combinations, and the circuitry may contain up to 2xN phase shifters. N is a natural integer.

As an example, it is possible to port in a quadplexer 1 for example, isolation between ports as the common port 2 and 3 and also between 4 and 5 to improve.

A phase shifter, e.g. the first phase shifter may be electrically connected to the first branch. A second phase shifter may be electrically connected in the second branch. A third phase shifter may be electrically connected in the third branch and a fourth phase shifter may be electrically connected in the fourth branch.

The at least one phase shifter provides a phase shift such that the phase difference between the leakage signal or the additional leakage signal at the second port can destructively interfere.

In particular, it is preferred that the phase shifters in the four branches provide a phase shift on the respective leakage signals so that a destructive interference is obtained at the second port.

For this purpose, it is possible that - if a single phase shifter is provided - the phase shifter provides a phase shift of 180 ° (or odd multiples).

If the multiplexer circuit comprises two phase shifters, then the sum of the phase shift should be 180 ° (or odd multiples) if the two phase shifters are arranged in the same leakage signal path. If the two phase shifters are distributed over both leakage signal paths, then it is preferred that the first leakage signal be phase shifted by a first angle and the second leakage signal phase shifted by a second angle such that the destructive interference at the second port is obtained.

It is also possible that the multiplexer circuit comprises three phase shifters. Each phase shifter can be arranged in one of the four branches. Thus, a branch may be without a phase shifter.

When the multiplexer circuit comprises four phase shifters, it is possible and preferable that each of the four branches has its own phase shifter.

As already stated above, it is possible that the first filter and the second filter are filters of a first diplexer and that the third filter and the fourth filter are filters of a second diplexer. Alternatively, it is possible that the first filter and the second filter are filters of a first duplexer and that the third filter and the fourth filter are filters of a second duplexer.

In particular, it is preferred that if the first filter and the second filter provide the filters of a duplexer, the third filter and the fourth filter also provide the filters of a duplexer.

If the first filter and the second filter provide the filters of a duplexer, then it is preferred that the corresponding filters in the second leak path, the third filter, and the fourth filter also provide the filters of the diplexer.

It is possible that the first filter has a first passband and the second filter has a second passband, the Passbands of the first and second filters are at different frequencies. Then, it is preferable that the third filter has the second pass band as a pass band, and that the fourth filter has the first pass band as a pass band.

Such cross-correlation of the bands and the position in the circuit effects transmit signals provided at the first port which can pass the first filter and which can be forwarded to the common port. However, the RF power of the transmission signal should not pass through the third filter. Thus, it is preferable that the first pass band is a transmission signal pass band and the second filter is a reception signal pass band.

Again, using the terminology "send" and "receive" should only demonstrate possibilities. They represent possible but not limiting examples of signal transfer in general. Furthermore, receive signals received at the common port are signals of the second passband. Thus, the receive signals can pass the second filter, which can form the receive filter. However, the received signals can not pass the fourth filter, which is opaque to received signals.

However, in order to have good suppression of leaking signals, it should be provided that leakage signals propagating across the first and second branches should see the same circuit elements as leakage signals propagating across the third and fourth branches. This can be obtained by providing a copy of the first filter as the fourth filter and by providing a copy of the second filter as the third filter.

Thus, it is preferred that if the first filter and the second filter provide a duplexer or a diplexer, and if the third filter and the fourth filter provide a duplexer or diplexer, the corresponding duplexers and diplexers are characterized by corresponding transmit matrices.

It is possible that the multiplexer circuit further comprises a termination circuit. Impediently, it is useful for the termination port impedance to be a copy of the common port. The termination port must have an identical impedance to the common port, it should be grounded directly but through the termination circuit. Thus, the termination circuit should preferably have the same impedance as the common port. Thus, it is possible that the third branch is connected between the first port and the termination circuit and the fourth branch is connected between the termination circuit and the second port.

It is possible that the termination circuit comprises one or more impedance elements selected among inductance elements, capacitance elements and resistance elements. It may also contain active circuitry (e.g., in addition to the passive elements consisting of inductors, capacitors, and resistors in any manufacturing technology) that provide reconfigurability or tunability. Examples may be switched capacitors, switched inductors, switched resistors, or a combination thereof. In addition, tunable capacitors, tunable inductors, and tunable resistors or combinations thereof are possible.

It is possible that the first port is provided for receiving RF signals from a power amplifier and the second port is provided for routing RF signals to a low-noise amplifier.

It is possible that the power amplifier is an envelope tracking amplifier.

Envelope tracking is preferred in mobile communication systems because envelope tracking allows the power amplifier to operate in a preferred power range so that high power efficiency of the power amplifier is obtained. However, the use of envelope tracking causes noise that has frequency components in a corresponding receive frequency band, which causes problems and reduces the isolation in conventional duplexers or diplexers, because these frequency components can penetrate the receive filter.

However, with the multiplexer circuit provided with the second leakage signal path, the effects of unwanted noise on the receiver side are greatly reduced or eliminated.

It is possible for one or more phase shifters to comprise impedance elements selected among inductance elements and capacitance elements.

In principle, an ideal phase shifter would be preferred. An ideal phase shifter provides a constant, frequency-independent phase shift.

However, it has been found that even phase shifters of a relatively simple construction allow a great improvement in the degree of isolation in the circuit topology as described above.

It is possible that one or more phase shifters a T Circuit or a π circuit. At a T Circuit, the two circuit elements are electrically connected in series and a circuit element is electrically connected in a parallel path, which electrically connects a common node of the two circuit elements of the series circuit to a reference potential, eg ground.

In a π-circuit, a circuit element is electrically connected in a signal path and a first shunt element is connected in a first shunt path and a second shunt element is connected in a second shunt path. The two shunt paths electrically connect the two electrodes of the circuit element in the series path to a reference potential, e.g. Dimensions.

It is possible that one T Circuit comprises two capacitance elements in the signal path and one inductance element in the bypass path. However, it is also possible that the T-circuit comprises two inductance elements in the signal path and one capacitance element in the bypass path.

It is possible for a π circuit to include a capacitive element in the signal path and an inductance element in each of the two shunt paths. It is also possible that the π circuit comprises an inductance element in the signal path and a capacitance element in each of the two shunt paths.

The usage of T Circuits or n circuits as a phase shifter provides the necessary phase shift with a phase shift difference for the frequencies of the corresponding passband that is small enough to give good cancellation at the second port.

Inductance elements of the phase shifters may have an inductance of a few nH, e.g. 2, 5 or 10 nH. Capacitance elements in the phase shifters may have a capacity of a few picofarads, e.g. 2, 5 or 10 pF. These values can be frequency dependent.

It is possible that the common port is for signal transfer, e.g. for receiving RF signals from an antenna and for transmitting RF signals to the antenna.

The received RF signals may be receive signals propagating from the common port to the second port. The forwarded signals may be transmit signals received from the first port and forwarded to the common port.

The multiplexer circuit is not limited to provide an improved degree of isolation for a circuit at a position of a duplexer or a diplexer, but can also improve the isolation at a position of a higher-level multiplexer.

The cancellation principle can also be applied to higher order multiplexers. Thus, it is possible that the multiplexer circuit further comprises a third port and a fourth port, and a fifth filter and a sixth filter connected to the common port, and a seventh filter and an eighth filter connected to a termination circuit.

Such a multiplexer can provide a quadplexer. The first port and the third port may provide transmit ports, and the second port and the fourth port may provide receive signal ports.

The fifth filter and the sixth filter may provide a second duplexer or a second diplexer connected to the common port, and the seventh filter and the eighth filter may provide a second duplexer or a second diplexer connected to the termination circuit.

Such a quadplexer provides an improved degree of isolation between the first port and the second port and between the third port and the fourth port.

To improve cross-port isolation levels, it is also possible for the multiplexer to comprise other circuit elements, e.g. Phase shifters which provide corresponding leakage cancellation for crosstalk e.g. between the first port and the fourth port and between the third port and the second port effect.

Furthermore, it is possible that the multiplexer circuit further comprises a fifth phase shifter, a sixth phase shifter, a seventh phase shifter and an eighth phase shifter to provide a quadplexer with improved isolation.

The fifth phase shifter can be electrically switched between the third port and the fifth filter. The sixth phase shifter can be electrically switched between the sixth filter and the fourth port. The seventh phase shifter can be switched between the third port and the seventh filter, and the eighth phase shifter can be switched between the eighth filter and the fourth port.

If m is the order of magnitude of the multiplexer circuit (e.g., m = 2 for a duplexer, m = 4 for a quadplex, ...) then the multiplexer circuit may comprise m duplexer or m diplexer and twice m phase shifter.

Further, if a "prior art" device that can be replaced by the present multiplexer is a n-port multiplexer, then the multiplexer can improve at least one isolation path behind the circuit, as shown in the example. In one example, the desired pair of ports to which the leak enhancement is to be applied must be selected. Adding a copy of the circuit to maintain all impedance relationships between all ports, adding phase shifters and completing the terminating port (also terminating the unused ports for leak cancellation) results in the circuit of the present invention.

In general, a multiplexer as described in the present invention is an N + 1 port (eg, a quadplex is a 5-port), and it is possible to have N / 2 pairs of ports, and their mutual isolation is improved , with the restriction that no port may show up more than once in any of the combinations and that the circuitry may contain up to 2xN phase shifter. As an example: in a quad with port 1 as the common port, it is possible to isolate, for example, the ports 2 and 3 and also between 4 and 5 to improve, but it is not possible isolation between the ports 2 and 3 and also 3 and 4 to improve (since port 3 now available in both pairs).

The multiplexer circuit topology described above can provide a significantly improved degree of isolation between two ports (e.g., transmit and receive ports), primarily by using two preferably identical duplexers or diplexers connected to form the common main path and the other forms the leak compensation path. The usual main path is used for the signal propagating from the transmit port to the antenna and from the antenna to the receive port. The additional leak path comprising the second duplexer is electrically configured in parallel with the main path so that its transmit filter is connected to the receive port and the receive filter is connected to the transmit port, i. in a folded configuration compared to the first duplexer. In addition, phase shifters are provided in one or more paths to ensure that the two leakage signals from the transmit port to the receive port have an offset of 180 ° (or an odd multiple thereof).

Thus, ideally, the two duplexers or diplexers should be identical (but folded down with respect to their characteristic values S). The TX to RX port amplitude and phase characteristics should be identical. Thus, it is possible to choose the two ports where the cancellation must be applied, and those must be mirrored to apply the cancellation circuit.

The amount of phase shift in each phase shifter can be chosen freely, so that the condition of destructive interference is satisfied.

In addition, such a multiplexer circuit provides greatly increased robustness to impedance mismatching at the antenna port. It is thus possible to compensate for antenna port mismatch at the termination circuit so that the isolation from the transmission to the reception port is much better, even with a mismatch.

It is possible that capacitance elements of the phase shifters have a quality factor Q of 150 or more. Inductance elements in the phase shifters may have a quality factor of 40 or 50 or more.

A lower one Q Value increases losses, but the concept still works and a higher one Q Value would of course reduce the losses. The multiplexer works for a very wide range of Q- Values.

A quadplexer can be provided which provides improved isolation between tape 3TX and band 3RX and - simultaneously - between band 1TX and band 1RX (which improves in-band isolation in this example).

If the multiplexer circuit is realized as a diplexer circuit, it can be used for simultaneous support of band 66 and by band 40 used as an example (but not limited to those bands mentioned). tape 66 ranges from 1 710 MHz to 2 200 MHz. tape 40 ranges from 2 300 MHz to 2 690 MHz. Thus, at least for a diplexer, a small guard band with a width of only 100 MHz is available. However, the multiplexer topology provided provides good isolation values even for this narrowband guard band.

It is accordingly possible for a multiplexer device to comprise a multiplexer circuit as described above.

The multiplexer device may be part of or represent a front-end module of a corresponding wireless communication device.

Central aspects of the presented multiplexer circuit and details of preferred embodiments are shown in the attached schematic figures.

• 1 die beiden Lecksignalpfade und einen Phasenverschieber zur Kompensation;
• 2 die Verwendung von vier Phasenschiebern;
• 3 die Verwendung einer Abschlussschaltung, z.B. eines Abschlussnetzwerks;
• 4 die Verwendung eines Widerstandselements in der Abschlussschaltung;
• 5 Phasenschieber, die Kapazitätselemente und Induktanzelemente umfassen;
• 6 die Verwendung einer Parallelschaltung in der Abschlussschaltung;
• 7 die Kombination aus Phasenschiebern, die LNC-Elemente und ein Widerstandselement umfassen, in der Abschlussschaltung;
• 8 eine entsprechende Quadplexerkonfiguration;
• 9 die Auswirkung auf die Einfügungsdämpfung innerhalb von Durchlassbändern;
• 10 die substantiellen Verbesserungen bei der Isolation;
• 11 Isolationsgrade bei einer Drei-zu-Eins-VSWR-Antennenportfehlanpassung;
• 12 Isolationsgrade bei einer Drei-zu-Eins-VSWR-Antennenportfehlanpassung unter Verwendung einer Abschlussschaltung;
• 13 die Isolationsverbesserung für einen Diplexer; und
• 14 Isolationsverbesserungen in einem Quadplexer.

In the figures show:

• 1 the two leakage signal paths and a phase shifter for compensation;
• 2 the use of four phase shifters;
• 3 the use of a terminating circuit, eg a terminating network;
• 4 the use of a resistive element in the termination circuit;
• 5 Phase shifters comprising capacitance elements and inductance elements;
• 6 the use of a parallel connection in the termination circuit;
• 7 the combination of phase shifters comprising LNC elements and a resistive element in the termination circuit;
• 8th a corresponding quadplexer configuration;
• 9 the effect on insertion loss within passbands;
• 10 the substantial improvements in isolation;
• 11 Isolation levels in a three-to-one VSWR antenna port mismatch;
• 12 Isolation levels in a three-to-one VSWR antenna port mismatch using a termination circuit;
• 13 the isolation improvement for a diplexer; and
• 14 Isolation improvements in a quadplexer.

1 shows basic circuit elements of a multiplexer circuit MulC , The multiplexer circuit MulC owns a first port P1 and a second port P2 , A first branch B1 is between the first port and the shared port CP connected. A second branch B2 is between the common port CP and the second port P2 connected. A third branch B3 and a fourth branch B4 are electrically in series between the first port P1 and the second port P2 connected. The third branch and the fourth branch provide a path for additional leaking signals LS2 in addition to the leak signals LS1 that are about the first branch B1 and the second branch B2 from the first port P1 to the second port P2 spread.

In principle, the first leaking signal creates LS1 , which is about the circuit elements in the first branch B1 and the circuit elements in the second branch B2 from the first port P1 to the second port P2 spreads, a finite degree of isolation between the first port and the second port P2 which is caused by the use of real circuit elements, and is generally unavoidable. In the first branch happens the first leak signal LS1 the first filter F1 , Furthermore, the first leaking signal happens LS1 the second filter F2 in the second branch B2 between the common port CP and the second port P2 ,

The multiplexer circuit MulC is characterized in that it is the second path for the second leak signal LS2 provides. The second path includes the third branch B3 and the fourth branch B4 , in particular the third filter F3 in the third branch B3 and the fourth filter F4 in the fourth branch B4 ,

It is preferred that the third filter F3 essentially the same construction as the second filter F2 owns and that the fourth filter F4 the same construction as the first filter F1 has. Either the first leak signal LS1 or the second leak signal LS2 - In this example, the first leak signal LS1 - Is so out of phase that the first leak signal LS1 and the second leak signal LS2 a phase shift of substantially 180 ° or an odd multiple thereof at the second port P2 have.

transmission signals TXS can be different from the first port P1 to the common port CP spread. Receive signals RX2 may differ from the common port CP to the second port P2 spread. Thus, the first port P1 a send port and the second port P2 be a reception port. The presence of the third branch B3 and the fourth branch B4 essentially does not disturb the propagation of the transmission signals TXS and the received signals RXS because of the corresponding filter characteristics of the third filter F3 and the fourth filter F4 which may be reflective for RF signals outside the respective passband frequencies. The inevitable leak LS1 will be in the parallel branch as the second leak signal LS2 duplicated, and the phase difference of substantially 180 ° causes at the second port P2 a negative or destructive interference, so that negative effects of leaking signals are greatly reduced.

As a consequence, the degree of isolation of the multiplexer circuit becomes MulC greatly increased. However, the improvement in the degree of isolation comes at the expense of having the third and fourth filters in the third and fourth branches, respectively, and the at least one phase shifter PS1 must be provided. Thus, compared to conventional duplexers, the complexity and the insertion loss can be increased. However, the ratio isolation / insertion loss is improved.

A termination circuit TC can to the filters F3 and F4 be connected, eg between the filters F3 and F4 and a ground potential to provide a defined termination load. These elements of the closing load can be off R . L . C consist of active parts such as switches or tunable elements such as varactors. This can be a whole network to mimic the antenna impedance. And since the antenna impedance can change (hence the use of antenna tuners), the termination port impedance must also change and follow the antenna impedance as well as possible.

It is possible that the conclusion is realized via a single closing element. The single terminating element may consist of an element selected from among a resistive element, an inductance element and a capacitive element.

2 shows the possibility of using four phase shifters. In particular, the first phase shifter PS1 in the first branch B1 arranged. The second phase shifter P2 is in the second branch B2 arranged. The third phase shifter PS3 is located in the third branch, and the fourth phase shifter PS4 is in the fourth branch B4 arranged. Symmetry between the first leakage path and the second leakage path is preferred. Thus, it is preferred that both leakage paths have the same number of filters and phase shifters.

To go to the second port P2 To obtain a phase shift of 180 °, it is not necessarily required that each phase shifter provide a phase shift of 45 °. A phase shift of + 90 ° can be obtained in the upper leak path, and a -90 ° phase shift can be obtained in the lower leak path. However, it is possible for the upper leakage path to provide a phase shift of 80 °, 70 °, 60 °,..., While the lower leakage path provides a phase shift of -100 °, -110 °, and -120 °, ,

In addition, a phase shift of one of the two leakage signal paths does not necessarily have to have a similar contribution on the side of the first port and on the side of the second port. Thus, it is possible that the first phase shifter PS1 provides a phase shift of 40 ° and the second phase shifter provides a phase shift of 50 ° and the like.

The third filter and the fourth filter - or the second duplexer provided by the third filter and by the fourth filter - may be electrically coupled or connected to a termination load.

While the multiplexer MulC according to 1 provides a diplexer circuit where the first filter, the second filter, the third filter and the fourth filter are high-pass or low-pass filters, it is possible that the multiplexer circuit MulC also creates a duplexer circuit, eg as in 2 shown.

Thus, in the diplexer circuit according to 1 a low-pass filter as the first filter F1 between the first port P1 and the shared port CP arranged, and a high-pass filter is as the second filter F2 between the common port CP and the second port P2 arranged. Accordingly, the third filter F3 a high-pass filter corresponding to the high-pass filter F2 , and the fourth filter F4 is a low-pass filter corresponding to the low-pass filter F1 ,

In the multiplexer circuit MUCL from 2 , which provides a duplexer circuit, provide the first filter F1 and the second filter F2 a first duplexer DUP1, and the third filter F3 and the fourth filter F4 create a second duplexer DUP2 while the low-pass filter F1 and the high pass filter F2 in 1 create a first duplexer and the high pass filter F3 and the low-pass filter F4 in 1 a second diplexer DIP2 create. Thus create accordingly the third filter F3 and the fourth filter F4 a second duplexer DUP2 in 2 ,

3 shows that the second duplexer DUP2 comprising the third filter and the fourth filter, may be coupled to a reference potential, termination load. The termination can be a resistor or a complex impedance.

Furthermore, the first port P1 with a power amplifier PA connected, and the second port P2 is with a low noise amplifier LNA connected. In particular, power amplifiers operating with envelope tracking provide noise that can be problematic on the receiver side because it can penetrate the second filter. Such generally problematic signals can be eliminated using the second leakage path.

4 illustrates a possible termination circuit TC comprising a resistance element.

The resistance element RE in the final circuit TC acts as a load circuit that assists in maintaining proper functioning of the multiplexer circuit. A variable termination circuit TC in combination with the described multiplexer circuit topology may increase the robustness to impedance mismatching.

5 illustrates possible implementations of phase shifters. The first phase shifter PS1 , the second phase shifter PS2 , the third phase shifter PS3 and the fourth phase shifter PS4 consist of LC Elements. The first phase shifter PS1 can a T Having two capacitance elements electrically connected in series in the first branch and an inductance element in a shunt path to ground. Analogously, the second phase shifter P2 a corresponding T- Own configuration. In addition, the third phase shifter PS3 a T Configuration having capacitance elements electrically connected in series in the third branch and an inductance element in a shunt path. The fourth phase shifter PS4 has a π circuit comprising an inductance element in the fourth branch and a capacitance element in each of the two bypass paths of the pi configuration.

6 illustrates the possibility of a termination circuit TC having a parallel circuit of a capacitive element and a resistive element, the parallel circuit electrically connecting the second duplexer to ground.

The common port CP is electric with an antenna ANT the corresponding wireless communication device connected.

The capacitance element in the termination circuit can also be replaced by an inductance element.

7 illustrates the possibility LC Components such as T To have circuits and n circuits as a phase shifter, while the common port with an antenna ANT connected and the termination circuit TC a resistance element RE includes or consists of.

8th shows the use of the multiplexer circuit MulC as a quadplexer. The quadplexer has a third port P3 and a fourth port P4 , The third port P3 may be an additional transmit port for receiving transmit signals from an external circuit environment. The fourth port P4 may be an additional receive port for forwarding receive signals to an external circuit environment, eg, an additional low noise amplifier of a front end circuit of a mobile communication device.

Furthermore, the quadplexer has a fifth filter F5 and a sixth filter F6 , The fifth filter F5 and the sixth filter F6 create a third duplexer DUP3 , Furthermore, the quadplexer has a seventh filter F7 and an eighth filter F8 that has a fourth duplexer DUP4 create. The combination of the second duplexer DUP2 and DUP4 is about a resistance element RE completed to earth. The first duplexer DUP1 and the third duplexer DUP3 are with the common port CP connected.

Furthermore, the quadplexer has a fifth phase shifter PS5 , a sixth phase shifter PS6 , a seventh phase shifter PS7 and an eighth phase shifter PS8 , The fifth phase shifter PS5 is between the third port P3 and the fifth filter F5 connected. The sixth phase shifter PS6 is between the sixth filter F6 and the fourth port P4 connected. The seventh phase shifter PS7 is between the third port P3 and the seventh filter F7 connected. The eighth phase shifter PS8 is between the eighth filter F8 and the fourth port P4 connected.

Analogous to the function of the four phase shifters PS1 to PS4 become the four phase shifters PS5 to PS8 used to generate phase shifts such that leaks that propagate across the third duplexer DUP3 from the third port P3 to the fourth port P4 spread, be compensated by an additional leaking signal that extends across the fourth duplexer DUP4 from the third port P3 to the fourth port P4 spreads.

Thus represent the fifth phase shifter PS5 and the sixth phase shifter PS6 a phase shift ready in combination with the phase shift caused by the seventh phase shifter PS7 and the eighth phase shifter SP8 is provided for destructive interference on the fourth port P4 leads.

9 FIG. 4 illustrates a comparison between the insertion losses of a conventional duplexer and the (increased) insertion losses of the multiplexer circuit with a topology as in FIG 2 shown.

The insertion losses in a received signal band and a transmission signal band are slightly increased.

10 however, illustrates the corresponding gains in the degree of isolation between the first port P1 and the second port P2 the in 2 shown configuration. It is clear that the isolation enhancement overcompensates for the insertion losses in the passbands.

10 based on an improved multiplexer circuit for band 2 where the phase shifters off LC Elements, the inductive elements having a figure of merit of 40 and wherein the capacitance elements have a figure of merit of 150 have.

Increased quality factors of LC Elements of the phase shifters generally lead to a further improvement in the degree of isolation. And they also reduce insertion loss.

11 shows several degrees of isolation (curve 1 ) of a conventional duplexer in case of impedance mismatch on the antenna with different phase angles. The curves 2 show the degree of isolation of a multiplexer circuit as described above with the same impedance mismatch. Thus, the provided multiplexer circuit still maintains some improvement in isolation even with mismatch, causing a voltage standing wave ratio (VSWR) of 3: 1 at the antenna port.

Further illustrated 12 the still-available substantial improvement in isolation for the same antenna mismatch when providing a proper termination circuit on the second duplexer, the termination impedance being equal to the load seen at the antenna port (plot 3 ).

13 Figure 12 illustrates the possible improvement in the isolation of a diplexer by showing the isolation of a conventional diplexer and the isolation of a diplexer as indicated above. With ideal phase shifters in this case

14 illustrates degrees of isolation (curves 1 ) between corresponding signal ports and cross isolation degrees (curves 2 ) between non-corresponding ports of a quadplexer. Thus, the curves show 1 the degrees of isolation between the first port and the second port or between the third port and the fourth port. The curves 2 show the degrees of isolation between the first port and the fourth port and between the third port and the second port.

Because of the extra leakage paths provided and the phase shifter, the isolation between the first port and the second port and the isolation between the third port and the fourth port is between the first port and the fourth port and between the third port and the fourth port, respectively, compared to the cross port separation Substantially improved second port.

The in 8th shown quadplexer can be provided with further leakage compensation paths and other phase shifters to improve the corresponding cross-isolation degrees.

The multiplexer circuit and the multiplexer device are not limited to the features and equivalent circuit diagrams as shown above. The multiplexer circuit topology may use additional leakage paths and other phase shifters to further improve isolation levels, reduce insertion losses in passbands, and further improve cross-isolation levels.

LIST OF REFERENCE NUMBERS

ANT:

antenna

B1, B2, B3, B4:

first, second, third, fourth branch

CP:

common port

DIP:

diplexer

DUP:

duplexer

F1, F2, F3, F4:

first, second, third, fourth filter

F5, F6, F7, F8:

fifth, sixth, seventh, eighth filters

LNA:

low-noise amplifier

LS1:

first leak signal

LS2:

second leak signal

MulC:

multiplexer

P1, P2, P3, P4:

first, second, third, fourth port

PA:

power amplifier

PS1, PS2, PS3, PS4:

first, second, third, fourth phase shifter

PS5, PS6, PS7, PS8:

fifth, sixth, seventh, eighth phase shifters

RE:

resistive element

RXS:

receive signal

TC:

termination circuit

TXS:

send signal

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• US9240622 [0012]

Claims (16)

A multiplexer circuit with improved isolation, comprising - a first port, a second port, a shared port and a final port a first branch between the first port and the common port, a second branch between the common port and the second port, a third branch, which is connected between the first port and the completion port, a fourth branch, between the final port and the second port, a first filter in the first branch, a second filter in the second branch, a third filter in the third branch, a fourth filter in the fourth branch, wherein the third branch and the fourth branch provide a leakage signal path for a leakage signal having a phase difference as compared to a leakage signal through the first and second filters. A multiplexer circuit according to the preceding claim, which is a second order, fourth order, sixth order or even higher order multiplexer. A multiplexer circuit as claimed in any one of the preceding claims, wherein the phase difference between the two leakage paths is 180 ° n, where n is an odd integer. A multiplexer circuit as claimed in any one of the preceding claims, further comprising a first phase shifter, a second phase shifter, a third phase shifter and / or a fourth phase shifter. A multiplexer circuit according to any one of the preceding claims, wherein - the first filter and the second filter are filters of a first diplexer and the third filter and the fourth filter are filters of a second diplexer or - the first filter and the second filter are filters of a first duplexer and the third filter and the fourth filter are filters of a second duplexer. A multiplexer circuit according to any one of the preceding claims, wherein - The first filter has a first passband and the second filter has a second passband and the third filter has the second passband as a passband and the fourth filter has the first passband as a passband. Multiplexer circuit according to one of the preceding claims, further comprising a termination circuit, - Wherein the third branch is connected between the first port and the termination circuit and - The fourth branch is connected between the termination circuit and the second port. A multiplexer circuit according to the preceding claim, wherein the termination circuit comprises one or more impedance elements selected from inductance elements, capacitance elements, resistive elements. A multiplexer circuit as claimed in any one of the preceding claims, wherein the first port is for receiving RF signals from a power amplifier and the second port is for routing RF signals to a low noise amplifier. A multiplexer circuit according to the preceding claim, wherein the power amplifier is an envelope tracking amplifier. A multiplexer circuit as claimed in any one of the preceding claims, wherein one or more phase shifters comprise impedance elements selected from inductance elements and capacitance elements. Multiplexer circuit according to one of the preceding claims, wherein one or more phase shifters comprise a T-circuit or a π-circuit. A multiplexer circuit as claimed in any one of the preceding claims, wherein the common port is for receiving RF signals from an antenna and for transmitting RF signals to the antenna. A multiplexer circuit according to any one of the preceding claims, further comprising a third port and a fourth port, - a fifth filter and a sixth filter, connected to the common port, and a seventh filter and an eighth filter connected to a termination circuit. A multiplexer circuit according to the preceding claim, further comprising a fifth phase shifter, a sixth phase shifter, a seventh phase shifter and an eighth phase shifter being a quadplexer. A multiplexer device comprising a multiplexer circuit of any one of the preceding claims.

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