DE102017106733A1 - Circuits, methods and computer programs for detecting mechanical stress and monitoring a system - Google Patents

Abstract

Embodiments relate to a circuit, a method, and a computer program configured to detect a mechanical stress, and a circuit, method, and computer program configured to monitor the safety of a system. The detection circuit is designed to monitor a mechanical stress level of a semiconductor circuit. The detection circuit comprises a stress monitoring module configured to monitor a signal comprising information about the mechanical stress level of the semiconductor circuit, a reference module for generating a reference signal, and a calibration module configured to modify at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit to obtain at least one modified signal. The detection circuit further comprises an activation signal generator configured to generate an activation signal comprising an activation information related to the mechanical stress level of the semiconductor circuit depending on a relationship between the modified signal and the stress signal or the reference signal.

Description

TERRITORY

Embodiments relate to circuits, methods and computer programs that are configured to detect a mechanical stress and that are configured to monitor a security of a system.

BACKGROUND

Electronic circuits and semiconductors are increasingly used in a variety of applications. At the same time, the complexity of these circuits and of overall applications is also increasing. With the advent of more and more electronic circuits and semiconductors in applications, security issues arise. For example, systems or applications used in mass or public transport, as well as in the automotive and aerospace industries, are relevant to the safe operation of the particular vehicle. The security or reliability of these systems and applications can determine the security of each user. International organizations can define standards of functional safety for electrical and electronic systems (EE systems), eg. B. ISO 26262 (International Organization for Standardization) or IEC 61508 (International Electrotechnical Commission) , One aspect found in these standards is the assurance of block independence, which provides redundancy or self-test functionality to achieve a security goal. In the case of independent blocks, which are realized on the same semiconductor substrate, z. B. coupling effects can be avoided across the substrate to achieve independence. Some known concepts may avoid a possible coupling effect by using separate substrates to achieve the independence of the respective blocks.

This may be important for sensor devices that may be affected by stress on a much lower layer than other circuitry. Therefore, some sensors, particularly those intended to provide highly accurate measurements, may use individually calibrated stress compensation. One known concept attempts to avoid stressing the involved blocks or semiconductors. Special housings (packages, housings) can be used to avoid stress. A stress-resistant housing can lead to significant additional costs compared to standard housings. Another known concept is stress compensation, which can be applied, for example, to Hall sensors or bandgap references. Here, stress-induced signals can be measured, and the output of a stress-sensitive circuit can be corrected as a function of this measurement. Effort z. B. with regard to measurement circuit arrangement and stress sensors may generate additional costs. In some applications, high accuracy measurements may be used and correction may be limited to a normal operating range of the particular circuit or semiconductor on which the measurements are taken and compensated. If a defined operating range is significantly exceeded, accurate load compensation of the measurement circuitry may fail and result in incorrect calculations, adverse and potentially dangerous effects.

SUMMARY

There may be a need to provide an improved concept for a detection circuit, a safety monitoring circuit and a method of monitoring a mechanical stress level of a semiconductor circuit.

Such a need may be met by the subject matter of any claims.

Embodiments provide a detection circuit configured to monitor a mechanical stress level of a semiconductor circuit. The detection circuit comprises a stress monitoring module which is designed to monitor a stress signal comprising information about the mechanical stress level of the semiconductor circuit. The detection circuit further comprises a reference module configured to provide a reference signal, and a calibration module configured to modify at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit to obtain at least one modified signal. The detection circuit further comprises an activation signal comprising activation information related to the mechanical stress level of the semiconductor circuit depending on a ratio between the modified signal and the stress signal or the reference signal. The calibration module may be configured to calibrate or compensate a signal based on the calibration information. In embodiments, the stress signal, the reference signal, or even both may be compensated or calibrated.

In some embodiments, the activation signal generator may be configured to generate an activation signal based on at least one of the stress signal, a sensor signal received from a sensor, the reference signal, or the modified signal. The activation signal may include activation information related to the mechanical stress level of the semiconductor circuit that is above a threshold. In some embodiments, the reference module may be configured to provide a threshold as a reference signal, wherein the threshold indicates a threshold of mechanical stress level for the semiconductor circuit.

Embodiments of the detection circuit provide the activation signal, which may indicate, for example, that the mechanical stress level of the semiconductor exceeds a certain or a critical level. The activation signal can therefore be seen as a warning signal, based on which further security measures can be carried out. In some embodiments, the activation signal may be used to trigger security measures, e.g. Switching off components, reducing the performance of some components, transferring the semiconductor or system to a safe state, resetting components, etc. Embodiments also provide the modified signal based on the calibration information.

In further embodiments, the calibration module is configured to at least partially base the calibration information on information determined upon calibration of the semiconductor circuit after packaging or during an end-of-line test. Embodiments may include compensating for mechanical stress levels of the semiconductor circuit that occur during fabrication, e.g. After housing, or allow stress levels to be measured or determined in an end-of-line test. For example, the calibration module may be configured to at least partially base the calibration information on information determined during an end-of-line test, and the calibration information determined during the end-of-line test may include at least one of an offset correction factor a sensitivity correction factor.

The calibration module may be configured to at least partially base the calibration information on information read from a nonvolatile memory. Embodiments may allow for storing the calibration information such that signals may be compensated using stored information stored e.g. B. is stored in or after a manufacturing process of the semiconductor circuit. In further embodiments, the calibration module may be configured to determine the calibration information further based on temperature information. Embodiments may allow for compensation of stress level signals with respect to temperature conditions. Further, at least some embodiments may provide the activation signal generator configured to generate the activation signal further based on the calibration information and / or the temperature information. In some embodiments, the activation signal generator may consider calibration information and / or temperature information, regardless of actual stress or temperature compensation of a sensor signal performed by the calibration module or any other component. In further embodiments, the activation signal generator may be configured to at least partially base the calibration information on information read from a nonvolatile memory. The calibration information can be stored after manufacture.

In embodiments, the semiconductor circuit may be configured to determine a sensor signal, and the activation signal generator may be configured to base the activation signal on at least one of the sensor signal, a compensated sensor signal, and the modified signal. The calibration module may be configured to modify the sensor signal based on the mechanical stress level information to obtain the compensated sensor signal. Embodiments may enable generation of the activation signal based on a comparison of the sensor signal and the compensated sensor signal or the stress signal, comprising the information about the mechanical stress level, e.g. For example, a degree, level or extent of modification may be determined and the generation of the activation signal may be based on degree, level or extent. Embodiments may enable generation of the activation signal based on whether a modification of the original signal exceeds a certain degree, level, extent, or threshold. Alternatively or additionally, the activation signal generator can be designed to base the activation signal on the stress signal, comprising the information about the mechanical stress level and the calibration information. The calibration information may also include information about a degree, level, or extent of the modification that may be present in the calibration information Stress level signal or the sensor signal is made. Embodiments may base the activation signal generation on the calibration information, determining the degree, level, or extent to which the stress level signal or sensor signal is to be modified.

In some embodiments, the stress monitoring module may further include a stress sensor configured to measure a mechanical stress on the semiconductor circuit and to provide the stress signal including the information about the stress level. Such information may contribute to or form a basis for the calibration information. Embodiments may reuse such a signal for calibration, stress detection, and activation signal generation. In further embodiments, the detection circuit may further comprise a control module. The control module includes the activation signal generator and the control module is configured to receive a sensor signal from another sensor. For example, the other sensor may be a Hall sensor, a temperature sensor, a pressure sensor, a light sensor, etc. The control module is configured to use the mechanical stress level information to improve measurement accuracy of the sensor signal and to generate the activation signal using the activation signal generator. Embodiments may provide a synergy effect by using information about the mechanical stress level for many purposes, e.g. As measurement correction, calibration, stress level detection, activation signal generation, etc. In further embodiments, the control module may further comprise the calibration module or the reference module.

The control module may be configured to modify the sensor signal using the at least one modification signal. The modification signal is based on the calibration information and is based on the information about the mechanical stress level. The control module may then be further configured to generate the activation signal if the at least one modification signal exceeds a threshold value. Embodiments may enable activation signal generation based on relative modification of the sensor signal. In embodiments, the calibration information may include at least one of a stress-dependent offset for adding to the sensor signal from the other sensor signal or a stress-dependent gain factor for multiplying with the sensor signal from the other sensor. Embodiments may allow for offset and gain modification, compensation, and / or calibration.

In embodiments, the activation signal generated by the activation signal generator is configured to cause activation of a security measure.

Therefore, some embodiments may be used to apply safety measures when a semiconductor breaks or has a mechanical failure. In further embodiments, the activation signal generator may be further configured to compare signals from two or more sensors, wherein the signals comprise information about the mechanical stress level of two or more semiconductor circuits, and to generate the activation signal when a mechanical stress level determined by the two or the multiple signals displayed is more than one threshold. Embodiments may further enable detection of a critical stress level by comparing different stress levels of different components.

Embodiments further provide a security monitoring circuit configured to monitor a system. The security monitoring circuit comprises the detection circuit as described above. The security monitoring circuit further comprises a control module configured to receive the activation signal from the activation signal generator and to apply a security measure to the system when the activation signal is received. Embodiments may provide control over a system such that failure of a semiconductor in the system may be detected and appropriate security measures applied to the system, e.g. B. components outside the semiconductor circuit, can be applied. Embodiments may enable the maintenance of a stress-safety criterion of the system based on the activation signal.

In embodiments, the security measures may correspond to at least partial shutdown of the system or semiconductor, shutdown of power components or drivers for power components, transmission of the system or at least portions thereof to a security state, etc. In some embodiments, the control module may be configured to transfer the semiconductor circuit or system from a normal operating state to a safe operating state. when the activation signal is received. The safe operation state is a state in which consequences of a failure of the semiconductor circuit are reduced as compared with the normal operation state. That is, if the semiconductor circuit fails in the normal operating state, consequences may occur e.g. B. for the system, its components or a user of the system be more serious than in the safe operating condition.

Another embodiment is a security monitoring circuit configured to monitor a system. The safety monitoring circuit comprises a stress monitoring module configured to monitor a sensor signal and to determine an estimated deviation of a sensor signal caused by a mechanical stress level of a semiconductor circuit. The safety monitoring circuit further comprises an activation signal generator configured to generate an activation signal comprising activation information related to the mechanical stress level of the semiconductor circuit when (if, when) a predefined relationship between the sensor signal and the estimated deviation of the sensor signal is satisfied. Embodiments enable safety monitoring based on a deviation of a mechanical stress level. In embodiments, the stress monitoring module may further be configured to compensate for variations caused in the sensor signal by a mechanical stress level of the semiconductor circuit, and the activation signal generator may be configured to generate the activation signal if the deviation exceeds a threshold.

Embodiments further provide a method for monitoring a mechanical stress level of a semiconductor circuit. The method includes monitoring a stress signal that includes information about the mechanical stress level of the semiconductor circuit and providing a reference signal. The method further comprises modifying at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit to obtain a modified signal. The method further includes generating an activation signal that includes activation information related to the mechanical stress level of the semiconductor circuit depending on a ratio between the modified signal and the stress signal or the reference signal. For example, the activation signal may include activation information related to the mechanical stress level of the semiconductor circuit that is above a threshold. In some embodiments, the method may further include reading the calibration information from a nonvolatile memory.

Embodiments further provide a detection circuit configured to detect a mechanical stress of a semiconductor circuit. The detection circuit includes a stress monitoring module configured to monitor a mechanical stress of the semiconductor circuit. The stress monitoring module is further configured to provide monitoring information related to a mechanical stress level of the semiconductor circuit.

The detection circuit further comprises an activation signal generator configured to generate an activation signal. The activation signal comprises an activation information relating to the mechanical stress level of the semiconductor circuit, when the monitoring information indicates that the criterion of the mechanical stress level is fulfilled by the semiconductor circuit. Embodiments of the detection circuit provide the activation signal, which may indicate, for example, that the mechanical stress level of the semiconductor exceeds a certain level. The activation signal can therefore be seen as a warning signal, based on which further security measures can be carried out. In some embodiments, the activation signal may be used to trigger security measures, e.g. Switching off components, reducing the performance of some components, transferring the semiconductor or system to a safe state, resetting components, etc.

In some embodiments, the criterion of the mechanical stress level may correspond to exceeding a stress-safety criterion, and the activation signal may include information related to a warning that the stress-safety criterion is exceeded. In some embodiments, the detection circuit may monitor the stress by means of at least one resistance or piezoresistance value measurement on the semiconductor circuit. In order to maintain a certain stress safety criterion, the z. B. determined by a standard or by other system parameters, the measured mechanical stress can not exceed a certain level. If the stress level is exceeded, the stress safety criterion may be critical can be considered and the activation signal can be provided.

In further embodiments, the change in the mechanical stress level or a rate of change of the mechanical stress of the semiconductor can be monitored. The criterion of the mechanical stress level may then correspond to a certain stress level change or rate of change which can not be exceeded. For example, certain rates of change in the mechanical stress level may indicate mechanical failure or breakage of the semiconductor or its substrate. Such a stress level change or rate of change may be monitored and upon detection, the activation signal may be provided. In some embodiments, the activation signal generator may be configured to generate the activation signal when a mechanical failure of the semiconductor is detected based on a rate of change of the mechanical stress level exceeding a criterion of a rate of change of the mechanical stress level. Therefore, some embodiments may be used to apply safety measures when a semiconductor breaks or has a mechanical failure.

Embodiments further provide a security monitoring circuit configured to monitor a system. The security monitoring circuit comprises the detection circuit as described above. The security monitoring circuit further comprises a control module configured to receive the activation signal from the activation signal generator and to apply a security measure to the system when the activation signal is received. Embodiments may provide control over a system such that failure of a semiconductor in the system may be detected and appropriate security measures applied to the system, e.g. B. components outside the semiconductor circuit, can be applied. Embodiments may enable the maintenance of a stress-safety criterion of the system based on the activation signal.

In embodiments, the security measures may correspond to at least partial shutdown of the system or semiconductor, shutdown of power components or drivers for power components, transmission of the system or at least portions thereof to a security state, etc. In some embodiments, the control module may be configured to transfer the semiconductor circuit or system from a normal operating state to a safe operating state when the activation signal is received. The safe operation state is a state in which consequences of a failure of the semiconductor circuit are reduced as compared with the normal operation state. That is, if the semiconductor circuit fails in the normal operating state, consequences may occur e.g. B. for the system, its components or a user of the system be more serious than in the safe operating condition.

In some embodiments, the safety monitoring circuit may be mounted in a vehicle. The system may include a plurality of circuits in the vehicle. The control module may be configured to apply a security measure to at least one circuit of the system when the activation signal is received. In a vehicle, there may be a plurality of safety related circuits, and the failure of a circuit may have consequences for an overall system of the vehicle. In some embodiments, the mechanical stress overload of the semiconductor may result in the application of a safety measure to other circuits. A stress safety criterion of the vehicle can therefore be maintained, taking into account a possible failure of the semiconductor. For example, a control unit of a vehicle may switch the vehicle to a safety mode, e.g. B. with reduced maximum speed, igniting a warning light, etc., when the activation signal is a mechanical stress overload of z. B. indicates a fractional control semiconductor circuit.

Embodiments further provide a method of detecting a mechanical stress level of a semiconductor circuit. The method comprises monitoring a mechanical stress of the semiconductor circuit, and providing monitoring information related to a mechanical stress level of the semiconductor circuit. The method further comprises generating an activation signal that includes an activation information related to the mechanical stress level of the semiconductor circuit when the monitoring information indicates that the criterion of the mechanical stress level is satisfied by the semiconductor circuit.

Embodiments may further provide a computer program or computer program product for performing any of the methods described above when the computer program is executed on a computer, a processor, or programmable hardware.

BRIEF DESCRIPTION OF THE DRAWINGS

Some embodiments of devices and / or methods and / or computer programs and / or computer program products are described below by way of example only and with reference to the accompanying figures, in which:

1 an embodiment of a detection circuit shows;

2 shows an embodiment of a security monitoring circuit;

3 a block diagram of a flowchart of an embodiment of a method for detecting a mechanical stress shows;

4 another embodiment of a detection circuit shows;

5 an embodiment of a detection circuit with a decision logic shows;

6 shows another embodiment of a detection circuit with two compensation functions and calibration signal evaluation;

7 another embodiment of a detection circuit with two compensation functions, and an evaluation of a sensor signal and a compensated sensor signal shows;

8th shows another embodiment of a detection circuit with a comparison of two stress levels; and

9 a block diagram of a flowchart of an embodiment of a method for monitoring a mechanical stress level shows.

DETAILED DESCRIPTION

Various embodiments will now be described in more detail with reference to the accompanying drawings, in which some embodiments are illustrated. In the figures, the thickness of the lines, layers and / or regions may be exaggerated for the sake of clarity.

While modifications and alternative forms of embodiments are possible, embodiments thereof are accordingly shown by way of example in the figures and described in detail herein. It is to be understood, however, that it is not intended to limit embodiments to the particular forms disclosed, but, in contrast, embodiments are intended to cover all modifications, equivalents, and alternatives falling within the scope of the disclosure. Throughout the description of the figures, like numerals refer to the same or similar elements.

It should be understood that when an element is referred to as being "connected" or "coupled" to another element, it may be directly connected or coupled to the other element, or intermediate elements may be present. Conversely, when an element is referred to as being "directly" connected to another element, "connected" or "coupled," there are no intermediate elements. Other terms used to describe the relationship between elements shall be construed in a similar manner (eg, "between" versus "directly between," "adjacent" versus "directly adjacent," etc.).

The terminology used herein is intended only to describe particular embodiments and is not intended to be limiting of embodiments. As used herein, the singular forms "one, one" and "the" are intended to include plural forms unless the context clearly dictates otherwise. It is further understood that the terms "comprising," "comprising," "having," and / or "having" as used herein, indicate the presence of specified features, integers, steps, operations, elements, and / or components, but not the presence or exclude the addition of one or more other features, integers, steps, operations, elements, components, and / or groups thereof.

Unless defined otherwise, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood to one of ordinary skill in the art to which exemplary embodiments belong. Furthermore, it is understood that terms, for. For example, those defined in commonly-used dictionaries should be construed as having a meaning that is commensurate with their meaning in the context of the pertinent technique and are not to be construed in an idealized or overly formal sense, unless expressly so defined herein.

1 shows an embodiment of a detection circuit 10 , which is designed to detect a mechanical stress of the semiconductor circuit 20 , The detection circuit 10 includes a stress monitor 12 , which is designed to monitor a mechanical stress of the semiconductor circuit 20 , The stress monitoring module 12 is further adapted for providing a monitoring information based on a mechanical stress level of the semiconductor circuit 20 , The stress monitoring module 12 may correspond to any means for monitoring a stress level, e.g. For example, it may receive a measurement signal from a stress sensor, or it may include a stress sensor. The detection circuit 10 further comprises an activation signal generator 14 that with the stress monitor 12 is coupled. The activation signal generator 14 may correspond to any means for generating the activation signal, which may be digital or analog. The activation signal generator 14 is configured to generate an activation signal that has an activation information related to the mechanical stress level of the semiconductor circuit 20 includes, when the monitoring information indicates that the criterion of the mechanical stress level by the semiconductor circuit 20 is satisfied.

At the in 1 shown embodiment and also in the following embodiments, the semiconductor circuit 20 correspond to any chip or substrate. The activation signal can be used to initiate security measures, e.g. B. a deactivation of outputs or generation of warning signals, in the event that the stress of the semiconductor circuit 20 exceeds normal operating conditions. In other words, that by the activation signal generator 14 generated activation signal may be configured to cause activation of a security measure. In embodiments, the stress monitoring module 12 a mechanical stress sensor associated with the semiconductor circuit 20 is coupled. The stress monitoring module 12 may be configured to provide the monitoring information related to the mechanical stress level of the semiconductor circuit 20 based on at least one resistance value or piezoresistance value measurement on the semiconductor circuit 20 , It may also perform multiple piezoresistance value measurements of resistors of different orientation with respect to the silicon crystal or measurements of resistors of different type or concentration of doping. The multiple measurements may be used to monitor multiple safety criteria related to different directions or types of (eg linear or shear) stress, or may be combined to produce an overall stress monitoring criterion.

In other embodiments, multiple stress sensors may be distributed throughout the chip. They can be placed in locations known to be exposed to high stress levels, e.g. B. chip corners. In other embodiments, the locations of stress sensors may be selected in accordance with knowledge of potential sources of stress, such as in the vicinity of power devices that may excessively heat their environment in the event of overload. In other embodiments, multiple stress sensors may be placed in the vicinity of components known to be sensitive to mechanical stress, such as Hall plates or bipolar transistors, used in temperature sensors or bandgap references. The safety criterion for generating the activation signal may be generated by one or a different combination of the plurality of stress measurements.

Other embodiments may reuse stress sensors that are already integrated on a silicon chip, e.g. B. The stress compensation sensor, which is used for the compensation of the stress dependence of a Hall plate and its information to the activation signal generator and to the compensation electronics supplies.

In other words, in embodiments, the stress monitoring module 12 be configured to determine an information about a mechanical stress of the surfaces of the semiconductor circuit 20 , For example, the mechanical stress may correspond to forces applied to the surfaces of the semiconductor circuit 20 act, which leads to a stress. In embodiments, the stress in several components, for. As normal components and shear components can be determined. In some embodiments, the stress in the material may be the derivation of the force with respect to the region at a particular point in the material. For example, applied stress forces can lead to deformations of the material of the semiconductor circuit 20 to lead. In some embodiments, the stress monitoring module 12 be configured to determine a relative change in a dimension or the geometry of the semiconductor circuit 20 under stress. Some embodiments may have known material properties and laws, e.g. As the Poisson number use. For example, the Poisson's number may link height and width to an increase in the length of the respective semiconductor circuit material.

In other words, under shear stress, the geometry of the semiconductor material may change. For example, a shear angle may be the deviation of the angle between the edges which deviate from rectangular shapes, ie which deviate from an angle of π / 2. Further, Hooke's law describes the ratio of stress and strain or shear for an elastic region. As previously mentioned, the Hooke's law can also be used to determine multi-dimensional deformations of a body under stress, e.g. B. by determination of load and shear angles. In some embodiments, a strain gauge may be used to alter the geometry of the semiconductor circuit 20 to measure or determine. For example, the strain gauge may be connected to the semiconductor circuit 20 be integrated or coupled, such that a change in the geometry of the indicator (gauge) due to the applied stress also changes its resistance value. This can result in a ratio where its resistance increases with the tensile load that is applied. In some embodiments, metal films may be used as resistors for these strain gauges.

In other embodiments, piezoresistivity may be used to provide mechanical stress to the semiconductor circuit 20 to determine. For some materials it can be stated that a gauge factor is considerably higher than expected from the mechanical mold variation, which can be attributed to the piezoresistivity. Piezoresistivity describes the dependence of a specific resistance on the applied stress. Such an effect can be applied to a monocrystalline material, e.g. As silicon or germanium, occur because it is for the semiconductor circuit 20 can be used. Piezoresistivity can be measured along several dimensions, e.g. Using three Cartesian dimensions. Piezoresistivity can be described with a fourth rank tensor based on two second rank tensors. In other words, in embodiments, piezoresistivity may be used to reduce the mechanical stress on the semiconductor circuit 20 and several dimensions can be used, e.g. For example, axial stress, orthogonal stress and shear stress. The piezoresistivity of the semiconductor circuit 20 may depend on the doping type and the doping density of its substrate. Further, in some embodiments, directions of piezoresistivity may depend on a direction relative to a crystal orientation. Different wafer materials may have different orientations with respect to the surface, and thus the same layout of piezoresistors may lead to different sensitivities in these directions. In embodiments, resistance measurements may be taken along different spatial dimensions of a substrate of the semiconductor circuit 20 be performed. For example, in some embodiments, at least two different spatial dimensions may be used for resistance measurements. That is, measured resistances, whether implanted in the substrate or a substrate layer itself, therefore have spatially separated contacts on the semiconductor surface 20 wherein the direction is oriented from one contact to another in the at least two different spatial dimensions.

In some embodiments, the criterion of the mechanical stress level may correspond to an exceeding of a stress safety criterion. For example, stress safety criteria may be defined in terms of a particular range of mechanical stress, which is acceptable without the safety integrity of the semiconductor circuitry 20 or a system in which the semiconductor circuit 20 is included, hurt. Furthermore, thresholds or stress safety criteria separating acceptable mechanical stress levels from unacceptable levels of mechanical stress may be defined. In some embodiments, the activation signal may include information related to a warning such that a stress-safety criteria is exceeded. The activation signal may then serve to trigger security measures, as explained in detail below.

In further embodiments, the activation signal generator 14 be configured to determine an information related to a change in the mechanical stress level. That is, some embodiments may respond to changes in stress levels, and thus the stress level criterion may be defined as the maximum stress level change that may relate to a given time period or timing. Of the Activation signal generator 14 may then be configured to generate the activation signal based on the information related to the stress level change. In further embodiments, the activation signal generator 14 be configured to determine information related to a rate of change of the mechanical stress level, which may correspond to a time derivative of the stress level or a stress level change per unit time of the stress level. For example, the rate of change of the stress level may be high when sudden changes in stress level occur. The activation signal generator 14 may then be configured to generate the activation signal based on the information related to the rate of change of the mechanical stress level. In some embodiments, the activation signal generator 14 further configured to generate the activation signal when a mechanical failure of the semiconductor is detected based on a rate of change of the mechanical stress level that exceeds a criterion of a rate of change of the mechanical stress level. That is, in some embodiments, the criterion of the stress level may correspond to a criterion of a rate of change of the stress level. When a substrate of a semiconductor circuit 20 If cracks or fractures occur, there may be a spike or step in the corresponding rate of change in stress level.

In various embodiments, the stress monitor and the activation signal generator may be on different semiconductors. In such embodiments, the stress monitor may be a piezoresistive sensor located on a power semiconductor and providing an analog output signal to another semiconductor, e.g. As a microcontroller supplies, which reads the analog signal via its analog-to-digital converter. In this type of embodiment, the activation signal generator may be part of the control software. In other embodiments, the activation signal generator may be part of the same semiconductor as the stress monitor, and may generate a "chip OK" signal or code or code sequence that is transmitted at defined time intervals to ensure that an activation signal is also detected. when the activation signal generator malfunctions due to an overuse situation.

2 illustrates an embodiment of a security monitoring circuit 100 The safety monitoring circuit is designed to monitor a system. The safety monitoring circuit comprises a detection circuit 10 , as described above. Furthermore, the security monitoring circuit comprises 100 a control module 110 configured to receive the activation signal from the activation signal generator 14 the detection circuit 10 , The control module 110 is further adapted to apply a security measure to the system when the activation signal is received. The control module 110 may correspond to any means of controlling, e.g. B. a processing entity, for. Any type of processor, programmable hardware, etc.

In some embodiments, the measurement of at least one of the relevant stress components, e.g. B. three linear and three shear stress directions, by the detection circuit 10 be executed. The activation signal generator 14 may be configured to compare these stress levels with corresponding tolerance levels. If this tolerance level is exceeded, it may lead to the initiation of the safety measure by the safety monitoring circuit 100 which can be defined depending on the particular application. In some embodiments, the stress measurements may be based on multiple, e.g. B. up to three, stress components are extended, the a complete state of stress of the silicon chip of the semiconductor circuit 20 , with dimensions as described above. The measured stress components can be evaluated separately or they can be combined, e.g. By a mathematical equation. In some embodiments, measurements may be extended to detect unacceptable changes in stress indicating that an unacceptable change in operating conditions has occurred. Reasons may be massive stress from the environment of use due to mechanical damage or internal sources of stress, e.g. B. thermal expansion due to electrical noise, be. In embodiments, possible security measures that can be initiated, the system z. B. bring to a safe state, z. B. by switching off output drivers or resetting the entire chip or the semiconductor circuit 20 , Another possible security measure would be a report of an error to a higher instance.

In accordance with the above, the safety monitoring circuit 100 or the control module contained therein 110 be configured to maintain a stress security criterion of the system based on the activation signal. This means that the control module 110 is designed to trigger or perform certain steps after receiving the activation signal. Some embodiments may be divided into two groups, wherein in the first group such security measures can be performed on the chip or a semiconductor circuit itself, for. B. the deactivation of certain ports or connectors. In the second group are security measures off-chip or semiconductor circuit 20 performed on other components or units of the system.

The system can z. B. may be an automotive system, ie it may have multiple semiconductors, that are implemented in or on a vehicle, e.g. In other applications, the system may correspond to a system of semiconductors implemented in an airplane, train, etc. Still other systems may include semiconductor circuits in power plants, computers or computer systems, communication systems, etc. In some embodiments, the control module 110 be designed for at least partial shutdown of the system or the semiconductor circuit 20 when the activation signal is received. This means that the safety measure can be triggered by the activation signal. The activation signal may include measurement results, or it may include an instruction that, at least in some embodiments, may be represented by a single bit. A single bit can be used to control the module 110 indicate that the criterion of the stress level on the semiconductor circuit 20 was fulfilled. The activation signal can therefore be considered as a warning signal.

In accordance with general system definitions, the physical signal corresponding to the activation signal may be defined by one or more protocols. In some implementations or applications, the activation signal may correspond to a particular error code that signals that the criterion of the mechanical stress level on the semiconductor circuit 20 was fulfilled. In some embodiments, the security measures may be applied to the semiconductor circuit 20 self-applied. For example, power components of the semiconductor circuit may be turned off. In another embodiment, a driver for a different power component may be turned off. That is, in some embodiments, the actual security measures by the detection circuit 10 at the security monitoring circuit 100 based on the mechanical stress of the semiconductor circuit 20 can be triggered, but outside the semiconductor circuit 20 is carried out.

In further embodiments, the control module 110 be formed to reset the semiconductor circuit 20 or at least one component of the system when the activation signal is received. In other words, another security measure is a reboot or reboot of a component, e.g. B. the semiconductor circuit 20 or another component of the system. Other security measures may include disregarding a sensor signal, e.g. As a sensor that measures the mechanical stress, and taking into account another sensor signal of another sensor, which also the mechanical stress level of the semiconductor circuit 20 can capture. Another security measure may be to use the activation signal as a warning signal to other units or even a user, e.g. As the driver of a vehicle to interpret. Furthermore, especially when considering the system in a vehicle, other functions in the vehicle may be deactivated upon receipt of the activation signal. In further embodiments, support systems for a driver, e.g. B. for an automatic drive function, or their settings can be modified after receiving the activation signal. This means that upon receipt of the activation signal in some embodiments, a warning may be initiated, for. B. a warning signal to a driver or a user of the system.

In a further embodiment, the control module 110 configured to transfer the semiconductor circuit 20 or the system from a normal operating state to a safe operating state when the activation signal is received. The safe operating state is a state in which consequences of failure of the semiconductor circuit 20 are reduced compared to the normal operating state. The transmission of the state may be on the semiconductor circuit 20 itself or at any other point in the system. For example, in the case of a sensor, ie, the semiconductor circuit 20 a sensor that detects any physical quantity; the activation signal may result in being prohibited from continuing to use the sensor signal in the system. Another security measure would be to inform relevant components of the system about the faulty sensor, e.g. By using a corresponding error code or suppressing the transmission of a "sensor OK" code. In some embodiments, the secure state or safe operating state may be a system level state and may depend on the particular system. In other words, with different systems, it can correspond to different states. If, for example, actuators or actuators are monitored, the respective actuator or actuator can be switched off after receiving the activation signal.

A security measure may also be referred to as a fail-silent action because the component is muted after failure. In other embodiments, sensor signals may be disregarded and redundant sensors may be used for which the mechanical stress level criterion has not been met. Such embodiments may also as fail-operational (if the specification of the system is still reached) or fail-degraded (if some specification parameters are relaxed) security measures are designated. The redundant sensors may be identical or different devices located on a plane above the silicon that reports the overuse. In other embodiments, the redundant sensor information may be provided by sensors in other regions of the same silicon chip for which the mechanical stress is still within an acceptable range. The control module 110 may then switch to the safe operating state, which may also be an emergency state, and missing information may also be estimated based on other sources. For example, in some embodiments, if a crankshaft sensor fails, an emergency program of a control unit may be started using already known data from the camshaft sensor. In some embodiments, an emergency signal, e.g. B. emergency light, be activated in a dashboard or cockpit.

In further embodiments, the control module 110 be designed to control at least one additional semiconductor circuit. The control module 110 may be further configured to apply a security measure to the at least one additional semiconductor circuit when the activation signal is received. For example, in some embodiments, an actuator or actuator, e.g. As a driver for an airbag ignition tablet, are monitored. In this case, the safe operating state can be activated by interrupting a current path to the respective actuator. In other words, a switch in a current path or branch can be opened. After failure detection accidental ignition of the airbag can then be avoided. In general, an error code can be sent to other components of the system such that further system-wide security measures can be taken. In some embodiments, only one error code may be communicated or broadcasted throughout the system. Other components can then be warned that the mechanical stress situation at the respective semiconductor circuit 20 was considered too high.

Furthermore, it can be considered that further failures can also affect certain shutdown procedures. Furthermore, in some embodiments, insignificant functions may be disabled to reduce the stress on the component. For example, in a car in an emergency mode, the maximum speed may be reduced using a control unit. By reducing the maximum speed, the mechanical stress in terms of shock, distortion, temperature can be reduced, and an emergency mode of the semiconductor circuit 20 can be enabled. Such security measures may be applied to low intrinsic safety integrity level (ASIL) features such as: As switching a power window in a mode in which the window can be closed or opened very slowly, and thus reduced maximum force. In other embodiments, the system may include a plurality of circuits in a vehicle, and the control module 110 may be configured to apply a security measure to at least one circuit of the system when the activation signal is received.

3 FIG. 12 is a block diagram of a flowchart of one embodiment of a method of detecting a mechanical stress on a semiconductor circuit. FIG 20 The method includes monitoring 32 the mechanical stress of the semiconductor circuit 20 , The method further includes providing 34 a monitoring information based on a mechanical stress level of the semiconductor circuit 20 , The method further comprises generating 36 an activation signal which has an activation information related to the mechanical stress level of the semiconductor circuit 20 includes, when the monitoring information indicates that the criterion of the mechanical stress level by the semiconductor circuit 20 is satisfied.

In other embodiments, the method may be configured to monitor a system in accordance with the above description. The system includes the semiconductor circuit 20 , The method may further comprise receiving the activation signal and applying a security measure to the system when the activation signal is received.

Embodiments further provide a computer program or computer program product having one for performing one or more of the method described above when executing a computer program on a computer, processor, or software-programmable hardware.

4 shows another embodiment of a detection circuit 10 , The detection circuit 10 is designed to monitor a mechanical stress level of a semiconductor circuit 20 that provide a sensor signal can. The detection circuit 10 includes a stress monitoring module 12 configured to monitor a signal indicative of the mechanical stress level of the semiconductor circuit 20 includes. The detection circuit 10 further comprises a reference module 13 adapted to provide a reference signal.

The detection circuit 10 further comprises a calibration module 14 configured to modify at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit 20 to obtain at least one modified signal. The detection circuit 10 further comprises an activation signal generator 16 adapted to generate an activation signal comprising an activation information related to the mechanical stress level of the semiconductor circuit depending on a ratio between the modified signal and the stress signal or the reference signal.

In the 4 shown dashed lines indicate different coupling options in embodiments. For example, the calibration module 14 be configured to modify the reference signal based on the calibration information. The modified signal then corresponds to a modified reference signal. The activation signal generator 16 may then generate the activation signal comprising an activation information related to the mechanical stress level of the semiconductor circuit depending on a ratio between the modified reference signal and the stress signal. In another embodiment, the calibration module is 14 configured to modify the stress signal based on the calibration information. The modified signal then corresponds to a modified stress signal. The activation signal generator 16 may then generate the activation signal comprising activation information related to the mechanical stress level of the semiconductor circuit depending on a relationship between the modified stress signal and the reference signal. In yet another embodiment, both the stress signal and the reference signal may be modified and the activation signal generator 16 may be configured to provide the activation signal based on a ratio between the modified stress signal and the modified reference signal. The modification may be performed to calibrate or compensate for the respective signals, ie, to combat effects of a predetermined mechanical stress introduced during manufacturing.

For example, the activation signal may include activation information related to the mechanical stress level of the semiconductor circuit 20 which is above a threshold include. As indicated by the dashed lines in 4 displayed, there are several options, such as the activation signal generator, the reference module 13 , the stress monitoring module 12 and the calibration module 14 coupled, which are explained in detail below.

The stress monitoring module 12 may correspond to any means for monitoring a stress level, e.g. For example, it may receive a measurement signal from a stress sensor, or it may include a stress sensor. The stress monitoring module 12 may include or be coupled to a stress sensor configured to measure a mechanical stress on the semiconductor circuit 20 and providing the signal comprising the mechanical stress level information. The reference module 13 may correspond to any signal generator or value generator, e.g. B. is implemented using a signal processor. For example, the reference signal may be a reference value and the reference module 13 may be a memory in which the reference value is stored. The reference signal may be a constant signal and thus the reference module 14 be configured to provide a threshold value as a reference signal. The threshold may be a threshold of the mechanical stress level for the semiconductor circuit 20 Show.

The calibration module 14 may correspond to any means of calibrating, modifying or compensating a signal and the calibration module 14 can be digital or analog. As will be explained in detail below, the calibration module 14 be adapted to apply modifications to the stress signal, comprising the information on the stress level, and / or on the reference signal to achieve a calibration, ie to compensate for any effects that have negative effects on the signal or make it difficult from to infer the signal to the actual mechanical stress level to compare the signals respectively. The activation signal generator 16 may correspond to any means for generating the activation signal, which may be digital or analog.

In particular, for high accuracy devices, a stress change level indicating the operation limit may be too inaccurate based on absolute values and may require calibration. Some embodiments are based on the finding that Degree of compensation necessary to keep such sensors calibrated can be used as an indicator of mechanical stress on the sensor and activation signal generation. Embodiments may introduce calibration of the stress detection level or use a sensor stress calibration function to achieve the activation of safety measures based on already existing stress coefficients of the stress compensated sensor. The latter can be achieved by setting thresholds for the change in the sensor signal that is tolerated with respect to the result of the sensor's calibrated stress compensation function.

To set limits that are within a stress range common to ordinary integrated circuits (ICs; IC = Integrated Circuit), e.g. For example, as microcontrollers or power system ICs are not critical, the change in stress with respect to a standard stress typical of the IC inside the housing may be insufficient as a safety criterion. This is because the stress sensitivity of a measurement circuitry, e.g. A sensor system, may result in erroneous measurement results in terms of their specified accuracy, even if the stress is still in an area where it does not result in failure in the circuitry. The differences between stress levels that can introduce failures into a digital circuit and the stress levels that affect the accuracy of a sensor, e.g. B. a Hall sensor, move from its narrow accuracy limits are several orders of magnitude.

Furthermore, a sensor is typically calibrated under certain post-housing stress conditions, and therefore, the calibration can compensate for the variation in initial housing stress, even though the stress level is not the same for each individual component. During operation, this stress can be varied by various influencing factors, eg. B. moisture absorption by the plastic housing material, mechanical fastening stress due to an application holder of the sensor, different thermal expansion of materials or aging effects of the mechanical properties of housing connection or adhesive. Even if it remains within safe limits in terms of stress levels, where electronic components may fail, it can leave the tolerable range where accuracy remains within the specified limits. Of course, this may depend on the accuracy required, which means that a stress can be considered uncritical for a sensor with a specified measurement accuracy of 10%, but a sensor with a specified accuracy of 1% can also exceed its limits by a factor of 5 to let.

To detect the calibration information, the change in stress can be evaluated to remain within a certain range around the level it had at the time when the calibration coefficients were determined, e.g. During the end-of-line test. In another embodiment, the calibration module is 14 therefore designed for at least partially based the calibration information on information contained in a calibration of the semiconductor circuit 20 it is determined after housing or during an end-of-line test. The calibration module 14 may be configured to at least partially base the calibration information on information read from a memory. For example, the memory may correspond to non-volatile memory (NVM) or any other memory. In one embodiment, an offset of a stress sensor in an NVM may be stored as a basis for calculating the stress change in the field. For example, the calibration module 14 be configured to at least partially base the calibration information on information determined during an end-of-line test, and the calibration information determined during the end-of-line test comprises at least one of an offset correction factor and a sensitivity correction factor.

In a further embodiment, the calibration module 14 configured to determine the calibration information further based on temperature information. Sensors are normally temperature compensated and the temperature compensation can inherently eliminate the effect of the temperature dependence of the stress from the main sensor output, therefore the stress limits that do not violate the main sensor output specifications may be different at different temperature levels. Therefore, the calibration value of the stress sensor offset may also be temperature compensated to avoid overrunning the functional safety threshold too early. Of course, this temperature compensation can act on both the stress sensor output and the detection threshold. In another embodiment, the activation signal generator 16 therefore be configured to generate the activation signal further based on the calibration information and / or on the temperature information. Similar to the above statements, the activation signal generator 16 be configured to at least partially base the calibration information on an information read from a memory.

In embodiments, the calibration information may have a single or multiple parameters. In addition to the offset, for example, a gain of a stress sensor and optionally its temperature coefficients can also be compensated. The stress compensation temperature compensation coefficients or the stress response functional safety response threshold may be fixed default values or individual values generally programmed in the NVM or memory.

5 shows an embodiment of a detection circuit 10 with a decision logic or detection circuit 10 , The detection circuit 10 is implemented as a digital circuit. For example, the stress monitoring module 12 , the reference module 13 , the calibration module 14 and the activation signal generator 16 in a control module 30 be included.

In some embodiments, the control module 30 as a programmable hardware component, e.g. A processor, a digital signal processor (DSP), a general purpose processor, or any other programmable hardware. In some embodiments, the control module 30 therefore at least partially correspond to software which may be adapted to be executed on a suitably adapted programmable hardware component. At the in 5 embodiment shown is the control module 30 or the stress monitoring module contained therein 12 with the stress sensor 32 and with a memory 34 from which calibration data or information is read. As indicated by the dashed box in 5 Optionally, a temperature sensor can be displayed 36 with the control module 30 be coupled. The decision logic or control module 30 can then determine the conditions for the generation of the activation signal.

Stress sensors are also used for the compensation of the stress influence of a main sensor (eg a Hall plate 38 ) used. Thus, in this embodiment, the semiconductor circuit 20 configured to determine the sensor signal. Of course, the stress sensor may be shared between the function to improve the measurement accuracy of the main sensor and the detection of operating conditions that are critical to violating a requirement for safe operation of the sensor.

Since the stress compensation can act on a main sensor signal, the initiation of a safety reaction can also be related to its influence on the main sensor function. Explicitly, a safety requirement may be that the main measurement does not differ from the real physical value by more than one safety limit, e.g. 1%, 2%, 3%, 5%, 10% or 20% of the full measurement scale. In this case, it may be advantageous to deduce the stress detection limit (reference signal) from this accuracy requirement, for example, the stress compensation factor should never cause a change in the main signal by more than a limit less than the safety limit for the main measurement, e.g. B. 0.5%, 1%, 2%, 3%, 5% or 10% of the full scale of the main measurement. In another embodiment, the activation signal generator 16 configured to base the activation signal on at least one of the sensor signal, a compensated sensor signal (compensated or calibrated signal from the main sensor), the modified signal (compensated or calibrated stress or reference signal), the stress signal, or the calibration information. The calibration module 14 may be configured to modify the sensor signal based on the mechanical stress level information to obtain the compensated sensor signal.

6 shows another embodiment of a detection circuit 10 with two compensation functions and calibration signal evaluation. As described above, the control module includes 30 in this embodiment, multiple components or functional entities. The control module 30 (the stress monitoring module included therein 12 ) is with a stress sensor 32 , a store 34 with calibration data or information, an optional temperature sensor 36 and a main sensor 38 , which is assumed to be a Hall sensor, coupled. As in 6 shown includes the control module 30 or the detection circuit 10 two stress monitoring modules 12a and 12b , The stress monitoring module 12a uses a first stress compensation function, e.g. B. determining an offset value, and the stress monitoring module 12b uses a second compensation function, eg. B. Determination of a gain value.

These values are then sent to the calibration module 14 which, in this embodiment, implements a main sensor stress compensation function using the above offset and gain values. The calibrated, modified or compensated Signal is then sent as a main output and to the activation signal generator 16 provided. In this embodiment, the activation signal generator 16 configured to base the activation signal on the stress signal, comprising the mechanical stress level information (ie, offset and gain). The activation signal generator 14 can also take into account the calibration information (link in 6 Not shown). In this embodiment, the detection circuit comprises 10 a control module 30 containing the activation signal generator 16 includes. The control module 30 is adapted to receive a sensor signal from another sensor 38 (here also as main sensor 38 designated). The control module 30 is configured to use the information about the mechanical stress level to a measurement accuracy of the sensor signal from the main sensor 38 and to activate the activation signal using the activation signal generator 16 to create. As in 6 displayed, the activation signal generator implements 16 a safety boundary detection. In the embodiment, the reference module 13 in the activation signal generator 16 integrated and provides a threshold to compare the modified stress signal with it.

As in 6 further shown, in this embodiment comprises the control module 30 also the calibration module 14 , and the control module 30 is configured to modify the sensor signal using at least one modification signal. The modification signal (eg, offset and gain in this embodiment) is based on the calibration information and is based on the information about the mechanical stress level. The control module 30 may further be configured to generate the activation signal if the at least one modification signal exceeds a threshold value (reference signal). In general, the calibration information includes at least one of a stress dependent offset for adding to the sensor signal from the other sensor 38 and a stress dependent gain factor for multiplying with the sensor signal from the other sensor 38 ,

The modification signal may thus have a correction value or factor or both. For example, main_output = sensor_signal · [1 + alpha * (stress_signal - stress_offset)].

In some embodiments, the modification signal corresponds to alpha · (stress_signal - stress_offset), where alpha, gain, and stress_offset, offset are calibration parameters or information. A range for these parameters can be obtained from calibration measurements and the theory of stress dependencies of semiconductors, e.g. As silicon, for example, the modification factor alpha · (stress_signal - stress_offset) can not exceed a single-digit percentage. Therefore, some embodiments conclude from large modification factors that a mechanical stress level of the semiconductor or chip is too high or that it has not been caused by expected application conditions. The activation signal generator 16 Thus, the activation signal can be based on the modification factor without taking into account the stress signal or the sensor signal or a modified version thereof. Thus, some embodiments may enable a reliable concept to maintain the modification factor within its limits such that a malfunction in the stress compensation can not result in violation of an absolute specification or requirement for the compensated sensor.

Further, in this embodiment, by the activation signal generator 16 generated activation signal designed to cause activation of a security measure or to initiate a security reaction.

An advantage of embodiments may be that it is not explicitly required that the calibration of the safety limit be made, since the stress compensation already derives compensation factors that are to be calibrated anyway. The stress compensation can, for. At least one of a stress dependent offset (see stress_offset in the equations above) added to the main sensor signal and a stress dependent gain factor (cf alpha in the above equations) multiplied by the main sensor signal. In this case, one or both of these factors may be monitored to stay within a certain limit, as in 6 shown. The threshold may therefore refer to either or both of the gain factor or the offset value.

7 shows another embodiment of a detection circuit with two compensation functions, and an evaluation of a sensor signal and a compensated sensor signal. 7 represents similar components as above for 6 are described. The difference between the in 6 and 7 shown embodiments lies in the input of the activation signal generator 16 , At the in 7 The embodiment shown is the activation signal generator 16 configured to base the activation signal on the sensor signal and the compensated sensor signal as output by the calibration module 14 , The Total stress and gain correction can be monitored based on a comparison of the input (main sensor signal) and output (modified or compensated sensor signal) of the calibration module 14 , The activation signal generator 16 can monitor and limit a total influence on the main measurement result.

8th shows another embodiment of a detection circuit 10 with a comparison of two stress levels. 8th FIG. 12 is a signal processing diagram showing a possible implementation of a stress comparison of two measurement paths, which are shown in FIG 8th are called Main and Sub. 8th shows a digital core or control module 30 , in which the respective components and functionalities are implemented. At the in 8th In the embodiment shown, there is a main Hall sensor 38a and a sub-Hall sensor 38b , Accordingly, there is a main temperature sensor 36a , a main stress sensor 32a , a sub-temperature sensor 36b and a sub-stress sensor 32b , In the upper path, only the signal from the main Hall sensor 38 Analog / digital (AD) converted 40a [HADC_MAIN = HADC_HAUPT], filtered 42a [LP_FILTER_MAIN = LP_FILTER_HAUPT] to digital raw data 44a from the main Hall sensor 38a to obtain. In the lower path multiplexes a multiplexer 50b [MUX] the sensor signals, and the sub-Hall sensor 38b is before the AD conversion by the converter 52b [HTS_ADC] worn. After demultiplexing 54b the sub-sensor signal is filtered 56b [LP_FILTER_SUB = LP_FILTER_UNTER] to get the raw digital data 58b to obtain. The appropriately converted digital signals for stress and temperature are called stress-main 60a , Temperature main 62a , Claim Under 60b and temperature sub 62b receive. A stress compensation is then separately in 64a for the upper path and in 64b performed for the lower path. Thereafter, and in each path, stress compensation is performed, taking into account an offset value and a gain factor for temperature compensation and another gain compensation factor, for calibrated values or modified signals 66a . 66b for each of the two paths to get.

In this embodiment, the activation signal generator 16 further configured to compare signals from two or more sensors, the mechanical stress components 32a . 32b of the main sensor 38a and the sub-sensor 38b , The signals have information about the mechanical stress level of two or more semiconductor circuits (the Hall sensors 38a . 38b ), and the activation signal generator 16 is configured to generate the activation signal when a mechanical stress level indicated by the two or more signals deviates by more than a threshold. In addition, if two measurement paths are used, a stress comparison between the two channels can be performed to judge whether the spatial stress distribution is sufficiently homogeneous. The activation of claim-dependent security measures can be described in a specification.

Another embodiment is a security monitoring circuit 100 , which is designed to monitor a system 20 , see. also 2 , The security monitoring circuit 100 includes an embodiment of the detection circuit described above 10 , The security monitoring circuit further comprises a control module, 30 . 110 configured to receive the activation signal from the activation signal generator 16 the detection circuit 10 and to apply a security measure to the system 20 when the activation signal is received.

Another embodiment is a security monitoring circuit 100 , which is designed to monitor a system 20 , The security monitoring circuit 100 includes a stress monitoring module 12 configured to monitor a sensor signal and to determine an estimated deviation of a sensor signal caused by a mechanical stress level of a semiconductor circuit 20 in accordance with the above description. The security monitoring circuit further comprises an activation signal generator 16 adapted to generate an activation signal, comprising an activation information related to the mechanical stress level of the semiconductor circuit 20 when a predefined relationship between the sensor signal and the estimated deviation of the sensor signal is satisfied. In another embodiment, the stress monitoring module is 12 further adapted to compensate for deviations in the sensor signal by a mechanical stress level of the semiconductor circuit 20 caused. The activation signal generator 16 is configured to generate the activation signal if the deviation exceeds a threshold value. The estimate of the deviation may be calculated based on the stress signal or the stress level information in some embodiments.

9 shows a block diagram of a flowchart of an embodiment of a method for monitoring a mechanical stress level of a semiconductor circuit 20 which provides a sensor signal. The method includes monitoring 70 a stress signal comprising information about the mechanical stress level of the semiconductor circuit. The method further includes providing 71 a reference signal that is at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit 20 modified 72 to obtain a modified signal. The method further comprises generating 74 an activation signal which has an activation information related to the mechanical stress level of the semiconductor circuit 20 depending on a ratio between the modified signal and the stress signal or the reference signal. For example, the activation signal may be generated based on at least one of the stress signal, a sensor signal, or a modified stress or sensor signal. The activation signal can be an activation information related to the mechanical stress level of the semiconductor circuit 20 which is above a threshold include. In a further embodiment, the method may further comprise reading the calibration information from a memory.

One skilled in the art would readily appreciate that steps of various methods described above may be performed by programmed computers. Here are some embodiments and program memory devices, z. Digital data storage media that are machine or computer readable and that encode machine executable or computer executable programs of instructions, the instructions performing some or all of the steps of the methods described above. The program memory devices may, for. As digital storage, magnetic storage media such as magnetic disks and magnetic tapes, hard disk drives or optically readable digital data storage media. Also, the embodiments are intended to program computers to perform the acts of the above described methods or (field) programmable logic arrays ((F) PLA = (Field) Programmable Logic Arrays) or (field) programmable gate arrays ((F) PGA = (Field) Programmable Gate Arrays) programmed to perform the acts of the methods described above.

It is therefore to be understood that one skilled in the art can derive various arrangements that, while not expressly described or illustrated herein, embody the principles of the disclosure and are included in their spirit and scope , Furthermore, all examples herein are expressly intended to be for the purposes of the reader's understanding of the principles of the disclosure and of the inventors' contribution to advancing the art, and are to be construed as without limiting such particular examples and conditions become. Furthermore, all statements herein about principles, aspects, and embodiments of the disclosure, as well as certain examples thereof, are intended to encompass their equivalents.

Function blocks designated as "means for ..." (execution of a certain function) are to be understood as function blocks comprising circuits which are each designed to perform a specific function. Therefore, a "means for something" may also be understood as "means for or suitable for something". A means designed to perform a particular function does not therefore mean that such a means necessarily performs the function (at a given time).

Functions of various elements shown in the figures, including any functional blocks referred to as "means", "means for monitoring", "means for generating", "means for controlling", etc., may be implemented by the use of dedicated hardware such as "a monitor", " a generator "," a controller "etc. as well as hardware capable of executing software in conjunction with associated software. Furthermore, any entity described herein as "means" may be implemented as, or equivalent to, one or more modules, one or more devices, one or more devices, etc. When provided by a processor, the functions may be provided by a single dedicated processor, by a single shared processor, or by a plurality of individual processors, some of which may be shared. Furthermore, the express use of the term "processor" or "controller" is not intended to be construed solely as hardware-executable hardware, and may be implicitly without limitation Digital Signal Processor (DSP) hardware, network processor, application-specific integrated circuit (ASIC, ASIC) Application Specific Integrated Circuit), Field Programmable Gate Array (FPGA), read only memory (ROM) for storing software, Random Access Memory (RAM), and nonvolatile memory device ( storage). Also, other hardware, conventional and / or custom.

It should be understood by those skilled in the art that all of the block diagrams herein are conceptual views of exemplary circuits embodying the principles of the disclosure. Similarly, it should be understood that all flowcharts, flowcharts, state transition diagrams, pseudocode, and the like represent various processes that may be substantially embodied in computer-readable medium and so executed by a computer or processor, whether or not such computer or processor expressly so is shown.

Furthermore, the following claims are hereby incorporated into the detailed description, where each claim may stand alone as a separate embodiment. While each claim may stand on its own as a separate example, it should be understood that while a dependent claim may refer to a particular combination with one or more other claims in the claims, other embodiments also contemplate combining the dependent claim with the subject matter of each other dependent or independent claim. These combinations are suggested here unless it is stated that a particular combination is not intended. Furthermore, features of a claim shall be included for each other independent claim, even if this claim is not made directly dependent on the independent claim.

It is further to be noted that methods disclosed in the specification or in the claims may be implemented by a device having means for performing each of the respective steps of these methods.

Furthermore, it should be understood that the disclosure of several acts or features disclosed in the specification or claims should not be construed as being in any particular order. Therefore, by disclosing multiple steps or functions, they are not limited to any particular order unless such steps or functions are not interchangeable for technical reasons. Furthermore, in some embodiments, a single step may include or be subdivided into multiple substeps. Such sub-steps may be included and part of the disclosure of this single step, unless expressly excluded.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited non-patent literature

• ISO 26262 (International Organization for Standardization) [0002]
• IEC 61508 (International Electrotechnical Commission) [0002]

Claims (22)

A detection circuit ( 10 ), which is designed to monitor a mechanical stress level of a semiconductor circuit ( 20 ), the detection circuit ( 10 ) comprising: a stress monitoring module ( 12 ), which is designed to monitor a stress signal, comprising information about the mechanical stress level of the semiconductor circuit ( 20 ); a reference module configured to provide a reference signal; a calibration module configured to modify at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit ( 20 ) to obtain at least one modified signal; and an activation signal generator ( 14 ), which is designed to generate an activation signal, comprising an activation information related to the mechanical stress level of the semiconductor circuit ( 20 ) depending on a ratio between the modified signal and the stress signal or the reference signal. The detection circuit according to claim 1, wherein the calibration module is designed to at least partially base the calibration information on information that is used during a calibration of the semiconductor circuit ( 20 ) after housing or during an end-of-line test. The detection circuit of claim 1 or 2, wherein the calibration module is configured to at least partially base the calibration information on information determined during an end-of-line test, and wherein the calibration information determined during the end-of-line test at least one of an offset correction factor or a sensitivity correction factor. The detection circuit according to one of the preceding claims, wherein the reference module is designed to provide a threshold value as a reference signal, wherein the threshold value a threshold value of the mechanical stress level for the semiconductor circuit ( 20 ). The detection circuit according to one of the preceding claims, wherein the calibration module is adapted to at least partially base the calibration information on information read from a nonvolatile memory. The detection circuit according to one of the preceding claims, wherein the calibration module is configured to determine the calibration information further based on temperature information. The detection circuit according to one of the preceding claims, wherein the activation signal generator ( 14 ) is configured to generate the activation signal further based on the calibration information and / or on the temperature information. The detection circuit according to one of the preceding claims, wherein the activation signal generator ( 14 ) is adapted to at least partially base the calibration information on information read from a nonvolatile memory. The detection circuit according to one of the preceding claims, wherein the semiconductor circuit ( 20 ) is configured to determine a sensor signal, and wherein the activation signal generator ( 14 ) is configured to base the activation signal on at least one of the sensor signal, a compensated sensor signal or the modified signal. The detection circuit of one of the preceding claims, wherein the calibration module is configured to modify the sensor signal based on the mechanical stress level information to obtain the compensated sensor signal. The detection circuit according to one of the preceding claims, wherein the activation signal generator ( 14 ) is configured to base the activation signal on the stress signal, comprising the information about the mechanical stress level and / or the calibration information. The detection circuit according to one of the preceding claims, wherein the stress monitoring module ( 12 ) has a stress sensor which is designed to measure a mechanical stress of the semiconductor circuit ( 20 ) and providing the signal comprising the mechanical stress level information. The detection circuit according to claim 11 or 12, further comprising a control module, wherein the control module activates the activation signal generator (10). 14 ), wherein the control module is adapted to receive a sensor signal from another sensor, wherein the control module is configured to use the information about the mechanical stress level to improve a measurement accuracy of the sensor signal and the activation signal Using the activation signal generator ( 14 ) to create. The detection circuit of claim 13, wherein the control module further comprises the calibration module, and wherein the control module is configured to modify the sensor signal using the at least one modification signal, wherein the modification signal is based on the calibration information and based on the mechanical stress level information, and wherein the control module is configured to generate the activation signal if the at least one modification signal exceeds a threshold value. The detection circuit of claim 12, wherein the calibration information comprises at least one of a stress dependent offset for adding to the sensor signal from the other sensor signal or a stress dependent gain factor for multiplying with the sensor signal from the other sensor. The detection circuit according to one of the preceding claims, wherein the signal generated by the activation signal generator ( 14 ) is formed to cause activation of a security measure. The detection circuit according to one of the preceding claims, wherein the activation signal generator ( 14 ) is further configured to compare signals from two or more sensors, wherein the signals comprise information about the mechanical stress level of two or more semiconductor circuits ( 20 ) and generating the activation signal when a mechanical stress level indicated by the two or more signals deviates by more than a threshold. A safety monitoring circuit ( 100 ) configured to monitor a system, comprising: the detection circuit (15); 10 ) according to any one of claims 1 to 17; and a control module ( 110 ) configured to receive the activation signal from the activation signal generator ( 14 ) and to apply a security measure to the system when the activation signal is received. A safety monitoring circuit ( 100 ) adapted to monitor a system ( 20 ), comprising: a stress monitoring module ( 12 ) configured to monitor a sensor signal and to determine an estimated deviation of a sensor signal caused by a mechanical stress level of a semiconductor circuit ( 20 ) is caused; an activation signal generator ( 16 ), which is designed to generate an activation signal, comprising an activation information related to the mechanical stress level of the semiconductor circuit ( 20 ) when a predefined relationship between the sensor signal and the estimated deviation of the sensor signal is satisfied. The safety monitoring circuit according to claim 19, wherein the stress monitoring module ( 12 ) is further adapted to compensate for deviations in the sensor signal due to a mechanical stress level of the semiconductor circuit ( 20 ), and wherein the activation signal generator ( 16 ) is configured to generate the activation signal when the estimated deviation exceeds a threshold value. A method of monitoring a mechanical stress level of a semiconductor circuit that provides a sensor signal, comprising: monitoring ( 70 ) of a stress signal comprising information about the mechanical stress level of the semiconductor circuit; Provide ( 71 ) of a reference signal; Modify ( 72 ) of at least one of the stress signal or the reference signal based on calibration information for the semiconductor circuit to obtain a modified signal; and generating ( 74 ) of an activation signal comprising an activation information related to the mechanical stress level of the semiconductor circuit depending on a ratio between the modified signal and the stress signal or the reference signal. The method of claim 20 or 21, further comprising reading the calibration information from a nonvolatile memory.

Images