DE102016225988A1 - Method and system for detecting fault currents in memory cells - Google Patents

Abstract

The present invention relates to a method for detecting fault currents in memory cells of a rechargeable electrical energy storage unit, in particular a rechargeable battery unit. The following steps are provided: - continuously determining the respective state of charge of the memory cells at a fixed point in time in the respective operating cycle of the energy storage unit (S1.1), - determining a relative capacity of a respective memory cell (S1.2), - predicting the state of charge of at least one the memory cells at the fixed time of a certain cycle by means of the determined relative capacities of the memory cells (S4.1); and detecting a fault current in the at least one memory cell by comparing the determined charge state with the predicted state of charge of the at least one memory cell at the predetermined time of the particular cycle (S4.2). The invention further relates to a corresponding detection system and a corresponding computer program product.

Description

The invention relates to a method for detecting fault currents in memory cells of a rechargeable electric energy storage unit, in particular a rechargeable battery unit. The invention further relates to a corresponding recognition system and a corresponding computer program product.

State of the art

From the document EP 2 336 794 A2 For example, a method of detecting a leakage current of a battery by means of a floating capacitor for detecting voltage at the terminals of the battery is known. Based on the detected voltage, a leakage resistance is calculated, which is compared with an insulation resistance reference value to determine whether a corresponding leakage current occurs.

Batteries are often used in vehicles as power sources. In hybrid and electric vehicles mainly Li-ion batteries are used. In order to achieve a higher voltage, several cells are usually connected in series. Typically, multiple cells are combined into one module and multiple modules are packaged. To increase safety, the battery packs and modules are equipped with extensive electronics. With the help of sensors different physical quantities like the current, voltages and temperatures are detected. Among other things, the electronics include one or more controllers on which a battery management system is implemented. A battery management system consists of various software algorithms, which among other things calculate limits for the permitted currents and voltages. Another important task of a battery management system is the detection of faults in a battery cell or in the electronics.

One class of errors are internal shorts. If an internal short circuit is not detected in time, the damage to the cell may increase. In extreme cases, there is a so-called "thermal runaway". The cell heats up very much and finally goes up in flames.

There are different types of internal short circuits that develop at different rates and affect the dynamics of the battery in different ways. Of one type are the so-called slow shorts. These are characterized in that the self-discharge rate of a battery increases. The self-discharge leads to a slow decrease of the state of charge (SOC). Slow self-discharge is difficult to detect:

If the battery is discharged by an external consumer or charged by means of an external power source, for example during a vehicle journey, then significantly higher currents flow in the battery. The state of charge SOC of a battery is usually estimated using a battery state detection algorithm. There are many different methods for determining the SOC. Common to this method is that they have only limited accuracy. If, after a load, e.g. A charge, discharge or a whole drive cycle, the battery separated from external power sources and consumers, so after some time for each cell, a quiescent voltage (OCV: Open Circuit Voltage). However, due to chemical and physical processes in a cell, the cell voltage often changes over several hours after a current has passed through it. In addition, the voltage can only be determined with a limited measuring accuracy. An increased self-discharge leads to a slow voltage drop of the cell. For these reasons, it is very difficult to distinguish the voltage drop by an increased self-discharge of other phenomena and thus to detect a slow short circuit.

Disclosure of the invention

The inventive method with the features mentioned in claim 1 and the inventive system with the features mentioned in claim 8 has the advantage that they allow the detection of a slow decline of the state of charge due to fault currents in cells.

1. (i) fortlaufendes Bestimmen des jeweiligen Ladungszustandes SOC der Speicherzellen zu einem festgelegten Zeitpunkt im jeweiligen Arbeitszyklus der Energiespeichereinheit;
2. (ii) Ermitteln einer relativen Kapazität c_rel einer jeweiligen Speicherzelle;
3. (iii) Prognostizieren des Ladungszustandes zumindest einer der Speicherzellen zu dem festgelegen Zeitpunkt t₂ eines bestimmten Zyklus mittels der ermittelten relativen Kapazitäten c_rel der Speicherzellen; und
4. (iv) Erkennen eines Fehlstroms bei der zumindest einen Speicherzelle durch Vergleich des ermittelten Ladungszustandes mit dem prognostizierten Ladungszustand der zumindest einen Speicherzelle zu dem festgelegten Zeitpunkt t₂ des bestimmten Zyklus. Optional schließt sich (v) eine Ausgabe eines entsprechenden Ausgabewertes an, was im einfachsten Fall das Versenden einer Information über das Erkennen des Fehlstroms nach außen ist. Die Einheit kann ein Modul, z.B. ein Batteriemodul, oder ein Pack, z.B. ein Batteriepack, sein.

In the method for detecting fault currents in memory cells of a rechargeable electric energy storage unit, in particular a rechargeable battery unit, which passes through several working cycles, the following steps are provided according to the invention:

1. (i) continuously determining the respective state of charge SOC of the memory cells at a predetermined time in the respective operating cycle of the energy storage unit;
2. (ii) determining a relative capacitance c _{rel of} a respective memory cell;
3. (iii) predicting the state of charge of at least one of the memory cells at the fixed time t _{2 of} a particular cycle by means of the determined relative capacitances c _{rel of} the memory cells; and
4. (iv) detecting a fault current in the at least one memory cell by comparing the determined state of charge with the predicted state of charge of the at least one memory cell at the predetermined time t _{2 of} the particular cycle. Optionally, (v) is followed by an output of a corresponding output value, which in the simplest case is the sending of information about the detection of the fault current to the outside. The unit may be a module, eg a battery module, or a pack, eg a battery pack.

According to a preferred embodiment of the invention, the relative capacitance c _{rel of} the respective memory cell j results in the step of determining it by determining a ratio of the change in the state of charge SOC of this memory cell between the specified instant t _2, indicating the relative capacitance c _{rel of} the respective memory cell j one of the cycles, ie cycle k, and the fixed point in time t _{1 of} a cycle k-1 preceding this cycle, to change the state of charge SOC of a memory cell of the unit defined as reference cell i between the specified time t ₂ of one of the cycles, ie cycle k , and the fixed time t _{1 of} the cycle k-1 preceding this cycle k. In other words, the capacitance c _{rel of} the respective memory cell j is given by the following equation: $$c_{rel.j}\left(k\right)=N\times \frac{SO{C}_j\left(k\right)-SO{C}_j\left(k-1\right)}{{\displaystyle \underset{j}{\Sigma }SO{C}_j\left(k\right)-SO{C}_j\left(k-1\right)}}$$

According to a further preferred embodiment of the invention, it is provided that the prediction of the state of charge of the respective memory cell at the fixed point in time of the one cycle results according to the following equation: $$SO{C}_{j.PrOG}\left(t_2\right)=SO{C}_j\left(t_1\right)+c_{rel.j}\times \left(SO{C}_i\left(t_2\right)-SO{C}_i\left(t_1\right)\right)$$

In this case, SOC _{j, Prog is} the predicted state of charge of the respective memory cell and SOC _{i is} the specific state of charge of the reference cell.

According to yet another preferred embodiment of the invention, it is provided that the respective charge state SOC of the memory cells j at the fixed time t _{2 is given} by the following equation: $$SO{C}_j\left(t_2\right)=SO{C}_j\left(t_1\right)+c_j\times {\displaystyle \int Idt}+kOnst\times {\displaystyle \int {{\rm I}}_{KurzscHluss.j}dt}+{\mathrm{\Delta }}_{MOdell-undMessfeHler}$$

In this case, I is the current, I _{short circuit, j} a short-circuit current, const a constant and Δ _{model and measurement errors} a blur due to model and measurement errors.

It is further provided with advantage that the determination of the respective charge state SOC of the memory cells by measuring the respective idle or open circuit voltage (OCV: open circuit voltage) takes place.

According to a further preferred embodiment of the invention, the duty cycle is (a) a charge / discharge cycle of the rechargeable electric energy storage unit or a driving cycle of the rechargeable electric energy storage unit of a vehicle.

According to yet another preferred embodiment of the invention, the fault current is an energy storage unit or memory cell internal short-circuit current.

1. (i) fortlaufendes Bestimmen des jeweiligen Ladungszustandes SOC der Speicherzellen zu einem festgelegten Zeitpunkt im jeweiligen Arbeitszyklus der Energiespeichereinheit;
2. (ii) Ermitteln einer relativen Kapazität c_rel einer jeweiligen Speicherzelle;
3. (iii) Prognostizieren des Ladungszustandes zumindest einer der Speicherzellen zu dem festgelegen Zeitpunkt t₂ eines bestimmten Zyklus mittels der ermittelten relativen Kapazitäten c_rel der Speicherzellen;
4. (iv) Erkennen eines Fehlstroms bei der zumindest einen Speicherzelle durch Vergleich des ermittelten Ladungszustandes mit dem prognostizierten Ladungszustand der zumindest einen Speicherzelle zu dem festgelegten Zeitpunkt t₂ des bestimmten Zyklus; und
5. (v) Ausgabe eines entsprechenden Ausgabewertes.

In the corresponding system for detecting fault currents in memory cells of a rechargeable electrical energy storage unit, in particular a rechargeable battery unit, it is provided according to the invention that the system is set up to carry out the following steps:

1. (i) continuously determining the respective state of charge SOC of the memory cells at a predetermined time in the respective operating cycle of the energy storage unit;
2. (ii) determining a relative capacitance c _{rel of} a respective memory cell;
3. (iii) predicting the state of charge of at least one of the memory cells at the fixed time t _{2 of} a particular cycle by means of the determined relative capacitances c _{rel of} the memory cells;
4. (iv) detecting a fault current in the at least one memory cell by comparing the detected charge state with the predicted state of charge of the at least one memory cell at the specified time t _{2 of} the particular cycle; and
5. (v) Output of a corresponding output value.

The system is in particular a system for carrying out the aforementioned method.

1. (a) einem Prozessor,
2. (b) zumindest einem Datenspeicher und
3. (c) zumindest einer Schnittstelle auf.

According to a preferred embodiment of the system according to the invention, this system has a computer device

1. (a) a processor,
2. (b) at least one data store and
3. (c) at least one interface.

The computer device preferably has these components for carrying out the aforementioned steps.

The invention further relates to a computer program product for carrying out the aforementioned method on a computer device comprising a processor and a data memory.

Further advantages and advantageous embodiments of the subject invention are illustrated by the following embodiment and the accompanying drawings and described in the following description, the features described individually or in any combination may be an object of the present invention, insofar as not from the context clearly gives the opposite. It should be noted that the drawing has only descriptive character and are not intended to limit the invention in any way.

Example:

In a resting phase in which no current flows, the state of charge of each cell is determined and stored after a reasonable waiting time. After the next load phase, the charge states are determined again and the difference is formed for each cell. For a larger number of cells, eg the cells in a module or pack, the OCV (open circuit voltage) of each cell in the pack or module is determined and from this the SOC is calculated. At a later time, when the OCV can be determined with high accuracy, such as at the end of the drive cycle or other duty cycle, the SOC values are again determined using the OCV. The SOC difference for each cell is proportional to the total amount of charge taken or added. The SOC of a cell j at time k is calculated in the following way: $$SO{C}_j\left(k\right)=SO{C}_j\left(k-1\right)+c_j\times {\displaystyle \int Idt+kOnst\times {\displaystyle \int {{\rm I}}_{KurzscHluss.j}dt+\mathrm{\Delta }SO{C}_{relax}}}$$

The quantity c _j denotes the capacity of a cell j. The current I _{short circuit, j} is very small for a "healthy" cell and can be neglected. On average, this size plays only a minor role for a cell which has no defect. Depending on the dynamics of the current in the last load phase and the elapsed waiting time, the SOC also contains an offset ΔSOC _relax to the rest voltage OCV.

Using the following calculation rule, a relative capacity is determined for each cell: $$c_{rel.j}\left(k\right)=N\times \frac{SO{C}_j\left(k\right)-SO{C}_j\left(k-1\right)}{{\displaystyle \underset{j}{\Sigma }SO{C}_j\left(k\right)-SO{C}_j\left(k-1\right)}}$$

N is the number of cells.

The quantities c _{rel, j} (k) are stored. In addition, the cell voltages are stored at the end of the quiescent phase and the values c _{rel, j} (k) are recalculated in the next phase. For each cell, the value c _{rel, j is} filtered appropriately over several cycles. For a long time, the scattering of the values between the cells Δ _j c _{rel, j} and the scattering of a cell Δ _k c _{rel, j} (k) over many cycles is considered.

According to Equations (1) and (2), the SOC of a cell having no error can be predicted with the aid of the learned value c _{rel, j} . For this, the SOC values of all other cells must be known: $$SO{C}_{j.\text{pr}OG}\left(k\right)=SO{C}_j\left(k-1\right)+c_{relativ.j}\times \frac{\left({\displaystyle \underset{i\ne j}{\Sigma }SO{C}_i\left(k\right)-SO{C}_i\left(k-1\right)}\right)}{N-1}$$

Due to the measurement inaccuracy and various other effects, the predicted value deviates from the actually measured value. With the help of the relative variations Δ _{k rel c, j} (k) and Δ _j c _{rel, j} which have been determined in previous measurements, the statistical uncertainty of the prediction can be specified: $$\mathrm{\Delta }SO{C}_{j.\text{pr}OG}\left(k\right)=\text{Max}({\mathrm{\Delta }}_j{c}_{relativ.j}.{\mathrm{\Delta }}_k{c}_{relativ.j}\left(k\right)\times \frac{\left({\displaystyle \underset{i\ne j}{\Sigma }SO{C}_i\left(k\right)-SO{C}_i\left(k-1\right)}\right)}{N-1}$$

If the deviation is significantly greater than the expected statistical dispersion, then this is according to formula (1) an indication of an increased leakage current or short-circuit current I _{short-circuit, j} . This means that cell j will fail if the following condition is true: $$SO{C}_{j.\text{pr}OGnOse}\left(k\right)-SO{C}_j\left(k\right)>>\mathrm{\Delta }SO{C}_{j.\text{pr}OGnOse}\left(k\right)$$

Concrete Embodiment of the Example:

By way of illustration we consider a module of 4 cells. The charge states of the cells are considered in three phases of rest and give the following values: Index j of the cell SOC in 1st resting phase SOC in 2nd resting phase SOC in 3rd resting phase 1 20% 80% 30% 2 21% 82% 20% 3 20.05% 84% 31% 4 05.20% 80% 30%

2 $\frac{82-21}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=1$

3 $\frac{84-20.5}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=1.0498$

4 $\frac{80-20.5}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=1.0098$

During the second rest period, the following values are calculated for the relative capacities: Index j of the cell c _{rel, j} (1) 1 $4\times \frac{80-20}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=0.9836$

2 $\frac{82-21}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=1$

3 $\frac{84-20.5}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=1.0498$

4 $\frac{80-20.5}{\left(80-20\right)+\left(82-21\right)+\left(84-20.5\right)+\left(80-20.5\right)}=1.0098$

The scatter Δc _rel is 0.0498.

For the third sleep phase, the following SOC value is predicted for cell 2 on this basis: $$SO{C}_{\mathrm{2,}\text{pr}OG}\left(3\right)=SO{C}_j\left(2\right)+1\times \frac{\left(30-80\right)+\left(31-84\right)+\left(30-80\right)}{3}=31\text{\%}\text{,}$$

The estimated statistical variance is: $$\mathrm{\Delta }SO{C}_{\mathrm{2,}\text{pr}OG}\left(3\right)=0.0498\times \frac{\left(30-80\right)+\left(31-84\right)+\left(30-80\right)}{3}=2.5\%$$

The actual deviation is31% -20% = 11%, which is significantly larger than the statistical deviation. This indicates a defect in cell 2.

In the following, the application of the method for detecting spurious currents in memory cells of a rechargeable electrical energy storage unit in the example described above is to be visualized in a figure.

• 1 ein Blockschaltbild des Verfahrens gemäß einer bevorzugten Ausführungsform.

It shows the

• 1 a block diagram of the method according to a preferred embodiment.

The 1 shows the schematic sequence of the method in the context of the previously discussed example in a block diagram, which comprises four steps S1, S2, S3, S4. In this case, both step S1 comprises two substeps S1.1, S1.2 and step S4 comprises two substeps S4.1, S4.2.

In step S1, it is first checked whether the current I is turned on. If no current flows (I = 0), wait until current flows (I> 0). This sets the start of the work cycle in the example. This results in the example so as the beginning of the discharge cycle or driving cycle. Before the current is switched on, in particular immediately before the current is switched on, the state of charge values (SOC values) should be determined and, if necessary, stored - substep S1.1. Subsequently, determining / calculating the relative capacity c _rel , in particular with a filtering of the already "learned" values. - Sub-step S1.2.

In step S2, the end of the unloading portion of the duty cycle is determined. To do this, wait for a current> 0 until the current = 0.

In step S3, a relaxation time is introduced. For this purpose, in the event that the current = 0 is still waiting until the predefined relaxation time, for example one hour ( 1h ) is reached.

In step S4, the SOC values-based on the relative capacities c _rel ^{-are then} predicted in a first sub-step S4.1, and then the diagnosis is carried out in a second sub-step S4.2.

In the following, the core of the invention will be described again in other words with reference to a battery having multiple cells:

Over several cycles of rest and stress, the quiescent voltages become several battery cells, e.g. all cells in a module or pack, measured. A statistical comparison of the cells determines the relative capacities of the cells. After a loading phase, e.g. Charging, discharging or driving cycle, is waited in the subsequent resting phase for some time and then determines the average SOC of the cells. With the aid of the learned relative capacities and the stored charging states at the end of the last rest phase, the SOC can be estimated for each cell. If the difference between the estimated value and the actual value is too large, this indicates increased self-discharge or leakage currents.

In contrast to common methods for determining the state of health (SOH_C), which determines the remaining capacity, this method is independent of the current measurement and thus independent of the measurement accuracy of the current measurement.

The amount by which the charge states change during a relaxation phase is similar for all cells. This systematic error is eliminated by the relative consideration of the states of charge.

The learned relative cell capacities change only very slowly due to the battery aging. These values change more slowly than the SOH_C of the module / pack. Systematic effects that affect all cells equally are also eliminated here.

By capturing multiple cells and looking over a longer period of time, the scatter of relative cell capacities can be detected. In this way it is possible to distinguish significant changes from random noise.

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited patent literature

• EP 2336794 A2 [0002]

Claims (10)

A method for detecting fault currents in memory cells of a rechargeable electrical energy storage unit, in particular a rechargeable battery unit, comprising the following steps: - continuously determining the respective state of charge of the memory cells at a predetermined time in the respective operating cycle of the energy storage unit (S1.1); Determining a relative capacity of a respective memory cell (S1.2); - predicting the state of charge of at least one of the memory cells at the fixed point in time of a particular cycle by means of the determined relative capacities of the memory cells (S4.1); and Detecting a fault current in the at least one memory cell by comparing the determined charge state with the predicted state of charge of the at least one memory cell at the specified point in time of the particular cycle (S.4.2). Method according to Claim 1 characterized in that the relative capacitance of the respective memory cell is determined by determining a ratio of the change in state of charge of that memory cell between the designated time of one of the cycles and the predetermined time of a cycle preceding that cycle to change the state of charge of a memory cell defined as the reference cell Unit between the specified time of one of the cycles and the specified time of the cycle preceding this cycle. Method according to Claim 1 or 2 , characterized in that the prediction of the charge state of the respective memory cell at the fixed time of the one cycle results according to the following equation: $$SO{C}_{j.\text{pr}OG}\left(t_2\right)=SO{C}_j\left(t_1\right)+c_{rel.j}\times \left(SO{C}_i\left(t_2\right)-SO{C}_i\left(t_1\right)\right)$$

where j is an index of the respective memory cell, i is the index of the reference cell, t _{2 is} the specified time of the one cycle, t _{1 is} the fixed time of the cycle preceding this cycle, SOC _{j, Prog is} the predicted state of charge of the respective memory cell, SOC _{j is} the determined state of charge the respective memory cell and SOC _{i is} the specific charge state of the reference cell. Method according to one of Claims 1 to 3 , characterized in that the respective charge state SOC of the memory cells j at the fixed time t _{2 is given} by the following equation: $$SO{C}_j\left(t_2\right)=SO{C}_j\left(t_1\right)+c_j\times {\displaystyle \int {\rm I}dt}+kOnst\times {\displaystyle \int {{\rm I}}_{KurzscHluss.j}}dt+{\mathrm{\Delta }}_{MOdell-undMessefeHler}$$

where j is an index of the respective memory cell, t _{2 is} the specified time of the one cycle, t _{1 is} the fixed time of the cycle preceding this cycle, SOC _{j is} the specific charge state of the respective memory cell, I is the current, I _{short circuit, j is} a short-circuit current, const a Constant and Δ _{model and measurement error is} a blur due to model and measurement errors. Method according to one of Claims 1 to 4 , characterized in that the determination of the respective state of charge of the memory cells by measuring the respective open circuit voltage. Method according to one of Claims 1 to 5 , characterized in that the duty cycle is a charge / discharge cycle or a drive cycle of the rechargeable electric energy storage unit of a vehicle. Method according to one of Claims 1 to 6 , characterized in that the fault current is an energy storage unit or memory cell internal short-circuit current. System for detecting fault currents in memory cells of a rechargeable electric energy storage unit, in particular a rechargeable battery unit, wherein the system is adapted to carry out the following steps: - continuously determining the respective charge state of the memory cells at a predetermined time in the respective operating cycle of the energy storage unit; Determining a relative capacity of a respective memory cell; - Predicting the state of charge of at least one of the memory cells at the fixed time of a particular cycle by means of the determined relative capacities of the memory cells; Detecting a fault current in the at least one memory cell by comparing the determined charge state with the predicted state of charge of the at least one memory cell at the predetermined time t _{2 of} the particular cycle; and - output a corresponding output value. System after Claim 8 characterized by a computer device with a processor, at least one data memory and at least one interface. Computer program product for carrying out a method according to one of Claims 1 to 7 on a computer device comprising a processor and a data memory.

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