DE102015002215A1 - Sortierbeschleunigungsprozessor, -Verfahren, -Systeme und -Befehle - Google Patents

Sortierbeschleunigungsprozessor, -Verfahren, -Systeme und -Befehle Download PDF

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Publication number
DE102015002215A1
DE102015002215A1 DE102015002215.6A DE102015002215A DE102015002215A1 DE 102015002215 A1 DE102015002215 A1 DE 102015002215A1 DE 102015002215 A DE102015002215 A DE 102015002215A DE 102015002215 A1 DE102015002215 A1 DE 102015002215A1
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Germany
Prior art keywords
data
packed
instruction
processor
command
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
DE102015002215.6A
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German (de)
English (en)
Inventor
Shay Gueron
Vlad Krasnov
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Intel Corp
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Intel Corp
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Publication date
Application filed by Intel Corp filed Critical Intel Corp
Publication of DE102015002215A1 publication Critical patent/DE102015002215A1/de
Pending legal-status Critical Current

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    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G06F9/30038—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations using a mask
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/06—Arrangements for sorting, selecting, merging, or comparing data on individual record carriers
    • G06F7/08—Sorting, i.e. grouping record carriers in numerical or other ordered sequence according to the classification of at least some of the information they carry
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/24—Sorting, i.e. extracting data from one or more carriers, rearranging the data in numerical or other ordered sequence, and rerecording the sorted data on the original carrier or on a different carrier or set of carriers sorting methods in general
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F7/00—Methods or arrangements for processing data by operating upon the order or content of the data handled
    • G06F7/22—Arrangements for sorting or merging computer data on continuous record carriers, e.g. tape, drum, disc
    • G06F7/36—Combined merging and sorting
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30021—Compare instructions, e.g. Greater-Than, Equal-To, MINMAX
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30032—Movement instructions, e.g. MOVE, SHIFT, ROTATE, SHUFFLE
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/30007—Arrangements for executing specific machine instructions to perform operations on data operands
    • G06F9/30036—Instructions to perform operations on packed data, e.g. vector, tile or matrix operations
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30098—Register arrangements
    • G06F9/30105—Register structure
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30145—Instruction analysis, e.g. decoding, instruction word fields
    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30181—Instruction operation extension or modification
    • G06F9/30196—Instruction operation extension or modification using decoder, e.g. decoder per instruction set, adaptable or programmable decoders

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  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Software Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Mathematical Physics (AREA)
  • Computer Hardware Design (AREA)
  • Executing Machine-Instructions (AREA)
  • Advance Control (AREA)
  • Complex Calculations (AREA)
DE102015002215.6A 2014-03-28 2015-02-20 Sortierbeschleunigungsprozessor, -Verfahren, -Systeme und -Befehle Pending DE102015002215A1 (de)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US14/229,811 2014-03-28
US14/229,811 US9766888B2 (en) 2014-03-28 2014-03-28 Processor instruction to store indexes of source data elements in positions representing a sorted order of the source data elements

Publications (1)

Publication Number Publication Date
DE102015002215A1 true DE102015002215A1 (de) 2015-10-01

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Family Applications (1)

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DE102015002215.6A Pending DE102015002215A1 (de) 2014-03-28 2015-02-20 Sortierbeschleunigungsprozessor, -Verfahren, -Systeme und -Befehle

Country Status (7)

Country Link
US (2) US9766888B2 (https=)
JP (2) JP6163171B2 (https=)
KR (1) KR101787819B1 (https=)
CN (2) CN109240744A (https=)
DE (1) DE102015002215A1 (https=)
GB (1) GB2524617B (https=)
TW (1) TWI587215B (https=)

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US10007519B2 (en) * 2015-12-22 2018-06-26 Intel IP Corporation Instructions and logic for vector bit field compression and expansion
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US11204764B2 (en) * 2016-03-31 2021-12-21 Intel Corporation Processors, methods, systems, and instructions to Partition a source packed data into lanes
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US11740868B2 (en) 2016-11-14 2023-08-29 Google Llc System and method for sorting data elements of slabs of registers using a parallelized processing pipeline
US10515302B2 (en) * 2016-12-08 2019-12-24 Via Alliance Semiconductor Co., Ltd. Neural network unit with mixed data and weight size computation capability
US20190102181A1 (en) * 2017-09-29 2019-04-04 Intel Corporation Apparatus and method for shifting and extracting packed data elements
US11176084B2 (en) * 2017-11-09 2021-11-16 International Business Machines Corporation SIMD instruction sorting pre-sorted source register's data elements into a first ascending order destination register and a second descending destination register
WO2019114842A1 (zh) 2017-12-14 2019-06-20 北京中科寒武纪科技有限公司 一种集成电路芯片装置
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US10768896B2 (en) * 2017-12-21 2020-09-08 Intel Corporation Apparatus and method for processing fractional reciprocal operations
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US20200050452A1 (en) * 2018-08-11 2020-02-13 Intel Corporation Systems, apparatuses, and methods for generating an index by sort order and reordering elements based on sort order
US10725738B2 (en) 2018-08-31 2020-07-28 International Business Machines Corporation Adaptive sort accelerator sharing first level processor cache
US10691412B2 (en) 2018-08-31 2020-06-23 International Business Machines Corporation Parallel sort accelerator sharing first level processor cache
US10579332B1 (en) 2018-08-31 2020-03-03 International Business Machines Corporation Hardware sort accelerator sharing first level processor cache
US10922080B2 (en) * 2018-09-29 2021-02-16 Intel Corporation Systems and methods for performing vector max/min instructions that also generate index values
JP6687700B2 (ja) * 2018-10-05 2020-04-28 楽天株式会社 情報処理装置、情報処理方法およびプログラム
US11163564B1 (en) * 2018-10-08 2021-11-02 Verisilicon Microelectronics (Shanghai) Co., Ltd. Vector compare and store instruction that stores index values to memory
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US10831503B2 (en) 2018-11-06 2020-11-10 International Business Machines Corporation Saving and restoring machine state between multiple executions of an instruction
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Also Published As

Publication number Publication date
CN109240744A (zh) 2019-01-18
JP6163171B2 (ja) 2017-07-12
US9766888B2 (en) 2017-09-19
JP2017157244A (ja) 2017-09-07
CN104951401A (zh) 2015-09-30
GB201500857D0 (en) 2015-03-04
GB2524617A (en) 2015-09-30
TW201602904A (zh) 2016-01-16
GB2524617B (en) 2017-09-27
CN104951401B (zh) 2018-08-03
JP2015191659A (ja) 2015-11-02
TWI587215B (zh) 2017-06-11
KR20150112781A (ko) 2015-10-07
KR101787819B1 (ko) 2017-10-18
US20150277912A1 (en) 2015-10-01
US20180004520A1 (en) 2018-01-04

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