DE102012210663A1 - Method for controlling inverter mounted in drive train of motor vehicle, involves providing electrical voltage when inverter is switched to tension-free switching state and tension switching state within pulse width modulation period - Google Patents

Abstract

The method involves supplying a multi-phase electric current (I-U,I-V,I-W) to an electric machine (14) of an inverter (10). The inverter is controlled by the successive different switching states of the controllable switches (S-HA-S-HC,S-LA-S-LC) to provide an electrical voltage in the form of a voltage space vector. The electrical voltage is provided when the inverter is switched to the tension-free switching state and tension switching state within a pulse width modulation period. Independent claims are included for the following: (1) device for controlling inverter; and (2) drive train of motor vehicle.

Description

The present invention relates to a method for driving an inverter by means of space vector pulse width modulation, in particular for driving an electrical machine, wherein the inverter comprises a plurality of components, which are formed by a plurality of controllable switches and a corresponding plurality of free-wheeling diodes, wherein the inverter is adapted is to provide a polyphase electric current, in particular in order to supply the electric machine polyphase with electric current, wherein the inverter is driven such that a plurality of successive switching states of the switches is arranged to provide an electrical voltage in the form of a voltage space vector, said Inverter is switched within a pulse width modulation period by means of at least one of the switching states in a voltage-free switching switching state, and by means of at least one of the switching conditions is switched to a voltage state in which the electrical voltage is provided.

The present invention further relates to an apparatus for driving an inverter, in particular for driving an electrical machine, wherein the inverter comprises a plurality of components, which are formed by a plurality of controllable switches and a corresponding plurality of free-wheeling diodes, and which are connected thereto, to provide a polyphase electric current, in particular to multiphase electric power to the electrical machine, comprising a controller adapted to drive the inverter so that the inverter accepts a plurality of successive switching states of the switches to form an electrical voltage to provide a voltage space pointer, wherein one of the switching states within a pulse width modulation period switches the inverter in a de-energized switching state and one of the switching states within the pulse width modulator period the inverter switches to a voltage state to provide the electrical voltage.

Finally, the present invention relates to a motor vehicle drive train with at least one electric machine for providing drive power, an inverter for driving the electric machine and with a device for driving the inverter of the type described above.

State of the art

In the technical field of three-phase current consumers in general and three-phase electrical machines in particular, different driving methods are known. Currently, the method of space vector modulation for controlling the three-phase current consumer is currently preferred. In this driving method, a space pointer is formed by sequentially setting eight ground voltage hands. In order to provide the string voltage, the ground voltage phasors are switched pulse width modulated, so that a corresponding drive voltage is generated.

In the known driving method, the electrical loads are controlled by means of an inverter with power semiconductor switches. The adjustment of the eight successive ground voltage pointers for generating the voltage space vector is realized by alternately turning on and off certain power semiconductor switches of the inverters. At very low rotational speeds of the space hand or, if the three-phase load is an electrical machine, at low speeds of the driven electrical machines individual power semiconductors are switched very often or very long and thus thermally stressed by a very long or very frequently flowing electric current. Therefore, the power semiconductor switches must be designed for very long turn-on times and for very large currents, whereby the inverter is generally technically complex.

In order to counteract one, in particular thermal, overloading of the power semiconductor switches, for example, in the WO 2010 / 000548A2 proposed to omit one of two de-energized switching states in certain pulse width modulation periods in order to reduce the switching losses of the power semiconductor switches.

Since the, in particular thermal, load of individual power semiconductor switches of the inverter is dependent on a phase angle of the provided Stromraumzeer or individual power semiconductor switches of the inverter for different phase angles of the provided Stromraumzeer be charged differently, for example in the DE 10393516 T1 proposed to use a certain zero vector in certain angular ranges of the provided Stromraumzeer to reduce the switching losses of the power semiconductor switches.

The disadvantage here is that the switching between a de-energized switching state to another de-energized switching state to distribute the burden of the switches and freewheeling diodes, switching operations requires in which the switching states of all switches of the inverter must be changed whereby high switching losses occur.

Disclosure of the invention

According to the invention, therefore, a method for driving an inverter by means of space vector pulse width modulation of the aforementioned type is provided, wherein the inverter is switched by means of a last switching state within the pulse width modulation period in one of the voltage states. In particular, the inverter is switched to a voltage state to provide the electrical voltage.

Furthermore, an apparatus for driving an inverter of the type mentioned above is therefore provided according to the invention, wherein the controller is further adapted to switch the inverter by means of a last switching state within the pulse width modulation period in one of the voltage states.

Finally, according to the invention, a motor vehicle drive train is provided with at least one electric machine for providing drive power, an inverter for driving the electric machine and with a device for driving the inverter of the type described above.

Advantages of the invention

Since the last of the switching states within the pulse width modulation period switches the inverter into a voltage state, the following pulse width modulation period can begin with a switching state switching to a voltage state and thereby form a transition between two different voltage-free switching switching states and thus reduce the switching losses. Furthermore, it is possible to change between pulse width modulation periods with different voltage-free-switching switching states without additional switching losses occurring. As a result, the variation bandwidth of the possible switching sequences can thus be increased with low switching losses, and thus the degree of freedom of the control can be increased. In addition, can be reduced by the switching to a voltage state switching state at the end of the pulse width modulation period when switching between different voltage-free switching switching states phase current fluctuations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter.

For the purposes of the present invention, a switched-off switching state will be understood as meaning that no supply voltage is present between phases of the inverter at the output terminal of the inverter, and a voltage condition is understood to be applied to the output terminals of the inverter as a supply voltage for an electrical load to be connected . provided.

Preferably, the inverter is further switched by means of a first of the switching states within the pulse width modulation period in a voltage state.

Thereby, the pulse width modulation period can be adapted to the switching states of the previous pulse width modulation period, whereby the switching losses can be further reduced.

It is further preferred if the first switching state within the pulse width modulation period is selected as a function of the last switching state of the previous pulse width modulation period.

As a result, two pulse width modulation periods can be adapted directly to each other, so that the switching losses can be reduced when switching between two pulse width modulation periods.

It is further preferred if the first switching state within the pulse width modulation period is identical to the last switching state of the previous pulse width modulation period.

As a result, the first switching state can be selected with little control effort and the switching losses between the pulse width modulation periods can be reduced to zero, since no switching is necessary.

It is further preferred if one of the switching states is omitted within the pulse width modulation period and an identical switching state within the pulse width modulation period is extended accordingly.

As a result, in general, the number of switching states can be reduced within the pulse width modulation period, whereby the switching operations can be reduced and at the same time the switching losses can be reduced.

It is particularly preferred if the last switching state of the pulse width modulation period is omitted.

As a result, the number of switching states of the switches can be reduced and the last of the switching states can be adapted to a subsequent pulse width modulation period with simple control means.

It is further preferred if one of the switching states within the pulse width modulation period is omitted, if a duty cycle of the switching state falls below a predefined duration.

As a result, the number of switching states within the pulse width modulation period can be further reduced without the triggering of the controlled electrical load being significantly impaired, since a short switch-on duration of the corresponding switching states only insignificantly influences the voltage space pointer to be provided.

It is furthermore preferred if only one of the voltage-free-switching switching states is switched within the pulse width modulation period.

As a result, the switching losses of the inverter can be further reduced and at the same time a non-uniform, in particular thermal, load of the inverter can be counteracted.

It is preferred if the voltage-free switching switching state is selected such that only one switch pair is switched when switching between the switching states of the pulse width modulation period.

As a result, the switching losses within the pulse width modulation period can be further reduced.

It is furthermore generally preferred if the switching states within the pulse width modulation period are connected in series such that only one switch pair is switched when switching between the switching states.

As a result, the switching losses within the pulse width modulation period can be further reduced.

It is also generally preferred that the switching states of the switches of the pulse width modulation period are set for an angular range of the voltage space vector based on sequences of switching states of the switches of a pulse width modulation period of a reference angle range.

As a result, the control engineering effort for setting the switching states within the pulse width modulation period can be reduced, since only a certain number of sequences of switching states have to be determined for an angular range of the voltage space vector.

As mentioned above can be reduced by the present invention, the switching losses of the controllable switches of the inverter, since when switching from a pulse width modulation period to a subsequent pulse width modulation period as little as the controllable switch are switched. Furthermore, the switching losses within the pulse width modulation period can be reduced by the particular sequence of switching states, since only one switch pair of the inverter is switched when switching between the switching states. Finally, it is possible to switch between pulse width modulation periods with different voltage-free switching switching states in order to set different, in particular thermal, load distributions without additional switching losses occurring. Through these measures, the total switching losses of the controllable switch and thus the total losses of the inverter can be reduced, whereby the inverter can be designed in general for lower loads and at the same time by reducing the total losses, the life of the inverter can be increased.

It is understood that features, properties and advantages of the method according to the invention also apply to the device according to the invention or are applicable.

Brief description of the drawings

1 shows in schematic form an inverter for driving an electrical load;

2 shows a complex phasor diagram for explaining the space vector modulation method for driving the inverter of an electrical load;

3 shows in schematic form a course of three phase voltages for setting different voltage space vector;

4 shows in schematic form a course of three strand voltages over two matched pulse width modulation periods; and

5 shows in schematic form a complete phasor diagram for explaining the conversion of switching sequences of different angular ranges of the voltage space vector.

Embodiments of the invention

In 1 is an inverter for driving an electrical load, in particular an electric machine shown schematically and generally with 10 designated.

The inverter 10 is with a DC voltage source 12 connected and serves to the electrical consumer 14 in this case as an electric machine 14 is designed to energize three-phase. The inverter has three half-bridges, which are parallel to the DC voltage source 12 are connected and each have two controllable switch S. Between the switches S is in each case a half-bridge tap 16 formed, each with a phase conductor of the phases U, V, W of the electric machine 14 are connected. Parallel to the DC voltage source 12 is a DC link capacitor connected.

Parallel to the switches S, a freewheeling diode D is in each case connected, which allows a current flow in the opposite direction.

In 1 are the switches S corresponding to the phase U, V, W, they provide and according to the assignment to a high potential of the DC voltage source 12 or a low potential of the DC voltage source 12 denoted SHA, SLA, SHB, SLB, SHC, SLC. Accordingly, the freewheeling diodes are designated DHA, DLA, DHB, DLB, DHC, DLC.

By alternately opening and closing the switch S, a drive voltage is applied in each case between the phase conductors U, V, W, so that in each case a phase current IU, IV, IW adjusts, which sets the electric machine 14 drives. The inverter 10 is preferably formed by means of semiconductor switches. The switches of the inverter are by means of a control unit shown schematically 18 alternately opened and closed to provide the phase voltages with a certain gradient, and to provide a rotating voltage space pointer and the electric machine 14 to energize accordingly with the phase currents IU, IV, IW. At the same time, the voltage vector is generated by the inverter 10 provided, whereupon the current space pointer adjusts accordingly depending on the controlled load.

In 2 is a complex phasor diagram for explaining the space vector modulation for driving the electrical load 14 or the electric machine 14 represented and generally with 20 designated.

In the pointer diagram 20 is a voltage vector V * with a drive angle α of the electric machine 14 shown. In the pointer diagram 20 Also shown are six ground voltage indicators V1, V2, V3, V4, V5, V6, which result when one or two of the switches S of the inverter 10 be closed and the electric machine is controlled accordingly. In order to set the voltage vector V * with a maximum length, which in this example has the actuation angle α between the ground voltage indicators V1 and V2, this is achieved by alternately driving the inverter 10 realized in accordance with the base voltage vector V1 and the ground voltage vector V2. The two ground voltage vectors V1, V2 are alternately set with a predefined switching frequency, so that the voltage indicator V * with a phase angle of 30 ° results for the same duty cycle of the ground voltage vector V1, V2. If a voltage vector V * has to be set with a larger actuation angle α, the duty cycle of the basic voltage vector V2 is correspondingly extended and the on-time of the basic voltage vector V1 is shortened. Thus, the switch S of the inverter can be controlled by pulsed driving 10 the voltage space vector V * realize with an arbitrary drive angle α.

If the voltage vector V *, as in the in 2 In the case shown with a smaller amount (shorter length) than the basic voltage space vectors V1, V2 is to be set, a zero voltage pointer V0, V7 is set in accordance with which the switches SHA, SHB, SHC on the upper side and SLA, SLB, SLC on the lower side of the inverter 10 are open. The other of the switches S are closed accordingly. Accordingly, the voltage vector V * can be realized by a combination of the basic voltage space vector V1 and V2 and one of the zero voltage V0, V7.

Depending on the voltage space vector V *, a current space vector I * is established. The current space vector I * has an amplitude and a phase angle, which depend on the driven electrical load 14 to adjust. The phase angle of the current space vector I * can be in phase with the phase angle α of the voltage space vector V * or can have a phase shift.

For energizing the electrical load 14 or the electric machine 14 the voltage space vector V * is provided by sequentially adjusting the different fundamental voltage space vectors V1-V6 and the zero voltage pointers V0, V7 in a fast sequence. As a result, the different switches S and the different freewheeling diodes D of the inverter 10 at a correspondingly fast rotating voltage space vector V * evenly loaded, in particular phased evenly loaded. If the rotational frequency of the voltage space vector V * is very low or zero, for example, at low speeds of the electric machine 10 , the corresponding switches S and the freewheeling diodes D of the inverter 10 a phase U, V, W loaded over a long period of time, so that an overload of the respective switches S and the freewheeling diodes D can occur and the switches S and freewheeling diodes D of the inverter 10 are generally unevenly loaded, in particular phased uneven. In order to prevent overloading of each of the switches S and freewheeling diodes D, measures must be taken to distribute the load to different ones of the switches S and freewheeling diodes D.

In 3 are waveforms of the phase voltages of the three phases U, V, W within a pulse width modulation period T shown to set the basic voltage space pointers V0, V1, V2, V7 successively. Within the pulse-width modulation period T, a duty cycle t ₀ , t ₁ , t ₂ , t _{7 of} the individual basic voltage space vector V0, V1, V2, V7 can be varied in order to be able to precisely set the voltage space vector V *.

wobei t0 die Schaltdauer des Nullspannungszeigers V0 und t7 die Schaltdauer des Nullspannungszeigers V7. Der Belastungswert m kann folglich zwischen dem Wert 1 und dem Wert 0 eingestellt werden, wobei bei einem Wert 1 die oberen Schalter SHA, SHB, SHC bzw. die oberen Freilaufdioden DHA, DHB, DHC des Wechselrichters 10 stärker belastet werden und bei einem Wert 0 die unteren Schalter SLA, SLB, SLC bzw. unteren Freilaufdioden DLA, DLB, DLC des Wechselrichters 10 stärker belastet werden. Dies gilt speziell für die Berechnung des Belastungswertes m sofern zwei benachbarte Grundspannungsraumzeiger V1–V6 und wenigstens ein Nullspannungszeiger V0, V7 verwendet wird, wie beispielsweise für eine Ansteuerungssequenz nach 3.Since the zero voltage pointer V0 only the switches SLA, SLB, SLC, the low potential of the voltage source 12 are assigned, loaded, and there according to the zero voltage pointer V7, only the switches SHA, SHB, SHC, the high potential of the DC voltage source 12 are assigned, can be compensated by a targeted distribution of the zero voltage pointer V0, V7 uneven load between the upper switches THA, THB, THC and the lower switches TLA, TLB, TLC. Since the distribution of the voltage-free switching switching states V0, V7 has no influence on the voltage vector V *, a load distribution of the switches of the inverter can be achieved by variation between the voltage-free switching switching states V0, V7 10 be set. A corresponding load value m is calculated by the formula

where t0 is the switching time of the zero voltage indicator V0 and t7 is the switching duration of the zero voltage indicator V7. The load value m can thus be set between the value 1 and the value 0, with a value 1, the upper switch SHA, SHB, SHC or the upper freewheeling diodes DHA, DHB, DHC of the inverter 10 more heavily loaded and at a value 0, the lower switches SLA, SLB, SLC and lower freewheeling diodes DLA, DLB, DLC of the inverter 10 be charged more heavily. This is especially true for the calculation of the load value m if two neighboring basic voltage space vector V1-V6 and at least one zero voltage vector V0, V7 is used, as for example for a drive sequence 3 ,

In 4 the three phase voltages U, V, W are shown schematically for two consecutive pulse width modulation periods T1, T2. The pulse width modulation periods T1, T2 are like the pulse width modulation period T off 3 divided into individual switching states V0-V7 of the controllable switch S. The switching states V0-V7 of the switch S each have a duty cycle t. The duty cycle is in 4 designated with two indices, wherein the first index denotes the switching state and the second index the position of the switching state within the pulse width modulation period T1, T2. If the respective switching state occurs only once in the pulse width modulation period, the second index is omitted. As an example, the duty cycle t _13, the duty cycle of the switching state V1, namely the third duty cycle of this switching state V1 within the pulse width modulation period T1. In the following, the switch-on durations t are temporal proportion values of the pulse width modulation period T, wherein the sum of all switch-on times t of a pulse width modulation period T results in each case 1.

The two pulse width modulation periods T1, T2 each have five switching states V0-V7, the first pulse width modulation period T1 having only the zero voltage pointer V0 and the second pulse width modulation period T2 having only the zero voltage pointer V7. Furthermore, the pulse width modulation periods T1, T2 each begin and end with the basic voltage space vector V1. The sequence of switching states V0-V7 of the two pulse width modulation periods T1, T2 is in each case selected such that in each case only one switch pair has to be switched between the individual switching states V0-V7. The switch pairs are each formed by two of the switches S, which are each assigned to one of the phases U, V, W. In other words, the switch pairs are formed by the pairs of switches SHA, SLA and SHB, SLB and SHC, SLC. Since the pulse width modulation periods T1, T2 each begin and end with the same switching state, in this case V1, none of the pulse width modulation periods T1, T2 have to Switch S are switched so that can be switched without additional switching losses between the two pulse width modulation periods T1, T2. Because the zero voltage pointers V0, V7 are not arranged at the beginning or at the end of the respective pulse width modulation period T1, T2, it is possible to switch back and forth between the two sequences without additional switching losses in order to reduce the load on the switches within the inverter 10 to distribute and to load the switches S according to the load setpoint m.

In the following, reference is made to different switching sequences of the switching states V0-V7, wherein the switching sequences are shown only as numerical sequences of the individual switching states V0-V7. As an example, the sequence of the pulse width modulation period T1 is referred to as -12101- and generally described as sequence 1 and the sequence of the pulse width modulation period T2 with -12721- and generally referred to as sequence 2.

The duty cycle t of the switching states of the sequence 1 is calculated by solving the following equation system: V * = (t ₁₁ + t ₁₂ + t ₁₃ ) V ₁ + t ₂ V ₂ + t ₀ V ₀ t ₁₁ + t ₁₂ + t ₁₃ + t ₂ + t ₀ = 1 t ₁₁ = k ₁ t ₁₂ t ₁₁ = k ₂ t ₁₃ where k ₁ and k _{2 are} constants and k ₁ is 0.5 and k ₂ is 1. The constants k ₁ and k ₂ can be selectively varied to phase current variations on the output side and DC voltage variations at the intermediate circuit capacitor of the inverter 10 reduce electromagnetic compatibility and vibration behavior.

The switch-on times t of the switching states of the sequence 2 are calculated by solving the following equation system: V * = (t ₁₁ + t ₁₂ ) V ₁ + (t ₂₁ + t ₂₂ ) V ₂ + t ₀ V ₀ t ₁₁ + t ₁₂ + t ₂₁ + t ₂₂ + t ₂ + t ₀ = 1 t ₁₁ = k ₁ t ₁₂ t ₂₁ = k ₂ t ₂₂ where the constants k ₁ and k _{2 have} the value 1 or the values for the constants k ₁ , k ₂ can be varied, phase currents fluctuations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 to reduce electromagnetic compatibility and to improve the vibration behavior.

The switching states of the sequence 1 can also be exchanged internally, without affecting the control of the electrical load. In this variation, the order of the switching states is -10121- and will be referred to as sequence 3 below.

As mentioned above, it is possible to change between the sequences 1, 2 and 3 in order to set the load setpoint value m by means of the zero voltage pointers V0, V7, without the switching losses being increased by frequent switching between the switches S.

With regard to the selection of the sequences 1 or 3, the sequence 1 is preferred if the previous pulse width modulation period T ends with the switching states V0 and V1, eg -2101- or -12101-, whereas the sequence 3 is preferably used, if the preceding pulse width modulation period T with the switching states V2 and V1 ends, eg -10121-. This can cause phase current fluctuations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 be reduced when switching between the pulse width modulation periods T.

As an alternative to sequences 1 and 3, it is also possible to use the sequence 4-21272 or the sequence 5 -27212. Furthermore, sequence 6-21012 may be used as an alternative to sequence 2. In this case, the sequences differ in each case by the used zero voltage vector V0, V7 and the initial or final switching state, which is formed in the sequences 4 to 6 respectively by the switching state V2.

The duty cycle t of the respective switching states of the sequences 4 and 5 is calculated by solving the system of equations: V * = t ₁ V1 + (t ₂₁ + t ₂₂ + t ₂₃ ) V ₂ + t ₀ V ₀ t ₂ + t ₂₁ + t ₂₂ + t ₂₃ + t ₀ = 1 t ₂₁ = k ₁ t ₂₂ t ₂₁ = k ₂ t ₂₃ where the constant k _{1 has} the value 0.5 and the constant k _{2 has} the value 1. The values of the constants k _1, k ₂ can also be varied to phase current variations on the output side and DC voltage variations at the DC link capacitor of the inverter 10 reduce electromagnetic compatibility and reduce vibration.

The switch-on times t of the switching states of the sequence 6 are calculated by solving the equation system: V * = (t ₁₁ + t ₁₂ ) V ₁ + (t ₂₁ + t ₂₂ ) V ₂ + t ₀ V ₀ t ₁₁ + t ₁₂ + t ₂₁ + t ₂₂ + t ₂ + t ₀ = 1 t ₁₁ = k ₁ t ₁₂ t ₂₁ = k ₂ t ₂₂ where the constants k ₁ , k _{2 have} the value 1. The values of the constants k _1, k ₂ can also be varied to phase current variations on the output side and DC voltage variations at the intermediate circuit capacitor of the inverter 10 reduce electromagnetic compatibility and reduce vibration.

The sequence 4 is preferably used if a preceding pulse width modulation period T ends with the switching states V7 and V2, eg -1272- or -21272-. The sequence 5 is preferably used as long as a preceding pulse width modulation period T ends with the switching states V1 and V2, eg -27212-. This can cause phase current fluctuations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 be reduced and the load of the inverter 10 generally distributed more evenly.

In 5 is the complex vector diagram 20 out 2 schematically illustrated to explain different sectors or angular ranges. Between the basic voltage space vectors V1-V6 is in each case an angular range I - VI is formed, in which the voltage space vector V * is usually formed by a combination of the respective limiting fundamental voltage space vector V1-V6. For example, the voltage space vector V * in sector I is formed by the fundamental voltage space vectors V1 and V2 and the zero voltage vectors V0, V7 as described by sequences 1-6.

If the voltage space vector V * is one of the angular ranges I - VI in another of the angular ranges I - VI changes, the sequence of switching states of the previous pulse width modulation period T can end with a switching state V1-V6, the new angle range I - VI not adjacent. If, for example, the voltage space vector V * is of the angular range VI in the angle range I changes, the last switching state V1-V6 of the previous pulse width modulation period T may be the switching state V6. In this case, a sequence of switching states of the following pulse width modulation period T is set such that the pulse width modulation period T starts with the switching state V6 at which the previous pulse width modulation period T ends. In this case, for example, a sequence of switching states -61012- is used, which is referred to below as sequence 7.

The duty cycle of the respective switching states V0-V7 is calculated by solving the present system of equations: V * = (t ₁₁ + t ₁₂ ) V ₁ + t ₂ V ₂ + t ₆ V ₆ + t ₀ V ₀ t ₁₁ + t ₁₂ + t ₂ + t ₆ + t ₀ = 1 t ₁₁ = k ₁ t ₁₂ t ₀ = k ₁ (1-t ₂ -t ₁₁ -t ₁₂ ) where k ₁ can be 1 and k ₂ can be 0.5. The values for k ₁ and k ₂ can also be varied to compensate for phase current variations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 reduce and improve the electromagnetic compatibility and / or reduce vibrations.

If the voltage space vector V * is out of the angular range II in the angle range I changes and the last switching state V1-V6 of the previous pulse width modulation period T is the switching state V3, a corresponding switching sequence is used, which begins with the switching state V3. In this case, sequence 8 is used -32721-.

The sequences 1 to 8 each have five different switching states, and thus four times downstream within each pulse width modulation period.

If the voltage space vector V * is close to one of the basic voltage space vector V1-V6 or into the angular range I - VI changes, one of the switching states V1-V6 of the pulse width modulation period T has a duty cycle t, which is close to zero. This switching state forms the basic voltage space vector V1-V6, which is the corresponding angular range I - VI bounded on the other or opposite side. In other words, if the voltage space vector V * is close to the base voltage space vector V1, for example, the switch-on time t _{2 of} the switching state V2 is close to zero and can thus be neglected or the corresponding switching state can be omitted. Accordingly, from the Sequence 7, the sequence 9 -6101-, wherein the last switching state V2 deleted from the sequence.

If the voltage space vector V * is close to the base voltage space vector V1 or the corresponding switching state V1, the last switching state V2 is canceled in the case of the sequence 5, so that the sequence 10 results -2721-. Accordingly, the sequence 6 is shortened by the last switching state V2, so that the sequence 11 is formed -2101-, wherein the first switching state V2 is extended accordingly.

In the event that the voltage space vector V * is close to the base voltage space vector V2 or the corresponding switching state V2, the last switching state V1 is canceled in the sequence 3, so that the sequence 12 -1012- arises and in the sequence 2 the last switching state V1 is deleted, so that the sequence 13 -1272- arises.

The switch-on times t of the switching states V1-V6 of the sequences 10 and 13 are calculated by solving the following equation system: V * = t ₁ V ₁ + (t ₂₁ + t ₂₂ ) V ₂ + t ₇ V ₇ t ₁ + t ₂₁ + t ₂₂ + t ₇ = 1 t ₂₁ = kt ₂₂ where k can have a value of 0.5 for the sequence 10 and a value of 2 for the sequence 11. The value of the constant k can be adjusted to phase current variations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 reduce and improve the electromagnetic compatibility and / or reduce vibrations.

The switch-on times t of the switching states V1-V6 of the sequences 11 and 12 are calculated by solving the following equation system: V * = (t ₁₁ + t ₁₂ ) V ₁ + t ₂ V ₂ + t ₀ V ₀ t ₁₁ + t ₁₂ + t ₂ + t ₀ = 1 t ₁₁ = kt ₁₂ where the constant k can assume a value of 0.5 for the sequence 12 and a value of 2 for the sequence 11. Further, the constant k may be varied to include phase current variations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 to reduce electromagnetic compatibility and to improve the vibration behavior.

Since the sequences 10 and 11 each end with the switching state V1 and use different zero voltage vectors V0, V7 and the sequences 12 and 13 each end with the switching state V2 and use different ones of the zero voltage vectors V0, V7, the voltage space vector V * can be selected by different selection of these sequences. are formed using one or the other zero-voltage vector V0, V7 to set the load target value m.

If the voltage space vector V * has a phase angle which is close to a phase angle of a basic voltage space vector V1-V6, the switching states V1-V6 of the basic voltage space vector V1-V6 can be omitted with a short duty cycle t within the pulse width modulation period T. For example, the switching state V1 of the sequence 5 can be omitted if the phase angle of the voltage space vector V * is close to the basic voltage space vector V2, so that the sequence 14 results -272-.

The switch-on duration t of the sequence 14 is calculated by solving the following equation system: | V * | = (t ₂₁ + t ₂₂ ) | V ₂ | t ₂₁ + t ₂₂ + t ₇ = 1 t ₂₁ = kt ₂₂ where k is a value of 1 or the value can be varied to phase current fluctuations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 reduce electromagnetic compatibility and reduce vibration.

If the phase angle of the voltage space vector V * is close to the fundamental voltage space vector V1, the sequence 3 be used, the switching states V2 omitted, so that the sequence 15 arises with the sequence -101-. The turn-on times of the sequence 15 are calculated by solving the equation system: | V * | = (t ₁₁ + t ₁₂ ) | V ₁ | t ₁₁ + t ₁₂ + t ₀ = 1 t ₁₁ = kt ₁₂ where k may have a value of 1 or the value of the constant k may be adjusted to phase current variations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 to reduce and improve the electromagnetic compatibility and the vibration behavior.

Which of the sequences 1 to 10 is selected depends on various criteria. Preferably, the first vector of the pulse width modulation period T should be identical to the last vector of the preceding pulse width modulation period T. The zero voltage vector V0, V7 is determined by the load reference value m. If the voltage space vector V * is the angular range I - VI If one of the sequences 7 or 8, which starts with the switching state with which the preceding pulse width modulation period T ends, should be selected. If the switching losses are to be reduced using the sequence 14 and the last switching state of the preceding sequence is V1, one of the sequences 12 or 13 should be used. If the switching losses should be reduced using the sequence 15 and the last switching state of the preceding sequence is V2, one of the sequences 10 or 11 should be used. If the voltage space vector V * has a phase angle equal or close to the fundamental voltage space vector V1 or V2, and one of the sequences 14 or 15 is to be used to reduce the switching losses, one of the sequences 6, 14, 2 or 15 should be used be in response to the last switching state of the preceding pulse width modulation period T and the zero voltage pointer to be used V0, V7 in response to the load setpoint m.

The sequences are merely examples of the angular range I however, the sequences of the angular range are explained I on all angle ranges I - VI can be extended or applied. In this case, a differential angle is calculated for the phase angle α of the voltage space vector V * to be set by means of the formula: α _diff = - (n - 1) × 60 ° where n is the angular range of the voltage _space vector V * and α _{dif is} the differential angle between the current phase angle α and a converted reference phase angle α _ref . In the event that the voltage space vector V * is to be set with a phase angle α = 150 °, the reference phase angle α _ref is calculated using the formula given above and the formula: α _ref = α + α _diff calculated to α _ref = 30 °.

After one of the sequences 1 to 15 has been selected on the basis of the selection criteria specified above and the reference phase angle α _ref , the selected sequence is projected back again or converted to the angular range III and in this example, the switching states V1, V2 replaced by the switching states V3, V4, wherein the zero voltage pointers V0, V7 for the angular range III remain identical.

Unless the inverter 10 is initially switched to one of the zero voltage states V0 or V7, an initialization sequence must be initiated so that the pulse width modulation period T can start with one of the basic voltage space vector V1-V6.

The following initialization sequences can be used:
Sequence 16: -01-
wherein the turn-on times t are calculated using the system of equations: | V * | = t ₂ | V ₂ | t ₂ + t ₇ = 1 Sequence 17: -012-
wherein the turn-on times t are calculated using the equation system V * = t ₁ V1 + t ₂ V ₂ + t ₇ V ₀ t ₁ + t ₂ + t ₀ = 1 Sequence 18: -0121-
where the switch-on times t calculate with the system of equations: V * = (t ₁₁ + t ₁₂ ) V ₁ + t ₂ V ₂ + t ₀ V ₀ t ₁₁ + t ₁₂ + t ₂ + t ₀ = 1 t ₁₁ = kt ₁₂ wherein the constant k may have a value of 2 or may be set to phase current variations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 and to optimize the electromagnetic compatibility and / or the vibration behavior.
Sequence 19: -72-
where the switch-on times t calculate with the system of equations: | V | = t ₁ | V ₁ | t ₁ + t ₇ = 1 Sequence 20: -721-
where the switch-on times t calculate with the system of equations: V * = t ₁ V ₁ + t ₂ V ₂ + t ₇ V ₇ t ₁ + t ₂ + t ₇ = 1 Sequence 21: -7212-
where the response times t calculate with the system of equations: V * = t ₁ V ₁ + (t ₂₁ + t ₂₂ ) V ₂ + t ₇ V ₇ t ₁ + t ₂₁ + t ₂₂ + t ₇ = 1 t ₂₁ = kt ₂₂ wherein the constant k may be 2 or may be set to phase current variations on the output side and DC voltage fluctuations on the DC link capacitor of the inverter 10 and to optimize the electromagnetic compatibility and / or the vibration behavior.

Through these sequences 16 to 21 possible initialization sequences are given to adapt the initial zero voltage states V0, V7 to the pulse width modulation sequence 1 to 15, each starting with a background voltage space vector V1-V6.

QUOTES INCLUDE IN THE DESCRIPTION

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Cited patent literature

• WO 2010/000548 A2 [0006]
• DE 10393516 T1 [0007]

Claims (13)

Method for controlling an inverter ( 10 ) by means of space vector pulse width modulation, in particular for driving an electrical machine ( 14 ), where the inverter ( 10 ) comprises a plurality of components (S, D), which are formed by a plurality of controllable switches (S) and a corresponding plurality of freewheeling diodes (D), wherein the inverter ( 10 ) is designed to provide a polyphase electric current (IU, IV, IW), in particular around the electric machine ( 14 ) are supplied with electric power in a multiphase manner, the inverter ( 10 ) is controlled such that a plurality of successive switching states (V0-V7) of the switches (S) is set up to provide an electrical voltage in the form of a voltage space vector (V *), wherein the inverter ( 10 ) within a pulse width modulation period (T) by means of at least one of the switching states (V0-V7) in a de-energized switching state (V0, V7) is switched and by means of at least one of the switching states (V0-V7) in a voltage state (V1-V6) is switched in which the electrical voltage is provided, characterized in that the inverter ( 10 ) is switched by means of a last switching state (V0-V7) within the pulse width modulation period (T) in one of the voltage states (V1-V6). Method according to claim 1, wherein the inverter ( 10 ) is further switched by means of a first switching state (V0-V7) within the pulse width modulation period (T) in a voltage state (V1-V6). Method according to Claim 2, wherein the first switching state (V0-V7) is selected within the pulse width modulation period (T) as a function of the last switching state (V0-V7) of the previous pulse width modulation period (T). Method according to one of claims 1 to 3, wherein the first switching state (V0-V7) within the pulse width modulation period (T) is identical to the last switching state (V0-V7) of the previous pulse width modulation period (T). Method according to one of claims 1 to 4, wherein within the pulse width modulation period (T) one of the switching states (V0-V7) is omitted and an identical switching state (V0-V7) within the pulse width modulation period (T) is extended accordingly. The method of claim 5, wherein the last of the switching states (V0-V7) is omitted. Method according to one of claims 1 to 6, wherein one of the switching states (V0-V7) within the pulse width modulation period (T) is omitted if a duty cycle (t0-t7) of the switching state falls below a predefined duration. Method according to one of claims 1 to 7, wherein within the pulse width modulation period (T) only one of the voltage-free switching switching states (V0, V7) is switched. The method of claim 8, wherein the de-energized switching state (V0, V7) is selected such that when switching between the switching states (V0-V7) only one pair of switches is switched. Method according to one of claims 1 to 9, wherein the switching states (V0-V7) within the pulse width modulation period (T) are connected in series such that when switching between the switching states (V0-V7) only one pair of switches is switched. Method according to one of claims 1 to 10, wherein the switching states (V0-V7) of the pulse width modulation period (T) for an angular range ( I - VI ) of the voltage space vector (V *) on the basis of a pulse width modulation period (T) of a reference angle range ( I ). Contraption ( 18 ) for driving an inverter ( 10 ), in particular for driving an electrical machine ( 14 ), where the inverter ( 10 ) comprises a plurality of components (S, D) formed by a plurality of controllable switches (S) and a corresponding plurality of freewheeling diodes (D) and connected thereto, a polyphase electric current (IU, IV, IW ), in particular around the electrical machine ( 14 ) to supply multiphase with electric current, with a control unit ( 18 ), which is adapted to the inverter ( 10 ) in such a way that the inverter ( 10 ) assumes a plurality of successive switching states (V0-V7) of the switches (S) in order to provide a voltage in the form of a voltage space vector (V *), one of the switching states (V0-V7) within a pulse width modulation period (T) controlling the inverter ( 10 ) in a voltage-free switching switching state (V0, V7) and one of the switching states (V0-V7) within the pulse width modulation period (T) the inverter ( 10 ) switches to a voltage state (V1-V6) to provide the electrical voltage (V), characterized in that the control device ( 18 ) is further adapted to the inverter ( 10 ) by means of a last switching state (V0-V7) within the Pulse width modulation period (T) in one of the voltage states (V1-V6) to switch. Motor vehicle drive train with at least one electric machine ( 14 ) for providing drive power, an inverter ( 10 ) for driving the electric machine ( 14 ) and with a device ( 18 ) for driving the inverter ( 10 ) according to claim 12.

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