DE102012110537A1 - Method for transmitting data with a baud rate between data processing units through interface, involves determining whether number of clocks of durations of low bits is located in first region in which code word is interpreted as false - Google Patents

Abstract

The method involves sending a code word of first data processing unit (2.1) to second data processing unit (2.2). Code word is included with start bit, information word and stop bit. Number of clocks of durations of low bits is counted by second data processing unit (3.1). Determination is made to determine whether the number of clocks of durations of low bits is located in first region in which code word is interpreted as false or is located in second region in which code word is interpreted as true or is located in all possible regions in which code word is interpreted as invalid. An independent claim is included for arrangement for transmitting data with a baud rate between two data processing units.

Description

The invention relates to a method for data transmission via a UART interface between a first data processing unit and a second data processing unit.

A UART interface is a digital serial interface used to send and receive data over a data line and forms the standard of serial interfaces on PCs, microcontrollers and industrial environments on various interfaces, especially the Standard EIA-232 or EIA-485 , "UART" stands for Universal Asynchronous Receiver Transmitter.

The data is transmitted as a serial digital data stream with a fixed frame consisting of a start bit, five to a maximum of nine data bits, an optional parity bit for detecting transmission errors, and a stop bit. The special feature is that in the asynchronous mode of operation no separate clock signal is used on a transmission line. Instead, the receiver synchronizes itself over the length of the frame, mediated by the switching edge of start and stop bits, as well as the set baud rate. Since the beginning of a transmission with the start bit can take place at arbitrary times, this serial interface is referred to as asynchronous. To ensure synchronization, the number of transferable bits is limited.

For the data transfer to work, a fixed baud rate is required. With a deviation of more than 5% the communication usually fails. With a tolerance of 3%, error-free communication is generally guaranteed, with a tolerance of 0.5% being preferred. In order to generate a clock frequency with these accuracies, the use of ceramic resonators or quartz is required in practice. This is especially true when the circuit in an extended temperature range of z. B. -20 ° C to 85 ° C or 125 ° C to be operated.

In the area of process automation, field devices are technical devices that are directly related to a production process. "Field" refers to the area outside of control cabinets or control rooms. Field devices are thus both actuators (actuators, valves, ...), sensors (pH, temperature, conductivity, turbidity, ...) and transducers.

The problem will be explained by the communication between two field devices. The first field device is designed as a transmitter, the second field device as a sensor or as a cable with a connected sensor.

The transmitter contains a very powerful data processing unit, such as a microcontroller, FPGA or similar. For the microcontroller in the field device there is sufficient space as well as power supply, i. The microcontroller is generously dimensioned in terms of computing capacity, storage space, interfaces, etc.

In the sensor or in the cable with a connected sensor is also a data processing unit, such as a microcontroller. There, however, the space is limited. In addition, care must be taken that the sensor is operated energy-saving. Due to space and power constraints, it is not possible to provide peripherals for communication with UART. Either a sufficiently accurate clock source would take up too much space, or there is not enough energy to accomplish this.

The invention is based on the object of providing UART communication with standard UART components, in particular software drivers and hardware components, also for power-limited field devices.

• – Senden zumindest eines Codeworts von der ersten Datenverarbeitungseinheit zur zweiten Datenverarbeitungseinheit, wobei das Codewort UART-konform gesendet wird, also das Codewort zumindest ein Startbit, ein Informationswort und ein Stoppbit umfasst, wobei das Informationswort zwischen fünf und neun, bevorzugt acht, Datenbits umfasst, und wobei das Startbit, die Datenbits und/oder das Stoppbit zumindest ein low-Bit beinhalten,
• – Zählen der Anzahl der Takte der Dauer aller low-Bits durch die zweite Datenverarbeitungseinheit, und
• – Entscheiden ob Anzahl der Takte der Dauer aller low-Bits – in einem ersten Bereich liegt, worauf das Codewort als logische 0 interpretiert wird, – in einem zweiten Bereich liegt, worauf das Codewort als logische 1 interpretiert wird, oder – in allen weiteren möglichen Bereichen liegt, worauf das Codewort als ungültig interpretiert wird.

The object is achieved by a method for data transmission at a baud rate between a first data processing unit having a first clock source and a second data processing unit (slave) having a second clock source. The first clock source has a tolerance of less than 5%, in particular less than 0.5%, and the second clock source has a tolerance greater than 0.5%, in particular greater than 5%. The method comprises the steps

• Sending at least one code word from the first data processing unit to the second data processing unit, the code word being UART-compliant, ie the codeword comprises at least one start bit, one information word and one stop bit, the information word comprising between five and nine, preferably eight, data bits, and wherein the start bit, the data bits and / or the stop bit include at least one low bit,
• Counting the number of clocks of the duration of all low bits by the second data processing unit, and
• Deciding whether the number of clocks of the duration of all low bits lies in a first range, whereupon the codeword is interpreted as logical 0, lies in a second range, whereupon the codeword is interpreted as logical 1, or in all other possible ones Ranges, whereupon the codeword is interpreted as invalid.

By the illustrated method, it is also possible with low-power data processing units to make a data transfer. In particular, a data transmission to a data processing unit is possible, which does not have a sufficiently stable clock frequency for a data transmission via UART.

To detect incorrectly transmitted codewords, the codeword additionally comprises a parity bit.

In a further development, the first area B1 is as 1 / baud · lbit1 · f · tol1 ≦ B1 <1 / baud · lbit1 · f · tol2 and the second area B2 as 1 / baud · lbit2 · f · tol1 ≦ B2 <1 / baud · lbit2 · f · tol2 where baud is the baud rate of the data transmission, f is the clock frequency of the second data processing unit, tol1 is the lower tolerance limit, tol2 is the upper tolerance limit, lbit1 is the number of low bits in the first range, and lbit2 is the number of low bits in the second range , The invalid area is defined as the area not covered by the first area and the second area.

By using the two ranges, it can be clearly distinguished whether a logical 0 or 1 has been transmitted. By a lower and upper tolerance limit, the valid range is extended, and the count of the individual clocks need not be so accurate.

For a secure and unambiguous transmission, lbit1 ≥ 4, in particular lbit1 = 8, is used for the number of low bits in the first range.

Furthermore, lbit2 <4, in particular lbit2 = 3, is used for a secure and unambiguous transmission for the number of low bits in the second area.

It is preferable to use tol1 = 0.75 for the lower tolerance limit and tol2 = 1.25 for the upper tolerance limit.

The method can be used to send a UART telegram. The UART telegram advantageously consists of a codeword, preferably a sequence of codewords, as a data preamble and a codeword, preferably a sequence of codewords, for data transmission.

In order to check the secure transmission, a checksum is preferably additionally calculated and sent for a UART telegram.

In an advantageous embodiment, this checksum is calculated by cyclic redundancy check. The cyclic redundancy check is a common method for detecting errors in the transmission.

• – Interpretieren des zumindest einen Codeworts,
• – Zurücksenden einer Antwort von der zweiten Datenverarbeitungseinheit an die erste Datenverarbeitungseinheit, wobei die Antwort aus zumindest einem Antwort-Codewort besteht, wobei das Antwort-Codewort zumindest ein Startbit, ein Informationswort und ein Stoppbit umfasst, wobei das Informationswort zwischen fünf und neun, bevorzugt acht, Datenbits umfasst, und wobei das Startbit, die Datenbits und/oder das Stoppbit zumindest ein low-Bit beinhalten, wobei eine logische 0 so gesendet wird, dass die Anzahl der Takte der Dauer aller zurückgesendeten low-Bits im ersten Bereich liegt, insbesondere entspricht die Anzahl der zurückgesendeten low-Bits im Antwort-Codewort genau der Anzahl der empfangenen low-Bits im Codewort für eine logische 0, und wobei eine logische 1 so gesendet wird, dass die Anzahl der Takte der Dauer aller zurückgesendeten low-Bits im zweiten Bereich liegt, insbesondere entspricht die Anzahl der zurückgesendeten low-Bits im Antwort-Codewort genau der Anzahl der empfangenen low-Bits im Codewort für eine logische 1.

In a preferred embodiment, the method additionally comprises the steps

• Interpreting the at least one code word,
• Returning a response from the second data processing unit to the first data processing unit, the response consisting of at least one response codeword, the answer codeword comprising at least a start bit, an information word and a stop bit, wherein the information word comprises between five and nine, preferably eight, data bits, and wherein the start bit, the data bits and / or the stop bit include at least one low bit, wherein a logical 0 is sent so that the number of clocks of the duration of all returned In particular, the number of returned low bits in the response codeword corresponds exactly to the number of received low bits in the codeword for a logical 0, and a logical 1 is sent such that the number of clocks the duration of all returned low bits is in the second range, in particular, the number of returned low bits in the response codeword corresponds exactly to the number of received low bits in the codeword for a logical 1.

By using the same number of low bits for both transmission and retransmission (different for a logical 0 and a logical 1, respectively), a unique transmission is ensured. In addition, for the second data processing unit, the number of low bits for a logical 0 or 1 to be sent need not be stored. The second data processing unit can simply "mimic" the respective number of low bits of the request.

Preferably, the UART telegram for querying in particular at least one of the elements: serial number, firmware version, status, operating hours, temperature and / or power, and / or in particular at least one of the instructions: turning on display elements, in particular of at least one LED, turning off display elements , in particular of at least one LED, firmware update, shifting to another operating state, and / or resetting to a ground state.

The object is further achieved by an arrangement, wherein the first data processing unit corresponds to a first microcontroller and the second data processing unit corresponds to a second microcontroller.

Preferably, the first microcontroller is associated with a first field device, in particular a transmitter.

Furthermore, it is preferred that the second microcontroller is assigned to a sensor component, wherein means for connection to the first field device are provided on the sensor component on a first side and means for connection to a second field device, in particular to a sensor on a second side.

In summary, the method described above is the description of a kind of "physical layer" of the data transmission. This physical layer works with a subset of the valid symbols of a standard UART. On the master side (first data processing unit), a conventional UART driver (both software and hardware) can be used for this physical layer, both for sending and for receiving telegrams. The advantage is that no UART peripherals are required on the slave side (second data processing unit) and no stable clock source is required.

The invention will be explained in more detail with reference to the following figures. Show it

1 an arrangement according to the invention for communication between two field devices,

2a a diagram of a code word for UART communication that is interpreted as logical 0,

2 B a section of the diagram 2a in magnification, and

3 a diagram of a code word for UART communication, which is interpreted as logical 1.

In the figures, the same features are identified by the same reference numerals.

The arrangement according to the invention in its entirety has the reference numeral 1 and is in the figure 1 shown.

You can see a first field device 2 , designed here as a transmitter. The transmitter 2 has a data processing unit 2.1 , designed here as a microcontroller. The microcontroller 2.1 acts as master. The microcontroller 2.1 is equipped with standard components for UART communication. In particular, the microcontroller has 2.1 a clock source 2.2 , The clock source 2.2 is designed as a precise clock source. In particular, the clock source has 2.2 a tolerance of less than 5%. Preferably, the clock source has 2.2 even a tolerance of less than 0.5%.

To the transmitter 2 connected is a sensor component 3 , The sensor component 3 is designed as a cable. The sensor component 3 again, there is a second field device 4 , here a sensor connected. electric wire 3 and sensor 4 are via an interface 5 connected with each other. the interface 5 is about galvanically decoupled designed as inductive, capacitive or optical interface. Galvanically coupled interfaces are also possible. Through the interface both data (bidirectional) and energy (unidirectional from transmitter 2 to sensor 4 ) transfer.

In the sensor component 3 or in the interface 5 (on the side of the sensor component 3 ) is a data processing unit 3.1 , designed here as a microcontroller. The microcontroller 3.1 acts as a slave. The microcontroller also includes a clock source 3.2 , The clock source 3.2 is much less precise than clock source 2.2 designed. In particular, the clock source has 3.2 a tolerance of more than 0.5%. It is even possible that the clock source 3.2 has a tolerance of more than 5%.

Already in the schematic overview in 1 is clear that the data processing unit 3.1 much smaller dimensions than the data processing unit 2.1 , "Weaker" in the sense of this invention means mainly the already mentioned tolerance of the clock source. However, it is very likely that the data processing unit 3.1 opposite the data processing unit 2.1 also a lower processor performance, a smaller memory, a small bit number or similar. has.

Due to the losses in terms of the properties mentioned consumes microcontroller 3.1 but also less energy and space. In particular, the existing space in the sensor component 3 or in the interface 5 do not allow more powerful microcontrollers with a clock source with a smaller tolerance.

To continue acting as energy efficient as possible, the microcontroller becomes 3.1 operated at very low clock frequencies f, about 250 kHz or 125 kHz.

Due to the limitations in performance and space, it is not possible to use the microcontroller 3.1 equipped with standard components that would enable UART communication.

The method according to the invention therefore proposes communication between the microcontrollers 2.1 / 3.1 before, as in 2a is shown. Exactly shows 2a a diagram of a codeword that is interpreted as logical 0 (ie "low").

The baud rate is 9600 as usual at UART.

If there is no communication, in 2a labeled as Q, UART default to logic 1 (ie, high)

After a start bit S, follow between five and nine, preferably eight data bits, designated as bit 0 to bit 7. After a parity bit P, a stop bit X is sent.

As mentioned earlier, the microcontroller is 3.1 unable to mimic a UART peripheral in software. This is true even if you omit the problem of insufficiently accurate timing.

The microcontroller 3.1 however, is able to stop the duration of low levels.

Sends the master 2.1 For example, a sequence of low levels (ie, a hexadecimal 0x00 bytes), then results on the UART line, a signal in which the idle state to high level is pulled for a certain duration to low. At a clock frequency f of 250 kHz, this is 1.04 ms, which corresponds to about 260 clocks. At a clock frequency f of 125 kHz, this corresponds to about 130 clocks.

In 2 B is a section of 2a shown with the bit 1 in magnification. It recognizes the clock period T, which corresponds to the reciprocal of the clock frequency f. The microcontroller 3.1 counts the number of clocks in the low state.

Sends the master 2.1 Alternatively, a sequence that does not consist exclusively of low levels, for example at least three high levels, encoding is possible.

This is in 3 shown. Sends the master 2.1 a hexadecimal 0xF8 byte, this also results in a single low level on the UART line, this time with a duration of 417 μs, corresponding to 104 clocks at 250 kHz and 52 clocks at 125 kHz (start bit, 3 bits low, 5 bits high, high parity bit).

If one encodes the data to be transmitted exclusively over these two bytes, then it is the slave system 3.1 about stopping the time possible to surely distinguish between these two different symbols.

A tolerance of 25% is set, i. at a clock frequency of 250 kHz it is decided to logically 0 at a number of cycles from 195 to 326, to logical 1 at a number of cycles from 78 to 130. At a clock frequency of 125 kHz is decided to logic 0 at a cycle number of 98 to 163, to logical 1 at a number of cycles from 39 to 65.

The two characters "0x00" and "0xF8" can therefore be distinguished reliably. It is now possible to encode a 0 bit by means of a 0x00 byte sent by the master and a 1 bit by means of a 0xF8 byte. This then gives a bitrate of about 1/8 of the usual bitrate possible on the UART.

If one uses a clock of 125 kHz to stop the time, then the number of cycles lies below 256 and can thus be measured for both symbols with a counter of only 8 bits.

The following table gives an overview of the resulting cases: low-level duration / 125 kHz cycles Status 1 ... 38 invalid symbol 39 ... 65 high-bit 66 ... 97 invalid symbol 98 ... 163 low-bit > 164 Invalid character

If the number of counted low levels does not fall within a defined range, the decision is made invalid.

Sends the master 2.1 for example, a sequence of 16 bytes that are either 0x00 or 0xF8, so the slave can 3.1 decode two bytes of data from these 16 bytes.

The transmitter 2 makes a request to the sensor via a UART protocol 4 or the cable 3 , Possible requests are in particular at least one of the elements: serial number, firmware version, status, operating hours, temperature and / or power, and / or in particular at least one of the instructions: switching on display elements, in particular at least one LED, turning off display elements, in particular of at least an LED, firmware update, move to another operating state, and / or reset to a default state.

The second field device then sends a corresponding response. The slave system 3.1 It is possible to measure both the duration of a "0" symbol and the duration of a "1" symbol. In the response, the data line can then be pulled low for exactly this number of cycles, ie the duration of the low level of the response corresponds to the counted duration of the low level of the question.

This will synchronize the baud rate effectively used by the slave to the baud rate of the master. From the point of view of hardware and software on the master's side, the exchanged data consists of conventional UART symbols. This means that existing software drivers for the data transfer can be used unchanged in an operating system. The difference is for the master only in that the transmitted data are to be interpreted differently because z. B. only a transmitted UART character corresponds to only one transmitted data bit.

To save further energy, there is the microcontroller 3.1 mostly in a sleep mode. If he is woken up by the first sent character from the sleep mode, then it is to be expected that the first character is not completely detected: During the start-up phase, especially during the start-up time of the clock source, the slave controller 3.1 not react.

As a solution approach the preamble telegram is preceded by a preamble, which does not need to be received completely error-free for a successful communication. For example, a sequence of preamble bytes, e.g. For example, four preamble bytes (0x00, 0x00, 0x00, 0xF8) are sent, and after a particular symbol, e.g. B. is recognized after the first recognized "1" symbol (0xF8) on the end of the preamble.

A UART telegram thus consists of a preamble with a sequence of four bytes, as well as further codewords. In particular, a sequence of eight codewords can be sent for data transmission.

In addition, a checksum can be calculated, for example by cyclic redundancy check. Overall, the telegram can thus consist of 20 bytes.

The aforementioned method uses symbols which are distinguished by only one logical level change on the physical layer of the UART. The UART symbols 0xF8 and 0x00 only show one low pulse of different durations on the signal line in their time course. This allows one data bit to be transmitted per UART symbol.

Alternatively, it is also possible to increase the data transmission rate by using UART symbols in which not only one (as shown here) but two low pulses of different durations can be observed in the waveform, whose duration is stopped by the system with inaccurate clock source can. For two low pulses, for example, the four characters 0x1C, 0x1F, 0xEC, 0xFE could be used. For each UART character, two bits could be transmitted instead of one bit at the price of a higher clock frequency required for the time determination. The extension to UART symbols with three or more low pulses is also possible.

LIST OF REFERENCE NUMBERS

1

 arrangement

2

 transmitters

2.1

Microcontroller in 2

2.2

Clock source of 2.1

3

 sensor component

3.1

Microcontroller in 3

3.2

Clock source of 3.1

4

 sensor

5

 interface

f

 clock speed

T

 Pulse_duration

Q

 Quiet

S

 begin

X

 Stop

P

 parity

QUOTES INCLUDE IN THE DESCRIPTION

This list of the documents listed by the applicant has been generated automatically and is included solely for the better information of the reader. The list is not part of the German patent or utility model application. The DPMA assumes no liability for any errors or omissions.

Cited non-patent literature

• Standard EIA-232 [0002]
• EIA-485 [0002]

Claims (15)

Method for data transmission at a baud rate via a UART interface between a first data processing unit ( 2.1 ) with a first clock source ( 2.2 ) and a second data processing unit ( 3.1 ) with a second clock source ( 3.2 ), the first clock source ( 2.2 ) has a tolerance of less than 5%, in particular less than 0.5%, and the second clock source ( 3.2 ) has a tolerance greater than 0.5%, in particular greater than 5%, comprising the steps of - transmitting at least one code word from the first data processing unit ( 2.1 ) to the second data processing unit ( 2.2 ), wherein the code word is sent UART-compliant, that is, the code word comprises at least a start bit (bit S), an information word and a stop bit (bit X), wherein the information word between five and nine, preferably eight, data bits (bit 0 .. Bit 7), and wherein the start bit (bit S), the data bits (bit 0 ... bit 7) and / or the stop bit (bit X) comprise at least one low bit, - counting the number of cycles of the duration all low bits through the second data processing unit ( 3.1 deciding whether the number of clocks of the duration of all low bits lies in a first range (B1), whereupon the codeword is interpreted as logical 0, lies in a second range (B2), whereupon the codeword is logical 1 is interpreted, or • lies in all other possible areas, whereupon the codeword is interpreted as invalid. The method of claim 1, wherein the codeword additionally comprises a parity bit (bit P). The method of claim 1 or 2, wherein the first region (B1) as 1 / baud · lbit1 · f · tol1 ≦ B1 <1 / baud · lbit1 · f · tol2 and the second area (B2) as 1 / baud · lbit2 · f · tol1 ≦ B2 <1 / baud · lbit2 · f · tol2 where baud is the baud rate of the data transmission, f is the clock frequency of the second data processing unit, tol1 is the lower tolerance limit, tol2 is the upper tolerance limit, lbit1 is the number of low bits in the first range, and lbit2 is the number of low bits in the second range , and the invalid area is defined as the area not covered by the first area (B1) and the second area (B2). Method according to Claim 3, wherein lbit1 ≥ 4, in particular lbit1 = 8, is used for the number of low bits in the first range. Method according to Claim 3 or 4, wherein lbit2 <4, in particular lbit2 = 3, is used for the number of low bits in the second range. Method according to at least one of claims 3 to 5, wherein for the lower tolerance limit tol1 = 0.75 is used. Method according to at least one of claims 3 to 6, wherein tol2 = 1.25 is used for the upper tolerance limit. Method according to at least one of claims 1 to 7, where for a UART telegram A codeword, preferably a sequence of codewords, as data preamble and A codeword, preferably a sequence of codewords, for data transmission be used. The method of claim 8, wherein additionally a checksum is calculated and sent for a UART telegram. The method of claim 9, wherein the checksum is calculated via cyclic redundancy checking. Method according to at least one of claims 1 to 10, additionally comprising the steps of - interpreting the at least one code word, - returning a response from the second data processing unit ( 3.1 ) to the first data processing unit ( 2.1 ), wherein the answer consists of at least one response codeword, the answer codeword comprising at least a start bit (bit S), an information word and a stop bit (bit X), the information word comprising between five and nine, preferably eight, data bits ( Bit 0 ... bit 7), and wherein the start bit (bit S), the data bits (bit 0 ... bit 7) and / or the stop bit (bit X) include at least one low bit, wherein a logical 0 is sent so that the number of clocks of the duration of all returned low-bits in the first range (B1) is, in particular, the number of returned low bits in the response code word exactly the number of received low-bits in the code word for a logical 0, and wherein a logical 1 is sent so that the number of clocks of the duration of all returned low-bits in the second area (B2), in particular, the number of returned low bits in the response code word exactly corresponds to the number of received low Bits in the codeword f for a logical 1. Method according to at least one of claims 1 to 11, the UART telegram in particular for querying in particular at least one of the elements: serial number, firmware version, status, operating hours, temperature and / or power, and / or in particular at least one of the instructions: switching on display elements, in particular of at least one LED, switching off display elements, in particular of at least one LED, firmware update, shifting to another operating state, and / or resetting to a ground state. Arrangement ( 1 ) for applying the method according to at least one of claims 1 to 12, wherein the first data processing unit ( 2.1 ) a first microcontroller and the second data processing unit ( 3.1 ) corresponds to a second microcontroller. Arrangement ( 1 ) according to claim 13, wherein the first microcontroller ( 2.1 ) a first field device, in particular a transmitter ( 2 ) assigned. Arrangement ( 1 ) according to claim 13 or 14, wherein the second microcontroller ( 3.1 ) a sensor component ( 3 ), wherein at the sensor component ( 3 ) on a first side means for connection to the first field device and on a second side means for connection to a second field device, in particular to a sensor ( 4 ) are provided.

Images