DE102010011020A1 - Support plate for holding semiconductor wafer for manufacturing e.g. semiconductor component, has circular projection unit arranged at plate such that projection unit lies on edge area of wafer, during holding of wafer - Google Patents
Support plate for holding semiconductor wafer for manufacturing e.g. semiconductor component, has circular projection unit arranged at plate such that projection unit lies on edge area of wafer, during holding of wafer Download PDFInfo
- Publication number
- DE102010011020A1 DE102010011020A1 DE201010011020 DE102010011020A DE102010011020A1 DE 102010011020 A1 DE102010011020 A1 DE 102010011020A1 DE 201010011020 DE201010011020 DE 201010011020 DE 102010011020 A DE102010011020 A DE 102010011020A DE 102010011020 A1 DE102010011020 A1 DE 102010011020A1
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- Prior art keywords
- semiconductor wafer
- wafer
- support plate
- carrier plate
- projection unit
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/673—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders
- H01L21/67346—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere using specially adapted carriers or holders; Fixing the workpieces on such carriers or holders characterized by being specially adapted for supporting a single substrate or by comprising a stack of such individual supports
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/683—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping
- H01L21/687—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches
- H01L21/68714—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support
- H01L21/6875—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere for supporting or gripping using mechanical means, e.g. chucks, clamps or pinches the wafers being placed on a susceptor, stage or support characterised by a plurality of individual support members, e.g. support posts or protrusions
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
Abstract
Description
Ausführungsbeispiele der Erfindung beziehen sich auf Trägerplatten zur Aufnahme einer Halbleiterscheibe.Embodiments of the invention relate to carrier plates for receiving a semiconductor wafer.
Im zunehmenden Maße werden Halbleiterbauelemente unter Verwendung eines sehr dünnen Halbleitergrundmaterials hergestellt. Solche Halbleiterbauelemente finden Verwendung in Chipkarten, Solarzellen, integrierten Schaltungen und Einzelhalbleiterbauelementen wie z. B. Leistungstransistoren und Dioden.Increasingly, semiconductor devices are manufactured using a very thin semiconductor base material. Such semiconductor devices are used in smart cards, solar cells, integrated circuits and individual semiconductor devices such. B. power transistors and diodes.
Herkömmlicherweise werden dünne Halbleiterscheiben hergestellt, in dem eine konventionelle Halbleiterscheibe, auch Wafer genannt, auf eine Trägerplatte aufgeklebt wird und dann die freie Oberfläche der Halbleiterscheibe mechanisch und/oder chemisch so lange bearbeitet wird, bis die gewünschte Zieldicke eingestellt ist. Zur Verklebung des Wafers mit der Trägerplatte wird beispielsweise eine Klebefolie verwendet, wobei aber vorhandene Topologien auf der zu verklebenden Oberfläche der Halbleiterscheibe nicht ausreichend kompensiert werden können.Conventionally, thin semiconductor wafers are produced in which a conventional semiconductor wafer, also called wafer, is adhered to a carrier plate and then the free surface of the semiconductor wafer is processed mechanically and / or chemically until the desired target thickness is set. For bonding the wafer to the carrier plate, for example, an adhesive film is used, but existing topologies on the surface to be bonded to the semiconductor wafer can not be sufficiently compensated.
Ausführungsformen der Erfindung behandeln im Folgenden Trägerplatten, die Topologien an einer Oberfläche einer Halbleiterscheibe kompensieren können.In the following, embodiments of the invention will deal with carrier plates which can compensate for topologies on a surface of a semiconductor wafer.
Die Erfindung wird charakterisiert durch den unabhängigen Anspruch 1. Weiterbildungen der Erfindung finden sich in den abhängigen Ansprüchen.The invention is characterized by
Ausführungsformen der Erfindung beziehen sich im Folgenden auf eine Trägerplatte zur Aufnahme einer Halbleiterscheibe, wobei die Trägerplatte eine umlaufende Erhebung aufweist und wobei die Erhebung derart an der Trägerplatte angeordnet ist, dass sie während der Aufnahme der Halbleiterscheibe auf einem Randbereich der Halbleiterscheibe liegt.Embodiments of the invention relate in the following to a carrier plate for receiving a semiconductor wafer, wherein the carrier plate has a circumferential elevation and wherein the elevation is arranged on the carrier plate such that it lies on an edge region of the semiconductor wafer during the recording of the semiconductor wafer.
Durch die Erhebung werden Topologieunterschiede an der Oberfläche der Halbleiterscheibe kompensiert. Die Erhebung stützt den Trägerwafer auf der Halbleiterscheibe ab. Diese Abstützung erfolgt im Randbereich der Halbleiterscheibe, da in dem Randbereich keine Topologien vorhanden sind. Viele Prozessmaschinen sind nämlich so konzipiert, dass eine Prozessierung der Halbleiterscheibe nicht bis zum Scheibenrand durchgeführt werden darf oder kann.The survey compensates topology differences on the surface of the semiconductor wafer. The survey supports the carrier wafer on the semiconductor wafer. This support takes place in the edge region of the semiconductor wafer, since there are no topologies in the edge region. In fact, many process machines are designed in such a way that processing of the semiconductor wafer can not or should not be carried out right up to the edge of the wafer.
Eine weitere Ausführungsform der Trägerplatte sieht vor, dass die Erhebung eine Höhe HE über eine Hauptoberfläche der Trägerplatte aufweist, wobei die Höhe HE im Bereich von beispielsweise 10 μm bis 100 μm liegt. Diese Höhe HE ist geeignet, die Topologien, die beispielsweise eine ähnliche Höhe aufweisen zu kompensieren.A further embodiment of the carrier plate provides that the elevation has a height H E over a main surface of the carrier plate, wherein the height H E is in the range of for example 10 .mu.m to 100 .mu.m. This height H E is suitable for compensating the topologies, which for example have a similar height.
Vorteilhafterweise entspricht die Höhe HE einer Topologiehöhe HT an der Halbleiterscheibe, weil somit die Topologien mit der Erhebung exakt kompensiert werden können.Advantageously, the height H E corresponds to a topology height H T on the semiconductor wafer, because thus the topologies can be exactly compensated with the elevation.
Eine alternative Ausführungsform ist es, wenn die Höhe HE geringer ist als die maximale Topologiehöhe HT an der Halbleiterscheibe. Dadurch kann zwischen die Trägerplatte und der Halbleiterscheibe noch eine Verbindungsschicht, wie z. B. ein Kleber oder eine Klebefolie, angebracht werden und trotzdem eine exakte Kompensation der Topologien erreicht werden.An alternative embodiment is when the height H E is less than the maximum topology height H T on the wafer. As a result, between the carrier plate and the semiconductor wafer nor a compound layer such. As an adhesive or an adhesive film can be attached and still be achieved an exact compensation of the topologies.
Bei einem Ausführungsbeispiel der Trägerplatte ist die Trägerplatte größer als die Halbleiterscheibe. Dadurch kann die Bruchanfälligkeit der Halbleiterscheibe, z. B. beim Scheibendünnen, wesentlich verringert werden. So übertragen beispielsweise Halbleiterscheiben-Transportsysteme (Wafertransportsysteme) Kräfte auf die Randbereiche der zu transportierenden Körper. Ist die Trägerplatte gleich groß wie die Halbleiterscheibe, so greift ein Greifarm des Transportsystems sowohl die Trägerplatte als auch die Halbleiterscheibe, wodurch sogenannte Pinabdrücke auf der Halbleiterscheibe entstehen. Insbesondere bei Dünnungsprozessen der Halbleiterscheibe können die Pinabdrücke zu punktuellen zusätzlichen Dünnstellen in der Halbleiterscheibe führen. Dadurch erhöht sich die Bruchanfälligkeit der Halbleiterscheibe. Ist die Trägerplatte aber größer als die Halbleiterscheibe, kann der Greifarm des Wafertransportsystems nur die Trägerplatte greifen. Es entstehen keine Pinabdrücke an der Halbleiterscheibe und somit auch keine zusätzlichen Risikostellen hinsichtlich der Bruchanfälligkeit von der Halbleiterscheibe. Dieser Vorteil gilt insbesondere dann, wenn die Größe der Trägerplatte derart an die Größe der aufzunehmenden Halbleiterscheibe angepasst ist, dass die Trägerplatte über die Ränder der Halbleiterscheibe lateral hinausragt.In one embodiment of the carrier plate, the carrier plate is larger than the semiconductor wafer. As a result, the susceptibility to breakage of the semiconductor wafer, z. B. when disc thin, be substantially reduced. For example, semiconductor wafer transport systems (wafer transport systems) transfer forces to the edge regions of the bodies to be transported. If the carrier plate is the same size as the semiconductor wafer, then a gripping arm of the transport system grips both the carrier plate and the semiconductor wafer, whereby so-called pinprints are formed on the semiconductor wafer. In particular, during thinning processes of the semiconductor wafer, the pinprints can lead to punctual additional thin spots in the semiconductor wafer. This increases the susceptibility to breakage of the semiconductor wafer. However, if the carrier plate is larger than the semiconductor wafer, the gripping arm of the wafer transport system can only grip the carrier plate. There are no pinprints on the semiconductor wafer and thus no additional risk points with regard to the susceptibility to breakage of the semiconductor wafer. This advantage applies in particular if the size of the carrier plate is adapted to the size of the semiconductor wafer to be received such that the carrier plate projects laterally beyond the edges of the semiconductor wafer.
Bei einer Ausführungsform der Trägerplatte ist die Erhebung an der Trägerplatte angebracht. Dies erlaubt die separate Herstellung der Erhebung. Insbesondere können die Erhebung und die Trägerplatte aus unterschiedlichem Material bestehen. Beispielsweise besteht die Erhebung aus Polyimid.In one embodiment of the carrier plate, the elevation is attached to the carrier plate. This allows the separate production of the survey. In particular, the survey and the support plate may be made of different materials. For example, the survey consists of polyimide.
Eine andere Ausführungsform der Trägerplatte ist es, wenn die Erhebung und die Trägerplatte aus einem Stück sind.Another embodiment of the carrier plate is when the elevation and the carrier plate are in one piece.
Kurze Beschreibung der Figuren Brief description of the figures
Detaillierte BeschreibungDetailed description
Ausführungsbeispiele der Erfindung werden nachfolgend, Bezug nehmend auf die beiliegenden Figuren, näher erläutert. Die Erfindung ist jedoch nicht auf die konkret beschriebenen Ausführungsformen beschränkt, sondern kann in geeigneter Weise modifiziert und abgewandelt werden. Es liegt im Rahmen der Erfindung, einzelne Merkmale und Merkmalskombinationen einer Ausführungsform mit Merkmalen und Merkmalskombinationen einer anderen Ausführungsform geeignet zu kombinieren, um zu weiteren erfindungsgemäßen Ausführungsformen zu gelangen.Embodiments of the invention will be explained in more detail below, reference being made to the accompanying figures. However, the invention is not limited to the specific embodiments described, but may be modified and modified as appropriate. It is within the scope of the invention to suitably combine individual features and feature combinations of one embodiment with features and feature combinations of another embodiment in order to arrive at further embodiments according to the invention.
Bevor im Folgenden die Ausführungsbeispiele der vorliegenden Erfindung anhand der Figuren näher erläutert werden, wird darauf hingewiesen, dass gleiche Elemente in den Figuren mit den gleichen oder ähnlichen Bezugszeichen versehen sind und dass eine wiederholte Beschreibung dieser Elemente weggelassen wird. Ferner sind die Figuren nicht notwendiger Weise maßstabsgerecht, der Schwerpunkt liegt vielmehr auf der Erläuterung des Grundprinzips.Before the embodiments of the present invention are explained in more detail below with reference to the figures, it is pointed out that the same elements in the figures are given the same or similar reference numerals and that a repeated description of these elements is omitted. Furthermore, the figures are not necessarily to scale, the focus is rather on the explanation of the basic principle.
In
In
Für alle Ausführungsformen der Trägerplatte
Bei der Herstellung der Trägerplatte
In
In
Claims (10)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE201010011020 DE102010011020A1 (en) | 2010-03-11 | 2010-03-11 | Support plate for holding semiconductor wafer for manufacturing e.g. semiconductor component, has circular projection unit arranged at plate such that projection unit lies on edge area of wafer, during holding of wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE201010011020 DE102010011020A1 (en) | 2010-03-11 | 2010-03-11 | Support plate for holding semiconductor wafer for manufacturing e.g. semiconductor component, has circular projection unit arranged at plate such that projection unit lies on edge area of wafer, during holding of wafer |
Publications (1)
Publication Number | Publication Date |
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DE102010011020A1 true DE102010011020A1 (en) | 2011-09-15 |
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DE201010011020 Withdrawn DE102010011020A1 (en) | 2010-03-11 | 2010-03-11 | Support plate for holding semiconductor wafer for manufacturing e.g. semiconductor component, has circular projection unit arranged at plate such that projection unit lies on edge area of wafer, during holding of wafer |
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Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016050230A1 (en) * | 2014-09-29 | 2016-04-07 | Forschungszentrum Jülich GmbH | Device for controlled heat transfer to and from a component |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5401692A (en) * | 1993-06-15 | 1995-03-28 | Texas Instruments Incorporated | Method for minimizing particle generation on a wafer surface during high pressure oxidation of silicon |
US5560780A (en) * | 1993-04-22 | 1996-10-01 | Applied Materials, Inc. | Protective coating for dielectric material on wafer support used in integrated circuit processing apparatus and method of forming same |
US7037758B2 (en) * | 2002-08-22 | 2006-05-02 | Seiko Epson Corporation | Semiconductor device, method of manufacturing the same, circuit board and electronic apparatus |
DE102006032488A1 (en) * | 2006-07-13 | 2008-01-17 | Infineon Technologies Ag | Apparatus and method for processing wafers |
-
2010
- 2010-03-11 DE DE201010011020 patent/DE102010011020A1/en not_active Withdrawn
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5560780A (en) * | 1993-04-22 | 1996-10-01 | Applied Materials, Inc. | Protective coating for dielectric material on wafer support used in integrated circuit processing apparatus and method of forming same |
US5401692A (en) * | 1993-06-15 | 1995-03-28 | Texas Instruments Incorporated | Method for minimizing particle generation on a wafer surface during high pressure oxidation of silicon |
US7037758B2 (en) * | 2002-08-22 | 2006-05-02 | Seiko Epson Corporation | Semiconductor device, method of manufacturing the same, circuit board and electronic apparatus |
DE102006032488A1 (en) * | 2006-07-13 | 2008-01-17 | Infineon Technologies Ag | Apparatus and method for processing wafers |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2016050230A1 (en) * | 2014-09-29 | 2016-04-07 | Forschungszentrum Jülich GmbH | Device for controlled heat transfer to and from a component |
US10247493B2 (en) | 2014-09-29 | 2019-04-02 | Forschungszentrum Juelich Gmbh | Device for controlled heat transfer to and from a component |
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R016 | Response to examination communication | ||
R119 | Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee |