DE102009058786A1 - Method for producing locally structured semiconductor layers - Google Patents

Abstract

The invention relates to a method for producing a locally structured semiconductor layer on a substrate, in which a reactive gas is applied to the surface of the substrate. This involves etching, doping or depositing one. “Structured” means not only purely mechanical or topographical structures, but also local doping etc.

Description

The invention relates to a method for producing a locally structured semiconductor layer on a substrate, in which the surface of the substrate is acted upon by a reactive gas. In this case, an etching, doping or deposition of a semiconductor substance takes place on or in the substrate. By "structured" is meant not only purely mechanical or topographical structures, but also local doping etc.

By default, the emitter for Si solar cells is manufactured in the industry by diffusion planar. However, it is accepted that high surface doping is necessary for low contact resistances and thus the surface has a high recombination rate.

Selective, d. H. Surface-structured emitters are used in high-efficiency solar cells to provide good front-side passivation and low auger recombination (low surface doping), as well as good transverse conductivity and low contact resistance (high surface doping). This z. B. a flat and low-doped diffusion with a subsequent deep and highly doped diffusion at the areas that will later be under the contacts performed. There are thus two diffusion steps and a masking process necessary to protect the areas between the contacts in the second diffusion.

Alternatively, laser methods are used in which the areas under the contacts are selectively doped. But in addition to the diffusion furnace but an additional laser system is needed. Alternatively, emitter regions are selectively reset using masking techniques.

The object of the invention is to replace the complex diffusion (and / or laser or etching back) process for the production of selective emitters with an emitter deposition or combined with emitter etchings.

This object is achieved by the method having the features of patent claim 1. Claims 15 to 15 indicate uses of the method, while claim 16 describes a solar cell comprising an emitter layer produced by the method according to the invention. The other dependent claims are advantageous developments.

According to the invention, a method for producing a locally structured semiconductor layer on a substrate is thus provided, in which the surface of the substrate is applied at least once in regions of the locally structured semiconductor layer to be produced with a gas for deposition, doping and / or etching.

The method proposed here offers an attractive alternative to diffused selective emitters with corresponding advantages described in detail below.

The essence of the invention is that selective emitters are made by depositing a patterned layer through a shadow mask, and / or by in-line patterning with an etching gas. In the case of wafer or crystalline silicon materials and thin-film solar cells, the epitaxial emitter deposition can be particularly advantageous, so that in one process step selective emitters can be produced very quickly.

Selective epitaxial emitters can be made within a few minutes since the deposition rate can be above 1 μm / min and the optimum emitter thicknesses are between 1 and 5 μm. This results in the advantage that particularly thick highly doped regions, which are advantageous under the contacts, can be deposited quickly (in the case of diffusion, the introduction of a 2 μm deep doping takes approximately 1-2 hours). Depending on the gas composition, the process according to the invention can produce an emitter faster by a factor> 50.

Furthermore, the emitter profile can be designed as desired. This avoids unwanted recombination in the emitter and increases the current of the solar cell. Complete selective emitter deposition occurs in-situ. In addition, for silicon thin-film solar cells, the BSF and the base may be previously deposited in-situ.

In a preferred embodiment of the method, it is provided that the areal exposure is effected by the surface of the substrate being flown through at least one shadow mask whose recesses correspond to the structure of the locally structured layer to be produced, and / or specifically via at least one nozzle with the gas ,

By clever choice of the mask and the deposition parameters, emitters with different layer resistances can thus be deposited on the subsequent metallization design. The mask has a decisive influence on the implementation of the later metallization. It requires an adjustment when printing the grid on the selective emitter structure. The areas coated by the mask and uncoated areas may have different layer heights exhibit. Because of this difference, it is easier to adjust the grid to the selective emitter structure when printing. For the adjustment can be such. B. optical methods are used.

In the embodiment of the method employing a nozzle, it is preferred that a nozzle is used which has an integrated ability to activate the gas, e.g. B. a way to heat and / or plasma activation of the gas.

In a further advantageous embodiment of the method, it is provided that the at least one shadow mask and / or the at least one nozzle are spaced between 0.1 and 10 mm, preferably between 0.5 and 5 mm, particularly preferably between 1 and 2 mm from the surface is.

The mask is preferably made of a material that is not readily deposited (eg, coated with SiO ₂ , Si ₃ N ₄ , SiC, and / or Al ₂ O ₃ ) and is not attacked when the reactor chamber is etched back. A regular re-etching is advantageous in a deposition of the selective structure, so that the mask is not added.

According to the invention, locally structured semiconductor layers can thus be produced, wherein the region in which the deposition of the semiconductor takes place can vary over large areas. However, the surface of the substrate is preferably applied in a width between 0.1 and 20 mm, preferably between 0.2 and 2 mm, particularly preferably between 0.3 and 1 mm, with the gas, so that it is possible to produce correspondingly broad semiconductor structures ,

Advantageous reactive gases which can be used according to the invention are selected from the group consisting of hydrogen chloride, hydrogen, chlorosilanes, phosphine, hydrides, boron trichloride, trimethylphosphine and / or gaseous fluorides, in particular CF ₄ or SF ₆ and / or mixtures thereof.

Preferred temperatures at which the process expires, d. H. either substrate temperatures or reactive gas temperatures, as well as the possibility that both the substrate and the reactive gas are annealed to the appropriate temperatures, are between 200 and 2000 ° C, preferably between 500 and 1500 ° C. Particularly preferred embodiments of the method provide either that the temperatures are between 1000 ° C and 1200 ° C or between 500 ° C and 999 ° C. Likewise, there is the possibility that the process is carried out under a temperature gradient, that is, for example, that the gas, which is applied to the surface of the substrate, is tempered over a range. It can thus be achieved that more or fewer semiconductors are deposited on the corresponding substrate.

• 1. die Abscheidung von selektiven epitaktischen Schichten z. B. bei ca. 1100°C,
• 2. die Abscheidung von selektiven mikrokristallinen Schichten z. B. bei Temperaturen unter 1000°C,
• 3. die Eindiffusion von selektiven Strukturen bei Temperaturen zwischen 1100 und 700°C während des Abkühlens der Wafer,
• 4. das Rückätzen von selektiven Strukturen vor oder nach Abscheideschritten.

It is therefore possible to carry out the following processes:

• 1. the deposition of selective epitaxial layers z. At about 1100 ° C,
• 2. the deposition of selective microcrystalline layers z. At temperatures below 1000 ° C,
• 3. the diffusion of selective structures at temperatures between 1100 and 700 ° C during the cooling of the wafer,
• 4. the re-etching of selective structures before or after separation steps.

In particular, a CVD coating plant is suitable for carrying out the method according to the invention.

It is further advantageous if the method is carried out as a continuous method, wherein the substrate is moved in one, two or three dimensions relative to the region of application of etching gas.

For the method, a variety of suitable substrates are suitable; Advantageous substrates are selected from semiconductor substrates, in particular Si, GaAs, Ge, SiC semiconductor substrates and / or combinations thereof, carrier substrates with a semiconductor coating, wherein the locally structured semiconductor layer is deposited on the semiconductor coating, metals, glasses and / or ceramics , as well as combinations of the aforementioned substrates. For the above-mentioned semiconductor coatings are in particular coatings in question, which consist for example of Si, CdTe, CdS, CdSe, CuIn (Ga) Se and / or CuIn (Ga) S. Preferred metals that can be patterned are, for example, molybdenum and / or molybdenum deposited on a glass substrate. For glasses or ceramics, for example SiC, ZrSiO ₄ , Si ₃ N ₄ or sintered Si-based glasses or ceramics come into question, but also structuring of graphite or carbon is possible with the method according to the invention. As a substrate, of course, a solar cell can be used.

In order to improve the electrical properties of the substrate or of the deposited semiconductor coating, it is particularly advantageous if a planar doping of the surface of the semiconductor substrate is carried out before and / or after the method has been carried out.

In order to improve the structuring, at least partial etching back of the locally structured semiconductor layer can additionally be carried out as a subsequent method step.

Furthermore, it is advantageous to carry out the method several times in succession, so that either increased amounts of semiconductor material can be deposited or else other areas of the substrate can be patterned with semiconductor materials, so that even complex structures of structures of deposited semiconductor can result.

The invention further specifies the use of the method described above, in particular in the production of solar cells, for the deposition of epitaxial semiconductor layers on semiconductor substrates, for the deposition of microcrystalline semiconductor layers on semiconductor substrates, for the diffusion of locally structured doped semiconductor layers into semiconductor substrates, for the patterning of semiconductor layers for the series connection, for patterning of metal layers for series connection and / or for local metal deposition.

According to the invention, a solar cell is likewise included which has an emitter layer which can be produced according to the method according to the invention.

In the following, the various preferred embodiments of the invention are illustrated by way of example without restricting the invention to specific parameters. In particular, the examples concerning emitters and structurings of emitters are to be understood such that "normal" in-situ structurings of deposited / deposited layers are also included in the invention.

example 1

Deposition of selective epitaxial layers

The epitaxial layers produced at high temperatures can be selectively deposited by means of a mask (see 1 ). The wafers must pass closely along the mask to prevent "smearing" of the deposition. Such a continuous deposition process can be accomplished in a high throughput atmospheric pressure CVD plant. The substrates pass different deposition chambers. For a selective emitter deposition, a separate deposition chamber with a high dopant concentration could be provided.

It is important that a regular etch-back step is performed so that the mask does not become clogged and thus the coated area becomes smaller or completely disappears. The process makes it possible to deposit very thick emitters very quickly (deposition rates 1-4 μm / min).

Example 2

Deposition of selective microcrystalline or polycrystalline layers

The process described in Example 1 can also take place at lower temperatures. In this case, micro- or polycrystalline layers are deposited. Corresponding layers can, for. B. for thin film solar cells on foreign substrates, eg. As insulating high temperature glass, or ceramic.

These always require structured elements, eg. As for series connection, which are normally generated by laser after full-area deposition, but can be prepared with the method described here already during the deposition.

Example 3

Indiffusion of selective structures during cooling

Instead of depositing a highly doped region, it is also possible for dopant diffusion to take place through the mask. At high temperatures, phosphine diffusion can quickly penetrate deeply into the silicon. Cooling with 120 ppm of phosphine in the reactor atmosphere up to a temperature of 750 ° C is already sufficient to increase the doping concentration on the surface of the Si layer of about 10 ¹⁸ atoms / cm ³ by an order of magnitude.

Example 4

Etching after emitter deposition

A homogeneous 2-stage emitter layer is removed by local blowing / contacting with an etching gas partially and structured. The non-etched emitter regions remain highly doped, z. B. for contacting purposes. By overheating the etching gas, the selectivity can be increased because at the ("cold") layer, the distributing gas cools rapidly and loses its reactivity.

Example 5

Structuring etching after emitter deposition

If one chooses the correct temperature of the etching gas, the re-etched areas can be textured at the same time. Advantages here are the high Absorption in the etched-back region as well as a small surface area in the non-etched region (eg reduced recombination in solar cell contacts on this region) also plasma generated gas mixtures.

In all instances, it may be advantageous to cool the wafers in a hydrogen / phosphine atmosphere. In this case, an outdiffusion of the phosphorus is prevented after the emitter epitaxy. The phosphorus-containing environment does not produce a concentration gradient in the direction of the gas phase, which would cause outdiffusion. For the phosphor within the silicon layer, it is therefore better to stay in the solid state. The process can be very well integrated in an industry-oriented continuous process, since a cooling of the wafer is always required and only a defined atomic sphere is required.

process flow

First, the moderately doped emitter volume is deposited surface. Subsequently, the highly doped region is deposited or diffused through a mask. Likewise, the deposition of a two-stage layer followed by a local removal of the higher doped layer is possible.

The layer sequences or semiconductor components that can be produced by the present method are described in US Pat 1 to 3 shown in more detail.

1 describes the possibility of integrated interconnection with a deposited metal layer. First, a successive deposition of the layer follows 1 (highly doped p-type semiconductor layer) and a layer 2 (p-type semiconductor layer) on the non-conductive substrate 0 followed by a possible local re-etching of the layers 1 and 2 , This is followed by a structured deposition of a layer 3 (n-type semiconductor layer) on the layer 2 instead, and a structured deposition of the layer 4 , wherein the individual layers are applied by the method according to the invention. For the production of the layer 1 must be the process of deposition of layer 1 to 4 may be interrupted. After deposition of layer 1 this can be re-crystallized ex-situ (eg by zone melting) and then further treated (eg in the coating plant by structuring). This applies mutatis mutandis to the in the 3 to 4 illustrated embodiments. The advantages associated with this are that a relatively simple layer structure can be obtained, and the metal can be produced as a finger structure with targeted structuring.

2 relates to an integrated circuit on a semiconductor device with metal and an insulator which separates the different layer sequences. The production takes place by laminar deposition of the layers 1 . 2 and 3 on the non-conductive substrate 0 , where the layer 1 a highly doped p-type semiconductor layer, the layer 2 a doped p-type semiconductor layer and the layer 3 represent an n-doped semiconductor layer. The deposition step is followed by a local re-etching step of the layers 1 . 2 and 3 and the possible introduction of a selective emitter structure (possibly local re-etching of highly doped emitters or local doping). Following this becomes an insulator 5 deposited, which can be produced for example by printing on the semiconductor structure. In a last step, the metallization takes place, wherein a semiconductor component final metal layer 4 , For example, in the form of metal fingers, is applied to the semiconductor device. By means of these metal fingers, a contacting of the different layer sequences applied to the substrate is possible with one another. The advantage here is the very conservative layer structure and the high flexibility, which can be achieved by a strip width per cell up to 7 cm.

In 2a is a variation of the in 3 illustrated embodiment, which describes an integrated interconnection with metal, wherein an antireflection layer serves as an insulator. Here, too, a two-dimensional deposition of the layers follows 1 . 2 and 3 on substrate 0 , where the layers 1 . 2 and 3 the same layers, as already in 3 described, represent. The deposition step is followed by a local re-etching of the layers 1 . 2 and 3 and the introduction of a selective emitter structure (optionally local re-etching of highly doped emitter or local doping). Following this, an antireflection layer (which simultaneously constitutes an insulator layer) is applied to the layer 3 deposited. The last step is a metallization, wherein a metal layer 4 is deposited as a final layer on the semiconductor device. It is particularly advantageous here that no additional insulator layer is necessary.

In 3 is a selective emitter contact structure shown on a standard wafer, which can be produced by the method according to the invention. This is followed by a planar deposition of a layer 3 (n-doped emitter) on a silicon wafer, followed by a local deposition or on-diffusion of the layer 4 (heavily doped n-type semiconductor). This is followed by a standard metallization, creating a metal finger structure 5 is produced. However, an alternative to the procedure described above is also the areal deposition of the layers 3 and 4 followed by a local re-etching of the layer 4 , and then a standard metallization possible to build the described semiconductor structure. As advantages here are to mention that such a semiconductor structure can be obtained with very little effort.

Claims (16)

A method for producing a locally structured semiconductor layer on a substrate, wherein the surface of the substrate is applied in regions in the region of the locally structured semiconductor layer to be produced at least once with a gas for depositing, doping and / or etching. A method according to claim 1, characterized in that the regional application is effected in that the surface of the substrate a) by at least one shadow mask whose recesses correspond to the structure of the locally structured layer to be produced, and / or b) specifically via at least one nozzle is flown with the gas. Method according to the preceding claim, characterized in that the flow occurs with a nozzle having an integrated possibility of activation of the gas, preferably a possibility for heating and / or plasma activation of the gas. Method according to one of the two preceding claims, characterized in that the at least one shadow mask and / or the at least one nozzle between 0.1 and 10 mm, preferably between 0.5 and 5 mm, more preferably between 1 and 2 mm from the surface is spaced. Method according to one of claims 2 to 4, characterized in that the shadow mask with SiO ₂ , Si ₃ N ₄ , SiC and / or Al ₂ O _{3 is} coated. Method according to one of the preceding claims, characterized in that the region of application of the gas to the surface is limited in the width between 0.1 and 20 mm, preferably between 0.2 and 2 mm, particularly preferably between 0.3 and 1 mm is. Method according to one of the preceding claims, characterized in that the gas is selected from the group consisting of hydrogen chloride, hydrogen, chlorosilanes, phosphine, hydrides, boron trichloride, trimethylphosphine and / or gaseous fluorides, in particular CF ₄ or SF ₆ and / or mixtures thereof , Method according to one of the preceding claims, characterized a) that the temperature of the substrate and / or the gas when applied between 200 and 2000 ° C, preferably between 500 and 1500 ° C, more preferably between 1000 ° C and 1200 ° C or between 500 ° C and 999 ° C. , or b) that the process is carried out under a temperature gradient. Method according to one of the preceding claims, characterized in that it is carried out with a CVD coating system. Method according to one of the preceding claims, characterized in that the method is carried out as a continuous process, wherein the substrate is moved in one, two or three dimensions relative to the area of application of etching gas. Method according to one of the preceding claims, characterized in that the substrate is selected from the group consisting of a) semiconductor substrates, in particular Si, GaAs, Ge, SiC semiconductor substrates and / or combinations thereof, b) carrier substrates with a semiconductor coating, wherein the locally structured semiconductor layer is produced on and / or in the semiconductor coating, c) metals, d) glasses and / or ceramics, as well e) combinations of the aforementioned substrates. Method according to one of the preceding claims, characterized in that before and / or after performing the method, a planar doping of the surface of the semiconductor substrate is performed. Method according to one of the preceding claims, characterized in that as a further, subsequent process step, an at least partial etching back of the locally structured semiconductor layer is performed. Method according to one of the preceding claims, characterized in that the method is carried out several times. Use of a method according to one of the preceding claims in the production of solar cells, for deposition of epitaxial semiconductor layers on semiconductor substrates, for deposition of microcrystalline semiconductor layers on semiconductor substrates, for diffusion of locally structured doped semiconductor layers into semiconductor substrates, for structuring of semiconductor layers for series connection, for structuring of metal layers for series connection and / or for local metal deposition. Solar cell, comprising an emitter layer, producible according to a method according to one of claims 1 to 14.

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