DE102008049671B4 - Method for operating a chip card controller and a correspondingly configured chip card controller - Google Patents

Abstract

Method for operating a chip card controller (1) with a leakage current reduction device (2), in which method the leakage current reduction device (2) is controlled as a function of a field strength for supplying energy to the chip card controller (1), wherein the leakage current reduction device (2) is controllable by controlling a body biasing voltage (4), and wherein the leakage current reduction device is controllable by controlling a virtual ground voltage (5), and wherein a leakage current of the chip card controller (1) is adjustable by means of the leakage current reduction device (2) before an expected change in the field strength by controlling the supply voltage by a software program and/or hardware programs.

Description

The present invention relates to a method for reducing leakage currents, as can be used, for example, in chip card controllers, by means of provided energy.

A reduction or minimization of leakage currents in integrated circuits is necessary in order to keep power consumption as low as possible. This measure minimizes, among other things, an increase in the temperature of the chip card controller. Power consumption due to leakage currents can be reduced by applying techniques known from the literature such as "body biasing". In this process, a potential at the source terminal of a transistor is raised, while the bulk voltage remains at a reference or ground potential. The power consumption due to leakage currents can significantly influence the overall power consumption of a system and thus, for example, determine the service life of batteries in mobile devices.

Another way to reduce leakage currents is to use a so-called "virtual ground" or a virtual ground potential when the chip card controller is in sleep mode, i.e. no access is taking place. Integrated circuits are typically connected between a supply potential and a reference potential or ground potential. If the integrated circuit is not accessed in sleep mode, for example, a fixed virtual ground potential is used, which lies between the ground potential and the supply potential. The lower difference in potentials results in lower leakage currents in the transistors of an integrated circuit and the data retention time, the time during which the chip card controller functions, is extended.

So far, the leakage current has only been reduced in dedicated operating modes of the chip card controller. The chip card controller cannot react dynamically to changes in the energy supply during an operating mode, for example in "operation mode". In particular, with RF-supplied chip card controllers, "energy gaps" can occur, which are specified in the ISO14443 Type A standard. In these "energy gaps", the consumed current, especially the leakage current at high temperatures, must be supplied by the so-called backup capacitances.

The present invention is therefore based on the object of providing a chip card controller whose energy consumption can be adapted in the operating modes.

This object is achieved by the subject matter of claims 1 to 6. The dependent claims each describe advantageous embodiments of the present invention.

In a method according to the invention for operating a chip card controller with a leakage current reduction device, the leakage current reduction device is controlled as a function of a field strength for supplying energy to the chip card controller.

In the method for operating a chip card controller, the leakage current reduction device can further be controlled by controlling a body biasing voltage.

In the method for operating a chip card controller, the leakage current reduction device can further be controlled by controlling a virtual ground voltage.

In the method for operating a chip card controller, the leakage current of the chip card controller can further be adjusted by means of the leakage current reduction device before an expected change in the field strength by controlling the supply voltage by hardware programs, and/or

adjustable using a software program.

In a method for operating a chip card controller, the data retention time is extended by reducing the leakage current. The data retention time is a measure of the functional life of a chip card controller.

In a method for operating a chip card controller, the chip card controller is an RFID controller.

In a method of operating a smart card controller, the smart card controller is a contact-based smart card controller.

• 1 zeigt schematisch einen Chipkarten-Kontroller mit Leckstromreduktionseinrichtung.
• 2 zeigt die Verlängerung der Data Retention Zeit in Abhängigkeit der Versorgungsspannung.
• 3 zeigt die Verlängerung der Data Retention Zeit in Abhängigkeit der Body Biasing Spannung und der Virtual Ground Spannung.

A chip card controller is suitable for use in the method of operating a chip card controller.

• 1 shows a schematic diagram of a chip card controller with leakage current reduction device.
• 2 shows the extension of the data retention time depending on the supply voltage.
• 3 shows the extension of the data retention time depending on the body biasing voltage and the virtual ground voltage.

The leakage current reduction device 2 of the 1 is suitable for controlling a reference voltage 4.5 and has a first input 6 for the supply voltage, a second input for a reference voltage Vref, a connection 7 for the reference voltage 4.5 to be regulated depending on the supply voltage 3 and a connection 8 for a second reference voltage or for a ground potential. The leakage current reduction device 2 is therefore connected to the supply voltage 3 at its first input 6, to the reference voltage at its second input, to the first reference voltage 4.5 at its output 7 and the leakage current reduction device 2 is connected to the ground potential at the connection 8. The 1 schematically outlines a structure of a method for operating the leakage current reduction device, which controls the first reference voltage or the virtual ground potential 4.5 depending on the supply voltage 3. The leakage current reduction device 2 for controlling the first reference voltage 4.5 controls the first reference voltage 4.5 in such a way that data retention in the chip card controller 1 can always be guaranteed. At this point, it should be noted that the leakage current reduction device 2 can be implemented in various ways. In general, the leakage current reduction device 2 has a control circuit that controls the first reference voltage 4.5 depending on the (fluctuating) supply voltage. The reference voltage Vref at the input of the leakage current reduction device 2 can be implemented, for example, by means of a so-called bandgap circuit. Simulations show that by means of the 1 The leakage current reduction device 2 shown can ensure an extended operation of the chip card controller 1.

2 shows a diagram in which the data retention time is shown as a function of the supply voltage Vdd and the body biasing voltage Vbs. The body biasing voltage Vbs 100, 200, 300, 400 is entered in the diagram for different voltages (0V, 0.2V, 0.4V and 0.6V). The course of the body biasing voltage clearly shows that the data retention time increases due to the reduction of the body biasing voltage Vsb. 2 thus clearly shows that by means of the leakage current reduction device 2 according to the invention, the leakage current of the chip card controller 1 is reduced and thus the data retention time increases.

3 shows a 3-D diagram in which the data retention time is plotted against the body biasing voltage Vbs and the virtual ground voltage Vvg at high temperature. Also from the 3 It can be clearly seen that the data retention time can be significantly extended by means of the leakage current reduction device 2 according to the invention, both by suitably changing the body biasing voltage Vbs and by suitably changing the virtual ground voltage Vvg. However, an extension of the data retention time is equivalent to a reduction in the leakage current by the leakage current reduction device 2.

List of reference symbols:

1

Chip card controller

2

Leakage current reduction device

3

Field strength, supply voltage Vdd

4

Body Biasing Voltage Vbs

5

Virtual Ground Voltage Vvg

6

First entrance

7

Second entrance

8th

Ground connection

100, 200, 300, 400

Course of the body biasing voltage

Claims (6)

Method for operating a chip card controller (1) with a leakage current reduction device (2), in which method the leakage current reduction device (2) is controlled as a function of a field strength for supplying energy to the chip card controller (1), wherein the leakage current reduction device (2) is controllable by controlling a body biasing voltage (4), and wherein the leakage current reduction device is controllable by controlling a virtual ground voltage (5), and wherein a leakage current of the chip card controller (1) is adjustable by means of the leakage current reduction device (2) before an expected change in the field strength by controlling the supply voltage by a software program and/or hardware programs. Procedure according to Claim 1 , whereby the data retention time is extended by reducing the leakage current. Method according to one of the preceding claims, wherein the chip card controller (1) is an RFID controller. Procedure according to one of the Claims 1 or 2 , wherein the chip card controller (1) is a contact-based chip card controller (1). Chip card controller (1) for use in the method according to one of the preceding claims. Arrangement comprising: a chip card controller; and a leakage current reduction device (1) which is arranged to reduce the leakage current of the chip card controller according to the method according to one of the Claims 1 until 4 operate.

Images