DE102007049044A1 - Data exchange device i.e. communication structure, for e.g. application specific integrated circuit, has function modules for processing interface-related functions, and master unit including number of signal inputs - Google Patents

Abstract

The device i.e. communication structure (1), has function modules (4.1-4.n) for processing interface-related functions e.g. diagnosing function, such that the structure is formed as a part of an integrated circuit or as the integrated circuit. A master unit (2) and a number of module specific or module oriented node units (3.1-3.n) are provided corresponding to a number of the functional modules associated to the structure. The master unit includes a number of signal inputs (SI1-SIn) and request to send inputs (RQ1-RQn) corresponding to the number of the functional modules. An independent claim is also included for a method for exchange of data between function modules of an integrated circuit.

Description

The The invention relates to an apparatus and a method for data exchange between at least two functional modules of an integrated circuit a communication structure according to claim 1 or 15.

today Control devices, in particular for vehicles, include Microcontroller, in addition to the primary control functions also gateway functions (with gateway = communication interface) the controller and thus interface-related functions, that are needed to exchange data. The required communication structures are on-chip over realized a bus system or a master-slave system, what to do that leads microcontroller with a very large Computing power is required to perform a gateway function with a reasonably acceptable performance or speed to realize.

By the increasing number of control devices and electronic Units in vehicles takes the data or message exchange and thus the complexity of existing communication networks in the vehicle and consequently also the requirements for communication interfaces (= Interfaces between the same or different bus systems and / or functional modules (also called gateway)). Usually is the communication interface for forwarding messages of one or more bus systems and / or functional modules other bus systems or functional modules as a control unit in which in general interface functions, such as log conversion functions, network management functions, Diagnostic functions and / or routing functions, such as message routing functions, Signal routing functions, signal extraction functions, as software modules are implemented.

In other words, in today's gateway systems, interface functions such as protocol conversions and message transmissions are purely software-based. Such a software-based gateway system is for example from DE 10 2004 033 781 A1 known. In this case, interface functions are implemented in a control unit, which are freely configurable. The gateway system disclosed therein comprises a number of control units (also referred to as gateway processors) corresponding to the number of data bus systems, the control units and the data bus systems communicating with each other on a master-slave basis.

The Solutions known from the prior art leave one equal access, for example, various over a communication structure of connected modules on the communication structure not to, which makes the microcontroller more powerful must be interpreted as actually required to to achieve an acceptable performance of the gateway.

Of the Invention is therefore based on the object, a device for Specify data exchange between function modules that are a simple and fast internal communication between function modules in the internal communication network allows.

The The task concerning the device according to the invention by solved specified in claim 1 features. The Concerning the method according to the task by the in claim 15 specified characteristics solved.

advantageous Further developments of the invention are the subject of the dependent Claims.

The Device for data exchange between at least two functional modules an integrated circuit provides that the function modules over a communication structure for the processing of interface-related Functions between the function modules can be coupled, wherein the Communication structure is part of the integrated circuit or itself is formed as an integrated circuit.

What As far as the communication structure is concerned, therefore, there are two versions conceivable: In a first execution is the communication structure Part of the integrated circuit comprising the functional modules. In this case, the communication structure is independent Function unit formed within this integrated circuit. The Communication structure is part of the integrated circuit and thus with the functional units belonging to the integrated circuit and other components housed on a common chip. It is thus an on-chip communication structure. In a second embodiment, the communication structure is designed as a separate integrated circuit. Ie. the communication structure is an independent one A building block that comes from the built-in functional modules Circuit is spatially separated. Both versions is common, however, that the communication structure as a structural unit, which is at least partially wired as hardwired Logic executed is realized.

In the context of the invention, the communication structure is understood in particular to mean an on-chip communication structure that functions as an integrated circuit in hardwired logic leads is. When corresponding functional modules are connected to this communication structure, the communication structure includes interface functions such as protocol conversion functions, network management functions, diagnostic functions and / or routing functions such as message routing functions, signal routing functions, data collection routing functions, signal extraction functions. These functions are preferably also implemented as integrated circuits in hardwired logic.

By the integration of previous software-based routing functions in configurable hardware units in hardwired logic becomes an equal access, for example, various over a communication structure of connected modules on the communication structure allows, which leads to the performance the communication structure and at the same time this communication structure comprehensive gateways and also the routing latency times be reduced.

Prefers the communication structure is at least partially hardwired Logic built. In addition, the communication structure as Part of a programmable integrated circuit (FPGA = field programmable gate array), in particular as part of an application-specific integrated circuit (ASIC application specific integrated circuit) educated. This applies to both the execution, in which the communication structure is part of the integrated circuit is, as well as for the execution, at which the Communication structure itself designed as an integrated circuit is. Such integrated circuits (FPGA or ASIC) have hardware units, like flip flops as memory cells or registers, semiconductor devices as function modules that continue their functions even after production can change. These memory cells and semiconductor devices are freely configurable with each other, with electrically conductive Connections are reconnected so that various logic circuits can be built thereby.

Under Function modules of the integrated higher-level circuit, which are connected to each other via the communication structure modules, such as processors, memory, external interface modules, in particular bus modules for a CAN port, LIN port, FlexRay port or Ethernet port, Bus transceivers, bus controllers, bus management units and / or modules with communication functions or interface functions, eg B. routing functions, understood as a routing module.

Conveniently, indicates the communication structure in relation to the integrated circuit is an internal communication network, a master unit and one of the number of the communication structure connected function modules corresponding number of node units on. The number is via the communication structure the attachable function modules freely selectable, with all Function modules in communication are equal and independently receive and send messages or data can.

The Master unit controls the access of the function modules to the internal one Communication network and includes at least one decoder, one Control unit and a multiplexer.

The Implementation of interface functions, such as network management functions, Diagnostic functions and / or protocol conversion functions are provided by the node units perceived.

About that In addition, the master unit comprises one of the number of functional modules corresponding number of signal inputs and send request inputs, whereby transmission requests as well as signals to be transmitted, which supplied as signal inputs to the master unit all function modules can be processed in parallel. This enables easy and fast parallel processing and thus a much better communication performance. By the distribution of coordination functions on a master unit for all function modules and interface functions on the Node units is also a modularization allows.

In One possible embodiment comprises the master unit in addition, at least one transmit state collection input. In this case, the transmission state collection input is preferably based on the Busy signals of all function modules connected to the master unit and / or node units formed. This is a simple monitoring the transmission of transmission and reception allows.

The respective node unit is expediently assigned to one of the functional modules. In this case, the respective module-specific node unit is part of the integrated circuit or itself formed as an integrated circuit comprising at least one activity detector, a module-related interface control unit, a filter, one or more interface registers and a data memory. According to the above remarks on the internal communication network, two embodiments are also conceivable in the case of the node unit, wherein according to the invention the node unit is designed as an independent functional unit within the integrated circuit is formed.

Conveniently, is to the inner communication network via at least one the functional modules, in particular one of the bus modules, an external Bus system can be coupled. This allows in a simple way and Way an extension of the integrated circuit with the communication interface to further control and / or communication functions via further directly or via a data bus indirectly connected Functional modules.

Conveniently, are as external bus systems one or more data buses (eg. a CAN bus = Controller Area Network, bus system for networking from control units in vehicles or LIN bus = local interconnect network, bus system for networking sensors and actuators) to the internal communication network or the communication structure coupled.

advantageously, the communication structure is at least partially hardwired Logic built. Ie. the communication structure comprises on the one hand hardwired logic and other configurable sections. As a result, a sufficient performance with simultaneous adaptation option ensured.

• – Setzen einer Sendeanforderung von einem der Funktionsmodule an die Kommunikationsstruktur zur Abarbeitung von schnittstellenbezogenen Funktionen zwischen den Funktionsmodulen,
• – Bestimmen des nächsten sendenden Funktionsmoduls,
• – Bestimmen der freizugebenden Signaleingänge, die mit Signalausgängen gekoppelt werden,
• – gegebenenfalls Erzeugung von Sendenachrichten und/oder Übertragen von Sendenachrichten,
• – Überwachung der Übertragung der Sendenachrichten und
• – Rücksetzen der freigegebenen Signaleingänge.

In the method for exchanging data between at least two functional modules of an integrated circuit by means of the device according to the invention, at least the following steps are carried out:

• Setting a send request from one of the function modules to the communication structure for processing interface-related functions between the function modules,
• Determining the next transmitting function module,
• Determining the signal inputs to be released, which are coupled to signal outputs,
• If necessary generation of transmission messages and / or transmission of transmission messages,
• - Monitoring the transmission of the broadcast messages and
• - Reset the enabled signal inputs.

embodiments The invention will be explained in more detail with reference to drawings. Showing:

1 a block diagram of an internal communication network or a communication structure with a master unit and a plurality of node units as integrated circuits,

2 a block diagram of the master unit according to 1 in detail,

3 a block diagram of the node unit in detail according to 1 .

4 a block diagram of an interface register, and

5 a block diagram of a routing module as an integrated circuit, which is coupled to the control unit.

each other corresponding parts and functions as well as signals are in all figures provided with the same reference numerals.

1 shows as a device for data exchange a communication structure 1 with a master unit 2 and / or one of the number of functional modules 4.1 to 4-n corresponding number of associated module-specific or module-related node units 3.1 to 3.n ,

The communication structure 1 is designed as an integrated circuit, which can be part of an application specific circuit (= ASIC) as well as a field programmable gate array (= FPGA) as an on-chip communication structure. In addition, the communication structure 1 at least partially built in hardwired logic. So connects the communication structure 1 a selectable number of function modules 4.1 to 4-n in hard-wired logic with the communication structure 1 and dependent on enabling send and receive function modules 4.1 to 4-n arbitrarily with each other, with all functional modules 4.1 to 4-n are equal in terms of communication, ie can independently send and receive data.

In the function modules 4.1 to 4-n These can be, for example, processors, memory, external interfaces (in particular bus interfaces such as CAN, LIN, FlexRay, Ethernet) and modules with special functionality (eg hardware-accelerated routing). For the connection of the function modules 4.1 to 4-n is the node units 3.1 to 3.n specified as a uniform interface.

According to the invention, both the communication structure 1 as well as the functional modules 4.1 to 4-n Components of the same integrated circuit, which may be embodied for example as FPGA or ASIC. In the event that at least one of the functional modules 4.x is designed as a routing module, and at least one of the functional modules is a bus module (for example CAN, FlexRay, etc.), the communication structure fulfills the functionality of a gateway. In this case, there is an integrated circuit with integrated in this circuit gateway, ie an integrated circuit with an onchip gateway (this type of gateway can also referred to as Gateway Network on Chip, GNoC for short).

Data packets or messages (also called messages) in the form of a broadcast, multicast or unicast message to all function modules are comparable to a network 4.1 to 4-n sent. These are the node units 3.1 to 3.n via associated lines, in particular 8-bit data lines with signal inputs SI1 to SIn connected, via which in each case messages N of the relevant function module 4.1 to 4-n about the respective node unit 3.1 to 3.n to the master unit 2 be transmitted. In addition, the respective node unit 3.1 to 3.n connected via a further line to a transmission request input RQ1 to RQn, via which in each case a transmission request from the respective node unit 3.1 to 3.n to the master unit 2 is sent. The number of function modules corresponds to this 4.1 to 4-n the number of node units 3.1 to 3.n and the number of signal inputs SI1 to SIn and transmission request inputs RQ1 to RQn.

Furthermore, the master unit comprises 2 at least one transmit state collection input "Busy". The transmit state collection input "Busy" is in particular based on busy signals all at the master unit 2 via associated lines of connected function modules 4.1 to 4-n and / or node units 3.1 to 3.n formed, wherein the busy signals via OR gates 5 linked together and connected to the transmit state collection input "Busy".

To receive messages are the node units 3.1 to 3.n via a bus, for example an 8-bit data line with a signal output SO of the master unit 2 connected, making one of the master unit 2 for example, as a broadcast message in parallel from all node units 3.1 to 3.n can be received. Depending on the structure of the master unit 2 It is also possible to provide a plurality of signal outputs SO, so that different transmission messages can be transmitted in parallel and / or in series.

For controlling the data exchange between the function modules 4.1 to 4-n is also each of the node units 3.1 to 3.n via a line, for example a 4-bit data line with a monitoring output "Grant" with the master unit 2 connected. On the basis of the "Grant" signal it is determined which of the input data lines of the signal inputs SI1 to SIn is switched through to the signal output SO in the master. The transmission of a packet or message N is monitored and the length of the packet is evaluated to reset the "grant" signal at the correct time. The number of possible communication participants and thus the function modules 4.1 to 4-n depends on the width of the grant line - in the exemplary embodiment, a 4-bit data line according to:
Maximum number of function modules 4-n _max = 2 ^{width of the grant line} The physical structure is structured on a logical level in bus topology. To be able to do without so-called tri-state outputs (= high-impedance output) is the master unit 2 (also called master or arbiter) provided the flow of communication within the communication structure 1 manages and controls.

Due to the equal access of the function modules 4.1 to 4-n via the associated node units 3.1 to 3.n to the master unit 2 the communication structure 1 In a communication system with several nodes, so-called pipelining effects (= parallel processing) can be achieved. The functioning of the communication structure 1 differs from the bus systems commonly used in the microcontroller area on a master-slave basis. In particular, the modularization of interface functions and structures as well as the parallelization of the data transmission are achieved by the inventive communication structure 1 considerably supported.

2 shows in detail in the block diagram an embodiment for the construction of a master unit 2 , The master unit 2 consists of three elements: a decoder 6 (also called priority decoder), a control unit 7 (= State machine or control FSM) and a multiplexer 8th ,

The decoder 6 evaluates the send request inputs RQ1 to RQn and thus the send requests of the function modules 4.1 to 4-n from and determines based on a prioritization the next transmission node, ie that node unit 3.1 to 3.n fixed, which is entitled to send. For the prioritization are different methods, eg. As cyclic access, round robin, priority table, specifiable and are executed as required.

The control unit 7 (= State machine) determines the identifier (= identifier (ID)) of the next authorized function module 4.1 to 4-n and its node unit 3.1 to 3.n and thus initiates the transmission in which the monitoring output "Grant" for the relevant transmitting function module 4.1 to 4-n and its node unit 3.1 to 3.n from the control unit 7 is set and remains set until the transfer is completed. By means of the monitoring output "Grant" is via the multiplexer 8th the corresponding signal input SI1 to SIn switched through to the signal output SO.

Is a functional module 4.1 to 4-n unable to receive data is through the node unit 3.1 to 3.n a busy signal is applied to the transmit state bus "Busy" input from the decoder 6 is taken into account.

3 shows in detail in the block diagram a possible structure of one of the node units 3.1 , The node unit 3.1 is the interface between the master unit 2 and a connected function module 4.1 , The node unit 3.1 includes at least five components: an activity detector 9 (also called Activity Detector), a module-related interface control unit 10 (also called Network FSM), a filter 11 (also called Acceptance Filter), one or more interface registers 12 (also called register interface) and a data memory 13 (= Packet FIFO memory).

The activity detector 9 monitors and compares the grant signal of the "Grant" monitoring output with a hard-wired "Grand-ID" grant ID. This results in valid status signals for the module-related interface control unit 10 generated.

The filter 11 compares the message header of the transmitted and received message N, in particular the so-called header byte 0 of a received message N with predeterminable acceptance settings and generates an acknowledgment signal "Accept" for the module-related interface control unit 10 ,

The data store 13 serves to store messages N to be sent and / or received messages N (= Rx and Tx packets) of the associated function module 4.1 ,

The module-related interface control unit 10 controls the sending and receiving of messages or data packets. To do this, it controls access to the data store 13 from the network side. When sending a packet, that is in the send state, the data bytes of the packet from the data memory 13 read out and on the bus or the signal output line KO1, with the respective signal input SI1 of the master unit 2 connected.

When receiving a packet or a message N via the signal input line KI1 is first by means of the filter 11 check its relevance using a destination identifier in the message header. Is the received packet for the node module 3.1 and thus the functional module 4.1 not relevant, the next state is "wait" (also called receive wait), which is maintained until the end of the reception of the relevant packet.

is the package relevant, it is in the state "Receive" (also Receive called) byte by byte stored.

The node unit 3.1 and in particular its module-related interface control unit 10 are themselves designed as integrated circuits. According to the invention, the node units 3.x Part of the functional modules 4.x comprehensive integrated circuit. In this case, the module-related interface control unit 10 designed as a so-called state machine in register form or as a memory cell. This type of hardware-based control and filtering of the data exchange allows a significant reduction of the interrupt load for the connected function module 4.1 ,

The interface register 12 the node unit 3.1 serves as an interface to the connected function module 4.1 and serves for the configuration, the reading of the master status or the setting of at least one command. Depending on the type of interface register 12 it can be read or written. The data of a packet use the same control lines of the bus interface, but are directly in the data memory 13 written or from the data store 13 read.

In 4 is an embodiment of a register structure of the interface register 12 shown.

The "Control" tab is used to configure the node unit 3.1 , It defines the general properties for sending and receiving messages and interrupt generation.

In the registers "Interrupt" and "Interrupt Mask" become the possible ones Interrupt sources defined. It is only relevant if in the register "Control" the "Global Interrupt" is set to "active" (= Enable).

The address registers "Nodeaddr 0" and "Node adddr 1" set the addresses of the node unit 3.1 (= the interface) at the protocol level and thus the function module 4.1 firmly. Depending on the system requirement, the address width and the number can be set accordingly. This makes it possible to have several functionalities within the same functional module 4.1 to address directly. The values stored in this address register "nodeaddr 0" or "nodeaddr 1" are used for the filter 11 as a basis for deciding relevance when receiving the packets.

The register "Command" becomes actions of the node unit 3.1 triggered. It is used in particular to start sending a packet and to delete a received packet in the Sending memory area of the data memory 13 ,

The function module has the "Status" tab 4.1 the possibility of the state of the node unit 3.1 read. In particular, the state of the data memory 13 can be determined this way.

The Messages to be transmitted N or data packets usually exist at least three parts: message header, data and checksum (short CRC). Depending on the system requirement, the parameters be set accordingly, a possible parameter set has z. For example, the following values: 2 bytes header, 1 to 16 bytes Data and 0 byte checksum.

Of the Message header of a message N or message sets itself, for example composed of four parts: source address, destination address, message type, Data length.

The source or source address indicates the sender of the message N. It is independent of the node or module address specified by the master unit 2 used for the parcel delivery. An interface, ie the node unit 3.1 , can therefore have multiple addresses or identifiers. The source address allows a unique identification of the transmitter, ie the transmitting function module 4.1 and the associated node unit 3.1 , It allows for multiple functional modules 4.1 to 4-n , z. B. several different or similar bus modules, can be distinguished, since alone on the basis of a bus ID (such as the CAN bus) no distinction would be possible. Identification of messages thus always takes place on the basis of the message ID of the bus together with the source address (= source ID).

Furthermore, the message header contains a destination address, which on the one hand can directly address one or more time modules (unicast, multicast) or identifies a broadcast. In particular, for inbound information that is potentially relevant to multiple functional modules 4.1 to 4-n This type is chosen to send the packages. Direct addressing can be used, for example, for sending outgoing messages.

The message type or packet type contained in the message header classifies the type of messages N or data packets and serves to quickly determine the relevance within a function module 4.1 , On the one hand, there are different types of packets: command, status, data, etc. On the other hand, there are different types within a message or packet class: start, stop, configuration at command, etc. In this way, N can already make decisions when reading the message the type of finishing will be taken. Further, certain message or packet types dictate the format of the messages N or packets. Depending on the implementation, a sufficiently large bit vector should be provided for the management of the message or packet types.

The The data length contained in the message header gives the length the message N or the data packet. It delivers on the one hand Information about the message or package content (e.g. B. length of a CAN message) and allows a more efficient utilization of the bus system. The data length always gives the reduced by one length of the data field again. A value of 0 thus corresponds to a length of a byte of data.

The Length of the message or data field is directly over the associated register DLC specified. The content of Data can be arbitrary or depending on the package type a particular Scheme follow.

About that In addition, the message header may require an additional checksum contain or at the end of the message additionally a checksum be included. The checksum is especially used in communication networks with low transmission errors, as in the present Communication structure within an integrated circuit a chip (= onchip network) not used. If necessary could however, the checksum is appended to each data packet be to a corresponding error detection or correction enable.

An example of application is a CAN communication interface (= CAN gateway) with four CAN bus modules 4.1 to 4.4 , a routing unit 14 all of them via associated node units 3.1 to 3.5 , with the master unit 2 are indicated. Ie. one of the function modules is the routing unit 14 , On an independent presentation of this constellation is omitted for reasons of clarity, as this is made 1 can derive.

To implement routing functions, such as message routing functions, signal routing functions, signal extraction functions in a manner not shown becomes the routing module 14 used that in 5 is shown in more detail.

5 shows the structure of a routing module 14 , The routing module 14 includes a routing unit 14.1 , a routing control unit 14.2 and a routing memory 14.3 , From the routing control unit 14.2 are thereby from the function modules 4.1 to 4.4 , in the specific case considered here are four CAN bus modules (in the general case, it may be at the function modules to be arbitrary bus systems, processors, external interfaces, storage), receive messages E or received messages. The receive messages E become the routing unit 14.1 supplied and processed by this to send messages S, via the routing control unit 14.2 to one of the functional modules 4.1 to 4-n be transmitted. In this case, the received messages E and / or transmission messages S and / or signals or information contained in these in the routing memory 14.3 temporarily and / or permanently stored.

Under the routing module 14 , in particular the routing unit 14.1 In particular, a hardware-based unit is understood by means of which messages N to be transmitted between the functional modules 4.1 to 4.4 generated on the basis of received signals in receive messages E as signals and / or compiled into signals in transmission messages S, merged and then forwarded. The functional modules 4.1 to 4.4 In the concrete case considered, external CAN bus systems are connected to the communication structure 1 are connected. These functional modules 4.1 to 4.4 are for example built in a motor vehicle as a network or integrated in any electronically networked system.

Generally speaking, the routing module serves 14 the communication, in particular for forwarding messages N between different or more similar functional modules 4.1 to 4-n , It can function as function modules 4.1 to 4-n several bus modules of different bus systems or multiple bus modules of a similar bus system and / or processors, memory, etc. may be connected. As a bus system different communication systems are possible, this can, for. For example: CAN, LIN, FLEXRAY, MOST, FIREWIRE, RS232, K-Line, USB, S-ATA ..

The routing module 14 ie the routing unit 14.1 , the routing control unit 14.2 and the routing memory 14.3 , are each at least partially as an integrated circuit and thus in a subset in hard-wired logic, ie formed hardware-based. Alternatively, these individual components may also be formed together as an integrated circuit. Preferably, these are implemented in so-called FPGAs, programmable integrated circuits or so-called ASICs, application-specific programmable integrated circuits or SOCs (SOC = system on chip) or in any configurable hardware. Such integrated circuits have memory cells, such as flip-flops, which can change their function even after manufacture. These memory cells are freely configurable with each other, wherein electrically conductive connections are reconnected, so that various logical circuits can be constructed. Thus, routing functions such as message routing functions, signal routing functions, signal extraction functions, can be easily and quickly edited and changed by configurable components themselves and at runtime.

So For example, one of the routing functions relates to the generation of collective messages or group messages. It is about to messages N, during the life of the system be generated from several signals. The signals can come from one or more receive messages E. The position the signals within receive messages E and send messages S (= source and destination message) is fixed, but usually not identical. This results in the request for any signals a new transmission message S with any signal positions to generate.

The routing unit 14.1 In other words, it is a hardware accelerator that can assemble any signals into new messages or send messages S within a few cycles. The approach can be used for any bus protocols. The parameters can be selected so that any collective messages or (collective) transmission messages S can be processed. In order to transmit the necessary signals from the receive messages N into a send message S, a filter and a shift operation are necessary. The necessary configuration data required for the generation, for example, in the routing memory 14.3 managed and deposited in a special table.

The routing unit 14.1 includes the main functionality of the routing module 14 , The bit width of the routing unit 14.1 is scalable according to requirements. For the generation of transmission messages S on the basis of received data of different reception messages E several, in particular different parameters are necessary. These describe, on the one hand, the various signal sources, ie, receive messages E (also called source messages) and, on the other hand, the exact position of individual signals contained in the receive messages E in the data field of the send message S to be generated (also called destination message). This is the number of bits that contain one or more signals of the receive messages E and that must be extracted from them, for example by moving them. It is also possible to specify two masking or range parameters "Start Mask" and "Stop Mask" which specify which signal range in the transmission message S (= destination message) is to be replaced. The area parameter represents this "Start Mask" the first signal bit and the area parameter "Stop Mask" the last signal bit of the signal range to be transmitted or filtered, which then forms the transmission message S.

• – Laden der Signale der Empfangsnachrichten E (z. B. Daten, Informationen) und Parameter (z. B. welche Signale oder Signalbereiche an welcher Position in welcher Sendenachricht S einzufügen sind),
• – Verschieben der empfangenen Signale,
• – Filtern der für die zu erstellende Sendenachricht S relevanten Signale,
• – Zusammenfügen der Signale zu der Sendenachricht S und
• – Speichern der Sendenachricht S.

For generating and / or assembling the transmission message S from signals of reception messages E or signals from the routing memory 14.3 the following messages are necessary in the transmission message S:

• Loading the signals of the receive messages E (eg data, information) and parameters (eg which signals or signal ranges are to be inserted at which position in which send message S),
• Shifting the received signals,
• Filtering the signals relevant for the transmission message S to be created,
• - Assembling the signals to the transmission message S and
• - Save the send message S.

In the following, the functionality of the communication structure will be explained using the example of a CAN message routing 1 be clarified. One on a CAN bus from a corresponding function module 4.1 received message is provided with a message header and in the data memory 13 the associated node unit 3.1 saved. Subsequently, the node unit 3.1 a send request to the associated send request input RQ1 of the master unit 2 set by the master unit 2 is evaluated. Get the function module 4.1 and thus the node unit 3.1 bus access, its monitoring output "Grant" with the ID "Grant ID" (= ID address) is set. Then the node unit sends 3.1 the message N to the master unit 2 that it's over the multiplexer 8th to all other node units 3.2 to 3.5 the functional modules 4.2 to 4.4 and the routing module 14 forwarded directly. In this case, the evaluation is carried out by the application or function module 4.2 to 4.4 , the routing module 14 and the message store 13 the node unit 3.1 ,

About the control unit 7 or the interface control unit 10 becomes the routing module 14 be controlled. In the case of message routing, the routing type and relation become the routing memory 14.3 evaluated on the basis of the identifier "Grant-ID" and the CAN port. A corresponding message is generated and the generated message N (= send message S) in the routing memory 14.3 and / or in the data memory 13 the node unit 3.1 saved. The sending of the transmission message S takes place as already described. At this point, however, the packet with the outgoing transmission message S is sent directly to the outgoing CAN module, which places the message on the CAN bus.

at the device according to the invention or the invention Procedure is one in creating a new one Gateway concept used for the upcoming sub-aspect. In this sub-aspect it is an optimized onchip communication structure for gateway applications. This can be a optimized, d. H. accelerated on-chip communication between implement individual function modules. As part of the gateway functionality Routing functions can be processed quickly. It will be the routing latencies reduced, which is a decisive advantage when it comes to transferring data in systems with security-related Functions, for example, in the field of vehicle technology Systems for performing steering interventions or systems for carrying out wheel-specific brake grips.

1

communication structure

2

Master unit

3

node unit

4

function modules

5

OR gate

6

decoder

7

control unit

8th

multiplexer

9

activity detector

10

module-related Interface controller

11

filter

12

Interface registers

13

data storage

14

routing Engine

14.1

routing unit

14.2

Routing control unit

14.3

routing memory

Accept

acknowledgment

Busy

Transmitting state collecting input

Grant

monitoring output

Grant ID

Grand identifier

Kl1 to KIn

signal input the respective node unit

KO 1 to KOn

signal output the respective node unit

RQ1 to RQn

Send request input at the master unit

SI1 to SIn

signal input at the master unit

SO

signal output at the master unit

QUOTES INCLUDE IN THE DESCRIPTION

This list The documents listed by the applicant have been automated generated and is solely for better information recorded by the reader. The list is not part of the German Patent or utility model application. The DPMA takes over no liability for any errors or omissions.

Cited patent literature

• DE 102004033781 A1 [0004]

Claims (15)

Device for data exchange between at least two functional modules ( 4.1 to 4-n ) of an integrated circuit, wherein the functional modules ( 4.1 to 4-n ) via a communication structure ( 1 ) for processing interface-related functions between the function modules ( 4.1 to 4-n ), the communication structure ( 1 ) Part of the integrated circuit or itself is designed as an integrated circuit. Device according to claim 1, characterized in that the communication structure ( 1 ) a master unit ( 2 ) and one of the number to the communication structure ( 1 ) connected functional modules ( 4.1 to 4-n ) corresponding number of node units ( 3.1 to 3.n ) having. Device according to claim 2, characterized in that the master unit ( 2 ) at least one decoder ( 6 ), a control unit ( 7 ) and a multiplexer ( 8th ). Device according to claim 2 or 3, characterized in that the master unit ( 2 ) one of the number of function modules ( 4.1 to 4-n ) comprises corresponding number of signal inputs (SI1 to SIn) and transmission request inputs (RQ1 to RQn). Device according to one of claims 2 to 4, characterized in that the master unit ( 2 ) comprises at least one transmit state collection input (Busy). Apparatus according to claim 5, characterized in that the transmission state collection input (Busy) based on the busy signals all at the master unit ( 2 ) connected functional modules ( 4.1 to 4-n ) and / or node units ( 3.1 to 3.n ) is formed. Device according to one of claims 2 to 6, characterized in that the respective node unit ( 3.1 to 3.n ) one of the functional modules ( 4.1 to 4-n ) assigned. Device according to one of claims 2 to 7, characterized in that the node unit ( 3.1 to 3.n ) Is formed as part of the integrated circuit or as an integrated circuit which comprises at least one activity detector ( 9 ), a module-related interface control unit ( 10 ), a filter ( 11 ), one or more interface registers ( 12 ) and a data memory ( 13 ). Device according to one of claims 1 to 8, characterized in that the communication structure ( 1 ) as one or part of a programmable integrated circuit (FPGA), in particular as one or part of an application specific integrated circuit (ASIC) is formed. Device according to one of claims 1 to 9, characterized in that the functional module ( 4.1 to 4-n ) is a bus module, a bus controller, a bus transceiver, a bus management unit, processors, external interfaces and / or a memory unit. Device according to one of claims 1 to 10, characterized in that the interface-related Features message routing functions, signal routing functions, Data collection routing functions, signal extraction functions, protocol conversion functions, Network management functions and / or diagnostic functions include. Device according to one of claims 1 to 11, characterized in that the communication structure via at least one of the functional modules ( 4.1 to 4-n ), in particular one of the bus modules an external bus system can be coupled. Device according to claim 12, characterized in that the external bus system is a data bus. Device according to claim 1, characterized in that that the communication structure is at least partially hard-wired Logic is constructed. Method for exchanging data between at least two functional modules ( 4.1 to 4-n ) of an integrated circuit by means of a device according to one of claims 1 to 14, characterized by the steps of: - setting a send request (RQ1 to RQn) of one of the function modules ( 4.1 to 4-n ) to the communication structure ( 1 ) for processing interface-related functions between the function modules ( 4.1 to 4-n ), - determining the next sending function module ( 4.1 to 4-n ), - determining the signal inputs to be released (SI1 to SIn) which are coupled to signal outputs (SO), - transmitting transmission messages (S), - monitoring the transmission of the transmission messages (S) and - resetting the enabled signal inputs (SI1 to SIn) ,