DE102007011817A1 - Error e.g. assembly error, locating method for printed circuit board, involves obtaining test parameters from correlation analysis of signal subjected in circuit and signal measured at circuit - Google Patents

Abstract

The method involves measuring test parameters of a circuit of a printed circuit board (15) that is equipped with components. The measured test parameters are compared with reference parameters. The test parameters are obtained from a correlation analysis of a signal subjected in the circuit and a signal measured at the circuit, where either the subjected signal or the measured signal is directly coupled into the board and/or decoupled from the board. Other signals are decoupled from the board and/or coupled in the board over a capacitive coupling. An independent claim is also included for a device for locating errors on an electronic printed circuit board.

Description

The The invention relates to a method and apparatus for locating of assembly errors, component defects and contacting errors on electronic circuit boards.

to Detection of assembly errors, component defects and contacting errors Conventional methods are used, which the circuit apply an input signal and one or more output signals directly on the pins or on the intended connections measure up. However, these methods are not always, especially at Can be used SMD construction, as a contacting of the pins is not always possible, and special connections are not always possible Are available.

The state of the art is based on the European patent specification EP 0 775 318 B1 directed. This discloses a method for locating errors on printed circuit boards. The output signal is tapped capacitively. However, no relation between the input signal and the capacitively determined output signal is considered. Only the serial capacity of the single pin is used as a measure to check the correctness of the pin of the circuit board. A disadvantage of the method described is its sensitivity to capacitive coupling interference.

Of the Invention is based on the object, a method and an apparatus to provide for the determination of errors on printed circuit boards, which easy to handle and at the same time interference-resistant.

The Task is according to the invention for the process by the features of claim 1 and for the device solved by the features of claim 13. advantageous Further developments are the subject of this reference Dependent claims.

The invention is based on the concept described below:
To determine sources of error on a printed circuit board, a signal is impressed successively in all connections of the circuit to be examined. By means of a capacitive sensor, a signal is tapped off the circuit. On the basis of the relationship between the application signal and the capacitively tapped signal, errors can be localized on the measurement object by comparison with reference parameters of a faultless printed circuit board.

The Method of measurement preferably begins in a first phase with the discharge of all capacities of the circuit board. For this purpose, all reference and test pins via an ammeter and discharging a discharge circuit current limited to the GND potential. In the second phase, each test gin is taken individually from the common test lead and connected to a single test lead. about the signal source will now be a defined signal on the test pin given.

advantageously, is used as an apply signal generated from a square wave signal used digital bit pattern. Advantageously, the setting of output voltage, current limit, waveform and / or frequency be set individually for each test point. The applied to the circuit capacitive sensor takes that of the circuit modified signal and prepares it advantageously in a sensor electronics before it is forwarded. It is advantageous, time synchronous with the output of the input signal to record the output signal of the capacitive sensor equidistantly. After completion of the measurement, the individual Testgin is again with connected to the common measuring line.

advantageously, becomes a source of bipolar characteristic for application used. When stimulating the reference pins so many signal paths couple in the circuit the signal in the capacitive sensor. This leads to conventional test procedures to a much higher signal level.

The Output signal has similarities in shape to the Apply signal on. From the comparison of the amplitudes can For example, obtained a parameter for the evaluation of the circuit become.

advantageously, a detection of the applied bit pattern in the output signal is performed. The recorded analog signal of the sensor is within evaluated the respective bit duration and by comparison with a Threshold is assigned a 0 or 1 to the corresponding bit. The detection rate provides the parameter for evaluating the PCB.

The determination of the test parameters is advantageously carried out with the aid of a so-called "learning program." A test object is connected to the test system for all test pins, standard values are set and a test is carried out by varying or adapting the output voltage, current limitation, signal shape and / or Frequency, the feed signal is varied until an optimum ratio between the apply signal and the signal detected by the sensor is reached compared to meters. On the basis of specified threshold values, it is determined whether an error of the device under test is present at the respective pin.

following the invention with reference to the drawing, in which an advantageous Embodiment of the invention is shown, by way of example described. In the drawing show:

1 A side sectional view of an embodiment of the device according to the invention;

2 A representation of an embodiment of the device according to the invention during the discharge;

3 this in 2 illustrated embodiment of the device according to the invention when subjected to an input signal;

4 an exemplary block diagram of the signal processing;

5 an exemplary input signal and an associated sampled and detected output signal of the capacitive sensor;

6 an overview of exemplary reference parameters and possible test parameters.

First, in 1 the mechanical structure of the device illustrated before in the 2 and 3 the interconnection is displayed. Based on 4 to 6 the evaluation of the signals is clarified. Identical elements have not been repeatedly shown and described in similar figures.

1 shows an embodiment of the device according to the invention in a side sectional view through the circuit board 15 and the capacitive sensor 104 , On a circuit board 15 is by means of pins 101 (Pins) an electronic component within a component housing 102 assembled. On the component housing 102 is the capacitive sensor 104 on. This is done by spring-loaded pins 103 kept in position. The signals of the capacitive sensor 104 be from the sensor electronics 106 prepared and via the sensor electronic connection cable 105 forwarded. The use of a capacitive sensor makes it possible to contact even difficult-to-contact components, such as SMD components, since it is not necessary to reach all the pins of the component.

In the 2 is an embodiment of the device according to the invention consisting of the circuit board to be tested 15 with the circuit 3 , an interconnection matrix 4 , a voltage source or discharge unit 1 , a power meter 2 , a capacitor connected to ground 14 , the lines "Current Testgin" 9 , the reference line 10 and the line "Remaining Testpins" 11 shown.

The circuit to be tested 3 has an input in the example shown 12 , an exit 13 , a first connection 5 for power supply VCC, one supply line 7 for connection to the ground potential GND, a terminal VIO 6 , a second connection 8th for power supply VSS. The circuit itself consists in the illustrated example of two diodes connected in series 32 . 33 , an input resistance 30 and in series with an input amplifier 31 , At the output are two series connected driver transistors 34 . 35 , as well as each parallel to the transistors 34 . 35 switched diodes 36 . 37 and an output resistance 38 connected.

The interconnection matrix 4 is with all pins of the PCB 15 to the line "Current Testgin" 9 switchable. Likewise, all pin connections to the line "Remaining test pins" 11 switchable. The interconnection matrix 4 In particular, each has a connection to the entrance 12 and one to the exit 13 the circuit to be tested 3 ,

The circuit to be tested 3 has at the connection VCC 5 , VSS 8th , VIO 6 and GND 7 a switchable connection to the reference line 10 , The connections VIO 6 , VCC 5 , VSS 8th and GND 7 also have a switchable connection to the line "Current Testgin" 9 , The line "Current Testgin" 9 has at the connection VCC 5 a branch with a capacitor connected to ground 14 , The line "Current Testgin" 9 has one in series with a voltage source 1 switched electricity meter 2 , The second pole of the voltage source 1 has a switchable connection to the lines "Reference" 10 and "remaining test pins" 11 and is also connected in the embodiment to ground.

To avoid interference from parasitic or switched capacitances, the circuit is first discharged with all pins. The connection will be VCC 5 , with the line "Current Testgin" 9 , via the current meter 2 and about the voltage source 1 switched to ground. The grounded capacitor 14 is part of the circuit to be tested and should be discharged.

In 3 the test procedure is shown on a pin. This is done by the voltage source 1 the positive part of the known input signal on the line "Current Testgin" 9 connected. The line "Current Testgin" 9 is via the interconnection matrix 4 on the pin to be tested, in the example shown on the input 12 the circuit 3 switched, switched. About the input resistance 30 and the upper diode 32 the signal is sent to the connection VCC 5 and via the "Reference" line 10 to the second pole of the voltage source 1 transfer. Due to the bipolar characteristic of the voltage source 1 become negative signal components of the input signal from the second pole of the DC power source 1 on the line "Reference" 10 , for connection GND 7 the circuit 3 , over the lower diode 33 on the input resistance 30 , via the measured pin on the line "Current Testgin" 9 to the voltmeter 2a and to the first pole of the voltage source 1 transfer.

The unmeasured pins are in common with the line "Remaining Test Pins" 11 switched to ground in the exemplary embodiment. Each pin to be measured is individually examined and used to interpret possible sources of error. All other pins remain untouched by the measurement.

Before the measurement can begin, preferably all pins of the unit to be tested should be discharged so that erroneous measurements due to transhipment effects are avoided during the later test. These effects are typically caused by populated or parasitic capacitors. For this purpose, as in 1 shown, all reference and test pins via the ammeter and the discharge circuit controlled unloaded to the ground potential and connected to a common measuring line "reference" or "remaining test pins".

In the second phase, each test guest is taken individually from the common test lead "Remaining test pins" 11 separated and with the test lead "Current Testgin" 9 connected. The test pin is measured via two circuits. The first starts at the voltage source 1 and leads via the line "Current Testgin" 9 , the testgin, the VCC connector 5 , the reference line and back to the voltage source 1 , The second circuit also starts at the voltage source 1 and leads via the line "Current Testgin" 9 , the testgin, the GND connector 7 , the reference line 10 and back to the voltage source 1 , The remaining pins in the interconnection matrix 4 are with the line "Remaining Testpins" 11 connected. About the voltage source 1 Now a signal is given to the test pin.

The setting of output voltage, current limit, signal shape and / or frequency can preferably be set individually for each test point. Simultaneously with the switching on of the voltage source, the signal of the capacitive sensor 104 via the sensor electronics 106 and the sensor electronics connection line 105 to the voltmeter 2a transferred and z. B. recorded equidistantly. Here the testgin is examined completely autonomously. Afterwards every testgin will be tested again with the test lead "Remaining test pins" 11 connected.

Alternatively to the measuring arrangement shown in the drawing can be measured with a changed direction of measurement. That the circuit 3 acting signal is via a in place of the capacitive sensor 104 mounted capacitive coupler impressed. While all remaining n - 1 pins are connected to the line "Remaining Test Pins" 11 are connected, the current is measured by the Prüfpin and in the evaluation device 400 processed.

4 shows an exemplary block diagram of the processing of the input signals and output signals. The capacitive sensor 104 stands with the circuit 3 via a capacitive coupling 410 in connection. The capacitive sensor is with the sensor electronics 106 connected. The sensor electronics 106 is still with the voltmeter 2a connected. The voltmeter 2a is with an evaluation device 400 connected. The evaluation device 400 consists for example of an analog-to-digital converter 403 , a detector 402 , a control device 401 and a digital-to-analog converter 404 , The voltmeter 2a is with the analog-to-digital converter 403 connected. This one is with the detector 402 connected. The control device 401 is with the detector 402 and the digital-to-analog converter 404 connected. The digital-to-analog converter 404 stands with the voltage source 1 in connection. The voltage source 1 is with the circuit 3 connected.

That from the voltmeter 2a measured signal is from the analog-to-digital converter 403 sampled and sent to the detector 402 transmitted. The control device 401 generates the input signal to which the circuit 3 is applied in digital form and transmitted to the digital-to-analog converter 403 , This generates an analog signal with which the voltage source 1 is controlled. This generates the circuit 3 acting signal. The detector 402 detects the values of the received bits and passes the result to the controller 401 further. In the control device 401 become the test parameters from the detected values 603 . 604 determined, and this with reference parameters 601 compares to it the errors of the circuit board 15 to investigate.

5 shows an exemplary input signal 502 and an already processed output signal 500 of the capacitive sensor. As input signal 502 a known bit sequence was chosen. This is an input signal as a result of rectangular pulses 502 connected. To determine the test parameters when using such an input signal, the output signal of kapazi tive sensor 104 via a sensor electronics 106 prepared, z. B. reinforced. Subsequently, the signal is in the voltmeter 2a measured and sampled bit-wise. The sampling takes place to those from the input signal 502 known bit times. The detection rate of the correct bits of the input data in the output signal is used, for example, as a test parameter for the evaluation of the circuit. Misasserted bits 501 indicate an error of the respective pin.

In the example of 5 is a detection rate of 7 / 8th ascertainable. Another exemplary test parameter is the result of the correlation of the output signal with the input signal.

The determination of the setpoint values or desired value ranges of the test parameters is preferably carried out with the aid of a learning program. The definition of the test pins is done via an editable configuration file. An error-free sample copy of the test object 15 is connected to the test system. Default values are set for all test pins and a test is performed. By varying or adapting the output voltage, current limitation, signal shape and frequency, the input signal is varied until an optimum ratio between the application signal and the signal determined by the sensor is reached.

6 shows an overview of exemplary reference parameters 601 on different pins and associated test parameters 603 and 604 , Hatched is a test parameter span 602 , in which the measured value may be, so that the candidate is judged to be faultless. The test parameters 603 lie within the test parameter range 602 and thus correspond to the specification. The test parameters 604 lie outside the test parameter range 602 and do not conform to the specification. Is at least one test parameter 604 outside the test parameter range 602 , the examinee is judged to be faulty. The 6 shows the type of reference parameter 601 and associated test parameters 603 and 604 Not. The statements can be used for all reference parameters 601 and test parameters 603 and 604 generally considered.

The invention is not limited to the illustrated embodiment. As mentioned earlier, for the reference line 10 also other potentials than the ground potential GND can be used. Instead of a voltage source and a current source can be used, in which case instead of a current limit, a voltage limitation is used. The inventive method is not limited to digital ICs, but is also able to test passive components or circuit clusters. All features described above or features shown in the figures can be combined with each other in the invention as desired.

QUOTES INCLUDE IN THE DESCRIPTION

This list The documents listed by the applicant have been automated generated and is solely for better information recorded by the reader. The list is not part of the German Patent or utility model application. The DPMA takes over no liability for any errors or omissions.

Cited patent literature

• - EP 0775318 B1 [0003]

Claims (20)

Method for locating errors on electronic circuit boards ( 15 ) with several pins, test parameters ( 603 . 604 ) a circuit ( 3 ) of the printed circuit board equipped with components ( 15 ), the measured test parameters ( 603 . 604 ) with reference parameters ( 601 ), the test parameters ( 603 . 604 ) from a match analysis of a circuit ( 3 ) and one at the circuit ( 3 ) are obtained, and wherein either the signal applied or the on the circuit ( 3 ) measured signal directly into the PCB ( 15 ) is coupled in and / or out of this and the respective other signal via a capacitive coupling ( 410 ) from the printed circuit board ( 15 ) is coupled out or coupled into this. Method according to claim 1, characterized in that for measuring the test parameters ( 603 . 604 ) each one of the n total pins of the circuit ( 3 ) is acted upon as pin to be examined with the impinging signal, and that the other n - 1 pins of the circuit ( 3 ) are connected to a defined potential, in particular the ground potential. Method according to claim 2, characterized in that for measuring the test parameters ( 603 . 604 ) that the circuit ( 3 ) is introduced conductively over the respective pin to be examined, and that the signal measured at the circuit via the capacitive coupling ( 410 ) is measured. Process according to Claims 1 to 3, characterized in that the capacitive coupling ( 410 ) by a capacitive sensor ( 104 ), on the circuit ( 3 ) is carried out. Method according to Claims 1 to 4, characterized in that all the pins are subjected to a voltage or current source ( 1 ) are discharged via a discharge circuit current limited to a ground potential. Method according to claim 2 or 3, characterized in that a known bit sequence represented by a sequence of pulses from a voltage or current source ( 1 ) is impressed on the pin to be examined. A method according to claim 6, characterized in that an adjustment of an output voltage or an output current, a current or voltage limitation of a signal waveform and / or a frequency of the signal source ( 1 ) is made separately for each pin to be examined. Method according to one of the claim 4, characterized in that the signal of the capacitive sensor ( 104 ) starting with the switching on of the signal source ( 1 ) is recorded. Method according to one of claims 1 to 8, characterized in that the reference parameters ( 601 ) are determined on a perfect sample part and then stored. Method according to Claim 7, characterized in that all measured values are obtained by varying the output voltage and the current limiting or output current and limiting the voltage of the signal source ( 1 ) can be adjusted within a range of approximately 50% of the maximum value in order to achieve the maximum sensitivity with different test parameters ( 603 . 604 ) to reach. Method according to claim 4 or 8, characterized in that the output signal of the capacitive sensor ( 104 ) and the bit value is detected, that the resulting bit sequence is compared with the known bit sequence of the applied signal, and that the sequence of correctly detected bits as test parameters ( 603 . 604 ) is being used. Method according to claim 10, characterized in that the output signal of the capacitive sensor ( 104 ) is correlated with the applied signal, and that the result of the correlation as a test parameter ( 603 . 604 ) is being used. Device for locating errors on electronic circuit boards ( 15 ), in particular with a method according to one of claims 1 to 12, with a programmable signal source ( 1 ), a capacitive sensor ( 104 ) or a capacitive coupler, a flexible interconnection matrix ( 4 ) for the pins to be examined, an evaluation device ( 400 ) and a circuit for discharging the pins to be tested. Apparatus according to claim 13, characterized in that the evaluation device ( 400 ) Test parameters ( 603 . 604 ) and the test parameters ( 603 . 604 ) with reference parameters ( 601 ) and comparing the test parameters ( 603 . 604 ) with the reference parameters ( 601 ) the mistakes of the ladder plate determines that the evaluation device ( 400 ) the circuit is supplied with signals that the evaluation device ( 400 ) on the circuit ( 3 ) evaluates measured signals, and that the evaluation device ( 400 ) from the at the circuit ( 3 ) measured signals and the circuit ( 3 ) acting signals determines the test parameters. Apparatus according to claim 14, characterized in that, the circuit ( 3 ) signal is a known signal, and that the evaluation device ( 400 ) the test parameters ( 603 . 604 ) by means of a match analysis of the measured signals and the circuit ( 3 ) signals. Apparatus according to claim 15, characterized in that, the circuit ( 3 ) is a train of pulses. Apparatus according to claim 16, characterized in that the evaluation device consists of an analog-to-digital converter ( 403 ), a digital-to-analog converter ( 404 ), a detector ( 402 ) and a control device ( 401 ) consists. Device according to one of claims 13 to 17, characterized in that the capacitive sensor ( 104 ) that at the circuit ( 3 ) picks up measured signal. Device according to one of claims 13 to 18, characterized in that the signal source ( 1 ) allows the measurement of multiple signal paths by a bipolar characteristic. Device according to claim 19, characterized in that the programmable signal source ( 1 ) a bipolar, pulsable voltage source ( 1 ) with programmable output voltage and current limiting or a bipolar, pulsable current source ( 1 ) with programmable output current and voltage limiting, and with programmable waveform and / or frequency.