DE102006060801B4 - Method for producing a chip card module and chip card module - Google Patents
Method for producing a chip card module and chip card module Download PDFInfo
- Publication number
- DE102006060801B4 DE102006060801B4 DE102006060801A DE102006060801A DE102006060801B4 DE 102006060801 B4 DE102006060801 B4 DE 102006060801B4 DE 102006060801 A DE102006060801 A DE 102006060801A DE 102006060801 A DE102006060801 A DE 102006060801A DE 102006060801 B4 DE102006060801 B4 DE 102006060801B4
- Authority
- DE
- Germany
- Prior art keywords
- carrier
- layer
- chip
- card module
- chip card
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 16
- 239000002184 metal Substances 0.000 claims abstract description 42
- 229910052751 metal Inorganic materials 0.000 claims abstract description 42
- 239000007858 starting material Substances 0.000 claims abstract description 26
- 229910000906 Bronze Inorganic materials 0.000 claims abstract description 23
- 239000010974 bronze Substances 0.000 claims abstract description 23
- KUNSUQLRTQLHQQ-UHFFFAOYSA-N copper tin Chemical compound [Cu].[Sn] KUNSUQLRTQLHQQ-UHFFFAOYSA-N 0.000 claims abstract description 23
- 239000002245 particle Substances 0.000 claims abstract description 13
- 238000001465 metallisation Methods 0.000 claims abstract description 10
- 238000000034 method Methods 0.000 claims description 25
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 14
- 229910052802 copper Inorganic materials 0.000 claims description 14
- 239000010949 copper Substances 0.000 claims description 14
- 238000005516 engineering process Methods 0.000 claims description 6
- 239000003292 glue Substances 0.000 claims description 6
- 239000011248 coating agent Substances 0.000 claims description 4
- 238000000576 coating method Methods 0.000 claims description 4
- 239000000463 material Substances 0.000 claims description 4
- 238000007747 plating Methods 0.000 claims description 4
- 229920003235 aromatic polyamide Polymers 0.000 claims description 2
- 239000004020 conductor Substances 0.000 claims description 2
- 239000000835 fiber Substances 0.000 claims description 2
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 6
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 description 6
- 229910052718 tin Inorganic materials 0.000 description 6
- 239000000543 intermediate Substances 0.000 description 5
- UQSXHKLRYXJYBZ-UHFFFAOYSA-N Iron oxide Chemical compound [Fe]=O UQSXHKLRYXJYBZ-UHFFFAOYSA-N 0.000 description 4
- 238000004544 sputter deposition Methods 0.000 description 4
- HCHKCACWOHOZIP-UHFFFAOYSA-N Zinc Chemical compound [Zn] HCHKCACWOHOZIP-UHFFFAOYSA-N 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 3
- 238000005530 etching Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 229910052742 iron Inorganic materials 0.000 description 3
- 229910052725 zinc Inorganic materials 0.000 description 3
- 239000011701 zinc Substances 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 2
- 230000001070 adhesive effect Effects 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000013067 intermediate product Substances 0.000 description 2
- 238000010030 laminating Methods 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 238000004080 punching Methods 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 239000011135 tin Substances 0.000 description 2
- 229910001369 Brass Inorganic materials 0.000 description 1
- 230000006978 adaptation Effects 0.000 description 1
- 230000003321 amplification Effects 0.000 description 1
- 239000010951 brass Substances 0.000 description 1
- 229920002678 cellulose Polymers 0.000 description 1
- 239000001913 cellulose Substances 0.000 description 1
- 238000004140 cleaning Methods 0.000 description 1
- 230000001419 dependent effect Effects 0.000 description 1
- 239000003792 electrolyte Substances 0.000 description 1
- 230000005672 electromagnetic field Effects 0.000 description 1
- 238000005246 galvanizing Methods 0.000 description 1
- QUCZBHXJAUTYHE-UHFFFAOYSA-N gold Chemical compound [Au].[Au] QUCZBHXJAUTYHE-UHFFFAOYSA-N 0.000 description 1
- MSNOMDLPLDYDME-UHFFFAOYSA-N gold nickel Chemical compound [Ni].[Au] MSNOMDLPLDYDME-UHFFFAOYSA-N 0.000 description 1
- 239000002923 metal particle Substances 0.000 description 1
- -1 mostly tin Chemical class 0.000 description 1
- 150000002825 nitriles Chemical class 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 238000002360 preparation method Methods 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
Classifications
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
- G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
- G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
- G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
- G06K19/07745—Mounting details of integrated circuit chips
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- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
- G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
- G06K19/02—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the selection of materials, e.g. to avoid wear during transport through the machine
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
- H01L21/4814—Conductive parts
- H01L21/4846—Leads on or in insulating or insulated substrates, e.g. metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49855—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers for flat-cards, e.g. credit cards
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0313—Organic insulating material
- H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
- H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/22—Secondary treatment of printed circuits
- H05K3/24—Reinforcing the conductive pattern
- H05K3/245—Reinforcing conductive patterns made by printing techniques or by other techniques for applying conductive pastes, inks or powders; Reinforcing other conductive patterns by such techniques
- H05K3/246—Reinforcing conductive paste, ink or powder patterns by other methods, e.g. by plating
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
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- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/0556—Disposition
- H01L2224/05568—Disposition the whole external layer protruding from the surface
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- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/02—Bonding areas; Manufacturing methods related thereto
- H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L2224/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
- H01L2224/0554—External layer
- H01L2224/05573—Single external layer
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/10—Bump connectors; Manufacturing methods related thereto
- H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
- H01L2224/161—Disposition
- H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H01L2224/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
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- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L24/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L24/31—Structure, shape, material or disposition of the layer connectors after the connecting process
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/90—Methods for connecting semiconductor or solid state bodies using means for bonding not being attached to, or not being formed on, the body surface to be connected, e.g. pressure contacts using springs or clips
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/00014—Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
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- H01L2924/01068—Erbium [Er]
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01079—Gold [Au]
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0386—Paper sheets
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0275—Fibers and reinforcement materials
- H05K2201/0278—Polymeric fibers
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
- H05K2201/0275—Fibers and reinforcement materials
- H05K2201/0284—Paper, e.g. as reinforcement
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0347—Overplating, e.g. for reinforcing conductors or bumps; Plating over filled vias
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- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/10—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern
- H05K3/12—Apparatus or processes for manufacturing printed circuits in which conductive material is applied to the insulating support in such a manner as to form the desired conductive pattern using thick film techniques, e.g. printing techniques to apply the conductive material or similar techniques for applying conductive paste or ink patterns
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Power Engineering (AREA)
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- Ceramic Engineering (AREA)
- Credit Cards Or The Like (AREA)
Abstract
Verfahren
zur Herstellung eines Chipkartenmoduls umfassend:
– Bereitstellen
eines papiernen Trägers
(10) mit einer ersten Seite (11) und einer zweiten Seite (12),
– Aufbringen
einer strukturierten Starterschicht (101) mit leitfähigen Partikeln
auf zumindest eine Seite (11, 12) des Trägers (10), sodass die Partikel
auf dem Träger
(10) fixiert sind,
– Metallisieren
der Starterschicht (101), sodass eine strukturierte Metallschicht
(30, 40) ausgebildet wird, und
– Montieren eines Chips (20)
auf den Träger
(10) mit der Metallschicht (3, 4),
dadurch gekennzeichnet,
dass beim Metallisieren eine Bronzeschicht (103) aufgebracht wird.Method for producing a chip card module comprising:
Providing a paper carrier (10) having a first side (11) and a second side (12),
- applying a structured starter layer (101) with conductive particles on at least one side (11, 12) of the carrier (10), so that the particles are fixed on the carrier (10),
- Metallisieren the starter layer (101), so that a structured metal layer (30, 40) is formed, and
Mounting a chip (20) on the carrier (10) with the metal layer (3, 4),
characterized in that during metallization, a bronze layer (103) is applied.
Description
Die Erfindung betrifft ein Chipkartenmodul und ein Verfahren zur Herstellung eines Chipkartenmoduls.The The invention relates to a smart card module and a method of manufacturing a chip card module.
Chipkarten werden in einer Vielzahl von Anwendungen eingesetzt. Üblicherweise besteht eine Chipkarte aus einem Kartenkörper, in den ein Chipkartenmodul eingebracht ist. Das Chipkartenmodul umfasst einen Chip mit einer integrierten Schaltung. Zugriff auf den Chip erfolgt üblicherweise über eine kontaktbehaftete Schnittstelle mit Kontaktflächen, die typischerweise auf dem Chipkartenmodul vorgesehen sind. Zugriff kann auch über eine kontaktlose Schnittstelle, beispielsweise mittels eines elektromagnetischen Feldes, erfolgen. Für den Einsatz in Chipkarten, aber auch in Ausweisen, sind flache Chipkartenmodule von Vorteil.smart cards are used in a variety of applications. Usually a chip card consists of a card body, into which a chip card module is introduced. The smart card module comprises a chip with a integrated circuit. Access to the chip is usually via a contact-type Interface with contact surfaces, which are typically provided on the smart card module. access can also over a contactless interface, for example by means of an electromagnetic Field, done. For the use in smart cards, but also in ID cards, are flat chip card modules advantageous.
Zur Herstellung von Chipkartenmodulen kann ein Chip auf einen Träger mit metallenen Leiterstrukturen montiert werden. Die Sputter-Technologie ist geeignet, um strukturierte Metallisierungen auf dem Träger auszubilden. Dabei werden durch Sputtern Metallpartikel als eine Starterschicht auf den Träger aufgebracht. Danach wird eine Fotofilmschicht auflaminiert. Durch Belichten und Entfernen von Bereichen der Fotoschicht wird diese strukturiert. Anschließend werden die frei liegenden Bereiche der Starterschicht geätzt, um eine Strukturierung der Starterschicht zu erreichen. Nach dem Entfernen der Fotofilmschicht wird eine galvanisierte Schicht auf die strukturierte Starterschicht aufgebracht. Diese Schicht umfasst typischerweise Nickel-Gold oder Gold.to Making chip card modules can use a chip on a carrier metal conductor structures are mounted. The sputtering technology is suitable for forming structured metallizations on the support. In this case, sputtering metal particles as a starter layer on the carrier applied. Thereafter, a photo film layer is laminated. By Exposing and removing areas of the photo layer becomes this structured. Subsequently The exposed areas of the starter layer are etched to to achieve a structuring of the starter layer. After removing the photo film layer is a galvanized layer on the structured Starter layer applied. This layer typically includes Nickel-gold or gold.
Das Laminieren, Belichten, Ätzen und Reinigen, um die Strukturierung der Sputter-Schicht auszubilden, ist sowohl zeit- als auch kostenintensiv.The Laminating, exposing, etching and cleaning to form the structuring of the sputtering layer, is both time-wise also costly.
In
den Dokumenten
Erfindungsgemäß sieht ein Verfahren zur Herstellung eines Chipkartenmoduls vor, einen papiernen Träger mit einer ersten Seite und einer zweiten Seite bereitzustellen. Eine strukturierte Starterschicht mit leitfähigen Partikeln wird auf zumindest eine Seite des Trägers aufgebracht, sodass die Partikel auf dem Träger fixiert sind. Die Starterschicht wird metallisiert, sodass eine strukturierte Metallschicht ausgebildet wird. Ein Chip wird auf den Träger mit der Metallschicht montiert. Das Verfahren ist dadurch gekennzeichnet, dass die strukturierte Metallschicht eine Bronzeschicht umfasst. Dieses Verfahren ist unter anderem durch die Verwendung des papiernen Trägers kostengünstig. Ferner ist der papierne Träger ausreichend stabil und flexibel für eine Verwendung im Chipkartenmodul.According to the invention sees a method for producing a smart card module before, a paper carrier with a first page and a second page. A structured starter layer with conductive particles is deposited on at least one Side of the carrier applied so that the particles are fixed on the carrier. The starter layer is metallized, so that a structured metal layer is formed becomes. A chip gets on the carrier mounted with the metal layer. The method is characterized the structured metal layer comprises a bronze layer. This procedure is partly due to the use of the paper carrier inexpensive. Further, the paper carrier sufficiently stable and flexible for use in the chip card module.
Das Aufbringen einer Bronzeschicht ist kostengünstig. Solch eine Bronzeschicht kann direkt auf die Starterschicht aufgebracht werden. In einer anderen Ausbildung wird die Bronzeschicht als Abschlussschicht auf eine andere Schicht, bei spielsweise auf die Kupferschicht, aufgebracht.The Applying a bronze layer is inexpensive. Such a bronze layer can be applied directly to the starter layer. In a Other training is the bronze layer as a finishing layer another layer, for example, applied to the copper layer.
Auf einer Ausgestaltung des papiernen Träger kann eine Beschichtung aufgebracht werden, sodass das Papier während des Metallisierungsvorgangs geschützt ist. In eine weitere Ausgestaltung umfasst das Material des papiernen Trägers wasserunlöslichen Leim. Diese Ausgestaltungen machen den Träger feuchtigkeitsresistent und schützen ihn nach der Fertigung vor äußeren Einflüssen.On An embodiment of the paper carrier can be a coating be applied so that the paper during the metallization process protected is. In a further embodiment, the material includes the paper carrier water Glue. These embodiments make the wearer moisture resistant and protect him after production from external influences.
Die strukturierte Starterschicht kann beispielsweise aufgedruckt werden, was mehrere Schritte der konventionellen Prozessabfolge einspart. Wenn die strukturierte Starterschicht sowohl auf der ersten als auch auf der zweiten Seite des Trä gers aufgebracht wird, wird die Dichte der metallenen Strukturen auf dem Träger erhöht. In solch einem Fall werden vor dem Metallisieren Aussparungen in den Träger eingebracht, wobei die Aussparungen durchgängig zwischen der ersten und der zweiten Seite des Trägers sind. Diese Aussparungen dienen zur Ausbildung von Durchkontaktierungen.The structured starter layer can be printed, for example, which saves several steps in the conventional process sequence. If the structured starter layer is on both the first and is also applied to the second side of Trä gers is increases the density of the metal structures on the support. In such a case will be Before metallizing recesses introduced into the carrier, wherein the Recesses throughout between the first and second sides of the carrier. These recesses serve for the formation of vias.
Das Galvanisieren der Starterschicht, um die Metallschicht auszubilden, erfolgt beispielsweise in einem Metallisierungsbad. In einer Ausgestaltung wird eine Kupferschicht aufgebracht, die eine gute elektrische Leitfähigkeit hat.The Plating the starter layer to form the metal layer, takes place, for example, in a metallizing bath. In one embodiment a copper layer applied, which has a good electrical conductivity Has.
Die Ausbildung von Durchkontaktierungen erfolgt, indem Wandungen der Aussparungen beim Metallisieren als leitende Verbindungen zwischen der ersten und zweiten Seite ausgebildet werden. Durch die Durchkontaktierungen werden die Metallschichten auf beiden Seiten des Substrats leitend verbunden.The Formation of vias is done by walls of the Recesses during metallization as conductive connections between the first and second sides are formed. Through the vias The metal layers on both sides of the substrate become conductive connected.
Bei einer Ausgestaltung wird der Chip in Flip-Chip-Technik montiert, um ein flaches Chipkartenmodul herzustellen. Dabei wird der Chip zur Kontaktierung leitend mit der strukturierten Metallschicht verbunden.at In one embodiment, the chip is mounted in flip-chip technology, to produce a flat chip card module. This is the chip for contacting conductively connected to the structured metal layer.
Erfindungsgemäß umfasst ein derart herstellbares Chipkartenmodul einen papiernen Träger mit einer ersten und einer zweiten Seite. Eine metallisierte Metallschicht ist auf der Oberfläche zumindest einer Seite des Trägers aufgebracht. Zwi schen der Metallschicht und der Oberfläche des Trägers sind leitfähige Partikel vorgesehen, die die Oberfläche des Trägers direkt berühren. Ein Chip ist auf einer Seite des Trägers angeordnet. Das Chipkartenmodul ist dadurch gekennzeichnet, dass die strukturierte Metallschicht eine Bronzeschicht umfasst. Zur Fixierung kann der Chip geklebt sein.According to the invention, a chip card module that can be produced in this way comprises a paper carrier with a first and a second side. A metallized metal layer is on the surface at least applied to one side of the carrier. Inter mediate the metal layer and the surface of the carrier conductive particles are provided which touch the surface of the carrier directly. A chip is arranged on one side of the carrier. The chip card module is characterized in that the structured metal layer comprises a bronze layer. For fixing the chip can be glued.
Es sei bemerkt, dass der Ausdruck „Chipkartenmodul" nicht mit einer Beschränkung des Einsatzes solcher Module in Chipkarten einhergeht. Auch anderweitiger Einsatz, insbesondere für Ausweise, ist denkbar.It It should be noted that the term "smart card module" not with a restriction the use of such modules in smart cards is associated. Also different Use, especially for Badges, is conceivable.
Weitere vorteilhafte Ausgestaltungen ergeben sich aus den Unteransprüchen.Further advantageous embodiments will become apparent from the dependent claims.
Nachfolgend wird die Erfindung unter Bezugnahme auf die Zeichnung anhand von Ausführungsbeispielen erklärt.following the invention with reference to the drawing based on embodiments explained.
In
dem in
Die
Ein
Ausführungsbeispiel
des Papiers als Träger
Zur
Herstellung dieses Zwischenprodukts wird eine strukturierte Starterschicht
Diese
Starterschicht
In
einem weiteren Schritt werden Löcher
Es
ist vorgesehen, zur Nachverstärkung
eine Kupferschicht
Bei
der Nachverstärkung
wird eine Kupferschicht auf den Wandungen der Löcher abgelagert, die von der
ersten zur zweiten Seite
Falls
für die
Starterschicht
Eine
Bronzeschicht
Es sei bemerkt, dass in einem weiteren Ausführungsbeispiel auf die Nachverstärkung mit Kupfer verzichtet werden kann, um besonders dünne Metallstrukturierungen auszubilden. Dies ist auch kostengünstig.It be noted that in a further embodiment of the Nachverstärkung with Copper can be dispensed with, especially thin metal structures train. This is also inexpensive.
Mit den beschriebenen Verfahrensabläufen sind strukturierte Metallschichten, die dünner als 10 μm, insbesondere dünner als 5 μm, sind, herstellbar. So lassen sich äußerst dünne Chipkartenmodule herstellen. Da Laminieren der Fotoschicht, Belichten und Ätzen beim Herstellungsprozess nicht vorgesehen sind, werden dadurch auch Kosteneinsparungen erreicht und die Umwelt entlastet, da die sonst erforderlichen Ätzchemikalien nicht verwendet werden.With the procedures described are structured metal layers thinner than 10 microns, in particular thinner than 5 μm, are, can be produced. This makes it possible to produce extremely thin chip card modules. Because laminating the photo layer, exposing and etching during the manufacturing process are not provided, thereby cost savings are achieved and relieves the environment, since the otherwise required etching chemicals Not used.
Die oben beschriebenen Prozessschritte werden üblicherweise durchgeführt, wenn der Träger als Endlosstreifen vorliegt. Die Fertigungsschritte werden zunächst auf dem Endlosstreifen durchgeführt. Erst in einem, meist abschließenden Schritt, werden die Chipmodule, beispielsweise durch Ausstanzen, vereinzelt. Auf diese Weise kann eine Vielzahl von Chipmodulen gleichzeitig prozesseffektiv hergestellt werden. In einem Ausführungsbeispiel kann eine Arbeitsbreite von 150 bis 160 mm vorgesehen sein, was vier Spuren mit jeweils 35 mm Breite entspricht. Ein weiteres Ausführungsbeispiel sieht eine Arbeitsbreite von ungefähr 500 mm Breite vor. Ferner sind Ausführungsbeispiele der beschriebenen Prozesse für Endlosbänder bis ungefähr 1500 mm Breite denkbar. Für das Aufbringen der Bronze ist auf Grund des neuen Materials eine Anpassung der Fertigungsanlagen vorzunehmen.The Process steps described above are usually performed when the carrier as Endless strip is present. The production steps are initially on performed the endless strip. Only in one, usually final Step, the chip modules, for example by punching, sporadically. In this way, a plurality of chip modules simultaneously be made processively effective. In one embodiment may a working width of 150 to 160 mm may be provided, which is four Tracks with each 35 mm width corresponds. Another embodiment provides a working width of about 500 mm width. Further are exemplary embodiments the described processes for endless belts until about 1500 mm width conceivable. For the application of the bronze is due to the new material one Adaptation of the production facilities.
Wegen der dünnen galvanischen Schicht hat die Flip-Chip-Kontaktierung Vorteile gegenüber der Wire-Bonding-Kontaktierung. Diese erfolgt üblicherweise über eine monometallische Gold-Gold-Verbindung. Die zu dem Zweck üblicherweise verwendete Schichtdicke von 0,3 μm Gold wäre zudem entsprechend kostenintensiv.Because of the thin one galvanic layer, the flip-chip bonding has advantages over the wire-bonding bonding. These usually takes place via a monometallic gold-gold compound. Which for the purpose usually used layer thickness of 0.3 microns Gold would be also correspondingly costly.
Das
Chipkartenmodul umfasst einen Träger
Ferner
ist ein Chip
Beim
Ausführungsbeispiel
in
Die
Metallisierung
Weitere Ausführungsbeispiele des Chipkartenmoduls können als Dual-Mode-Chipkartenmodul ausgestaltet sein. In solch einem Fall sind zusätzlich zu den Kontaktflächen Bereiche vorgesehen, die zum Kontaktieren einer Spule dienen.Further embodiments of the smart card module can be configured as a dual-mode smart card module. In such a Case are in addition to the contact surfaces Provided areas that are used to contact a coil.
Es sei bemerkt, dass die Merkmale der beschriebenen Ausführungsbeispiele selbstverständlich kombinierbar sind.It It should be noted that the features of the described embodiments Of course can be combined.
Claims (22)
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Citations (6)
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DE19732645A1 (en) * | 1997-07-29 | 1998-09-10 | Siemens Ag | Combination chip card manufacturing method |
DE10145750A1 (en) * | 2001-09-17 | 2003-04-24 | Infineon Technologies Ag | Process for producing a metal layer on a carrier body and carrier body with a metal layer |
DE10145749A1 (en) * | 2001-09-17 | 2003-04-24 | Infineon Technologies Ag | Process for producing a structured metal layer on a carrier body and carrier body with a structured metal layer |
DE10234705A1 (en) * | 2001-10-25 | 2003-05-28 | Infineon Technologies Ag | Electroplating device used in the production of antenna coils, circuit boards and chip card modules comprises an electrolyte bath containing an anode unit and contact units each having electrically conducting regions |
DE10254927A1 (en) * | 2002-11-25 | 2004-06-17 | Infineon Technologies Ag | Process for the production of conductive structures on a carrier |
US20050032267A1 (en) * | 2003-08-05 | 2005-02-10 | Peikang Liu | RFID device and method of making |
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DE19732645A1 (en) * | 1997-07-29 | 1998-09-10 | Siemens Ag | Combination chip card manufacturing method |
DE10145750A1 (en) * | 2001-09-17 | 2003-04-24 | Infineon Technologies Ag | Process for producing a metal layer on a carrier body and carrier body with a metal layer |
DE10145749A1 (en) * | 2001-09-17 | 2003-04-24 | Infineon Technologies Ag | Process for producing a structured metal layer on a carrier body and carrier body with a structured metal layer |
DE10234705A1 (en) * | 2001-10-25 | 2003-05-28 | Infineon Technologies Ag | Electroplating device used in the production of antenna coils, circuit boards and chip card modules comprises an electrolyte bath containing an anode unit and contact units each having electrically conducting regions |
DE10254927A1 (en) * | 2002-11-25 | 2004-06-17 | Infineon Technologies Ag | Process for the production of conductive structures on a carrier |
US20050032267A1 (en) * | 2003-08-05 | 2005-02-10 | Peikang Liu | RFID device and method of making |
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