DE102006023628A1 - Embedded system testing method, involves generating and storing instruction or data till receiving command for transmission of buffer contents to emulator, and transmitting contents to emulator for testing embedded system using interface - Google Patents

Abstract

The method involves generating an instruction and/or data by using a host computer. The instruction and/or data is determined for testing of the embedded system for transmission of data to an emulator. The instructions and/or data are stored in a buffer of the host computer, where the storage step and the generation step are repeated several times till receiving a command for transmission of buffer contents to the emulator. The buffer contents are transmitted to the emulators for testing the embedded system by the host computer using a serial peripheral interface. Independent claims are also included for the following: (1) a computer program product comprising machine-readable instructions (2) a computer for implementing the method for testing an embedded system.

Description

The The present invention relates to a method of testing an embedded one System by means of a host computer.

Background of the invention

There embedded systems do not over the usual Human-machine interfaces dispose of special interfaces for testing and debugging such systems created. For example, serve emulators. Through an emulator can Data and programs loaded into the embedded system as well as the Functions of the processor are controlled and thus tested. For example, can an emulator pause and restart the processor, or the Content of registers of the processor or other with the processor change connected memories.

For a "debugging" embedded Systems are used in particular so-called JTAG emulators. JTAG stands for "Joint Test Action Group "and usually refers to IEEE Standard 1149.1, which is a method for debugging integrated Circuits using "Boundary Scan "describes. A JTAG emulator allows It's a programmer on a JTAG embedded in the System debug module to access debugging.

JTAG Emulators have a JTAG interface, providing access to the embedded system (hereafter called target hardware called) by means of a host computer allows. JTAG emulators serve as a converter between the USB or Ethernet interface the host computer and the JTAG port of the target hardware.

• • Test Data Input (TDI)
• • Test Data Output (TDO)
• • Test ClocK (TCK)
• • Test Mode Select Input (TMS)
• • Test ReSeT (TRST)

JTAG interfaces consist of five control lines:

• • Test Data Input (TDI)
• • Test Data Output (TDO)
• • Test ClocK (TCK)
• • Test Mode Select Input (TMS)
• • Test ReSeT (TRST)

• 1. Der Geschwindigkeit der USB oder Ethernetverbindung zwischen dem Host-Computer und dem Emulator,
• 2. der Geschwindigkeit der JTAG-Verbindung zwischen dem Emulator und der Zielhardware, und
• 3. der Latenzzeit der Verbindung zwischen dem Host-Computer und dem Emulator.

The speed of data throughput between the host computer and the target hardware depends in particular on three factors:

• 1. The speed of the USB or Ethernet connection between the host computer and the emulator,
• 2. The speed of the JTAG connection between the emulator and the target hardware, and
• 3. The latency of the connection between the host computer and the emulator.

ever smaller the individual transactions between the host computer and the emulator are, the bigger the influence of latency. In practice, the latency is a data transfer - depending on the hardware used and the driver used - for example one millisecond. This results in an unnecessarily slow Processing time and, under certain circumstances, problems with the reaction on time-critical processes.

task The invention is at least the disadvantages of the prior art mitigate. In particular, it is an object of the invention, the speed the data throughput between the host computer and the target hardware To increase debugging of embedded systems.

Brief description of the invention

These The object is defined by the features defined in the independent claims Invention solved. advantageous Embodiments of the invention are specified in the subclaims.

According to the invention is a Method for testing an embedded system by means of a by a host computer controllable emulator, with the following steps: (a) generating an instruction and / or data by means of the host computer, the for a test of the embedded system for transmission to the emulator are determined; (b) storing the instruction and / or data in a buffer the host computer; (c) repeating steps (a) several times and (b) until receipt of an instruction to transfer the buffer contents to the emulator; and (d) transmitting the buffer contents to the emulator for testing the embedded system through the host computer.

Of the Emulator is formed for example by a JTAG emulator.

Of the The basic idea of the invention is the intermediate storage of Data (instructions) used by the host computer to debug an embedded Transfer system to the target hardware should be on the host computer. A transfer of the cached Data only takes place when it is actually required. This is in a read access as well as a transfer command by a User / application program the case.

Accordingly, individual data transfers are combined, thus reducing the number of necessary data transfers. Since the time for transfer and thus processing of data is mainly due to the delay of individual transfers through the interface between the host computer and the emulator (e.g. a USB interface), processing time is reduced by combining transmissions. In other words, transferring data from host to target or vice versa - such as debugging or programming the target system - can be faster, the smaller the number of individual transmissions between host and target.

In In a preferred embodiment of the invention, step (d) becomes automatic performed after Expiration of a predetermined time, or if within a predetermined time Period no further data is written to the buffer. In particular, step (d) may be in a separate thread (Thread) performed become. This allows automation and synchronization of data transmission produced between host and emulator; In addition, a certain maximum delay time between saving the data in the buffer and transferring it to the emulator be guaranteed.

In a further advantageous embodiment is to carry out the Step (d) at least one hardware unit provided, in particular a Serial Peripheral Interface (SPI). This will be a high and constant data transmission security ensured. Furthermore Due to the concomitant discharge of the emulator, a higher data throughput is achieved possible.

In In another preferred embodiment, the buffer contents are present execution filled in step (d), so that the amount of data stored therein one or more times of a byte. For the If the hardware unit can transmit only whole bytes, the data transmission can thus complete done by the hardware unit. By this feature is achieved that not only a part of the data volume is transmitted by means of the hardware unit can be (namely complete bytes) while a remainder transferred by software must be (remaining bits). For example, is the amount of data 84 bits, so would without a padding the buffer contents 10 bytes (80 bits) by means of the hardware unit, and the remaining 4 bits are transferred via software. By the Replenishment of the Buffer content is achieved by transferring 11 full bytes through the hardware unit can be; a transmission using software is no longer necessary.

Brief description of the figures

embodiments The invention will now be explained with reference to FIGS. Show it:

1 a flowchart showing the steps of a method for transferring data from a host computer to an embedded system; and

the 2 to 4 the storage states of buffers of a host computer during data transfer between the host computer and an embedded system.

Detailed description the figures

1 FIG. 12 is a flowchart illustrating the steps of a method according to an embodiment of the present invention. FIG. In step 1 For example, data intended for debugging an embedded system is stored in a buffer of a host computer used for debugging. In step 2 It is checked whether the data should be transmitted to an emulator in the embedded system at this time, for example, because a read access to the emulator or a transfer command by a user. If this is not the case, then it becomes a step 1 returned, so that more data can be written to the buffer. This iteration is performed until in step 2 the presence of an instruction to transfer the buffer contents to the emulator is detected.

If there is such a command, the cached data (TDI, TMS) in one step 3 transferred from the buffer to the emulator. In step 4 The TDI / TMS data is transferred from the emulator to the target (the embedded system processor). At the same time, the emulator receives TDO data from the target. In step 5 The TDO data is written by the emulator into the buffer of the host computer, where it can then be evaluated.

In step 6 it is checked if all data has been transferred from the buffer to the emulator. If this is not the case, for example because the memory of the emulator is not sufficient to accommodate the entire TDI / TMS buffer content, then it will become 3 returned. This iteration is performed until all TDI / TMS buffer content has been transferred to the emulator. Subsequently, the output buffer (TDI, TMS) is reset (step 7 ) and to step 1 returned so that new data can be written to the buffer.

The 2 to 4 show the use of buffers for caching data to be transferred from a host computer to an embedded system for debugging, in accordance with an embodiment of the invention. Thereafter, the host computer includes a separate buffer for each of the JTAG interfaces TMS, TDI and TDO. 2 shows the caching of first Da in the output buffers of the TMS and TDI interfaces. This data will not be transferred to the embedded system for the time being. 3 illustrates how further data is written to the output buffers of the TMS and TDI interfaces. Since no transmission to the embedded system has taken place by this time, the input buffer of the JTAG interface TDO remains empty.

The 4 shows the buffer contents after a transfer of the cached data to the embedded system. The output buffers of the interfaces TMS and TDI are now empty. On the other hand, in response to the data transmission, payload data of the embedded system is written in the input buffer of the TDO interface. This user data can then be used for debugging.

The 2 to 4 illustrate how, according to one embodiment of the invention, the transmission of two instructions to the processor of the embedded system is combined into one data transmission. This can reduce the response time of the transmitting host computer and allow more efficient debugging.

At the Writing instructions to the output buffers will become the memory location the data in the buffers also recorded. This allows the Payload that is in response to data transfer to the input buffer be written to the corresponding instructions.

Further embodiments

It It should be noted that the embodiments described above only exemplary nature and the invention further embodiments within the claims certain scope of protection.

Claims (10)

Method for testing an embedded system by means of a host computer controllable emulator, with following steps: (a) generating an instruction and / or data by means of the host computer, the for a test of the embedded system for transmission to the emulator are determined; (b) storing the instruction and / or data in a buffer of the host computer; (c) repeating several times of steps (a) and (b) until receipt of a command to transmit the buffer content to the emulator; and (d) transferring the buffer content to the emulator for testing the embedded system by the host computer. The method of claim 1, wherein the emulator is characterized by a JTAG emulator is formed. The method of claim 1 or 2, wherein the transmitting the buffer contents to the embedded system by a command of the host computer triggered becomes. Method according to claim 1 or 2, wherein step (d) is automatically performed after a predetermined time. Method according to claim 1 or 2, wherein step (d) automatically executed if no repetition within a predetermined period of time of step (b) becomes. Method according to one of the preceding claims, wherein Step (d) is performed in a separate thread (thread). Method according to one of the preceding claims, wherein the buffer contents before carrying out the Step (d) filled up so that the amount of data stored therein is one or more times of a byte. Method according to one of the preceding claims, wherein to carry out of the step (d) at least one hardware unit is provided, for example a Serial Peripheral Interface (SPI). Computer program product comprising machine-readable Instructions that are executed by a computer with a buffer the procedure of one of the preceding Perform claims. Computer comprising: a processor; one Buffer for storing instructions necessary for a test of the embedded Systems for transmission are intended for the embedded system; a JTAG interface to transfer the buffer contents to the embedded embedded testing system Systems through the computer; and machine-readable instructions, the by execution the processor a carry the method according to any one of claims 1 to 8 effect.