DE102006001602A1 - Semiconductor component and production process has metal layer structure between wiring substrate of copper and noble metal layers with an intermediate nickel layer - Google Patents
Semiconductor component and production process has metal layer structure between wiring substrate of copper and noble metal layers with an intermediate nickel layer Download PDFInfo
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- DE102006001602A1 DE102006001602A1 DE102006001602A DE102006001602A DE102006001602A1 DE 102006001602 A1 DE102006001602 A1 DE 102006001602A1 DE 102006001602 A DE102006001602 A DE 102006001602A DE 102006001602 A DE102006001602 A DE 102006001602A DE 102006001602 A1 DE102006001602 A1 DE 102006001602A1
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- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49866—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers characterised by the materials
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- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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Abstract
Description
Die Erfindung betrifft ein Halbleiterbauteil mit einem Umverdrahtungssubstrat und einem auf einer Chipinsel angeordneten Halbleiterchip. Sie betrifft weiter ein Verfahren zur Herstellung eines solchen Halbleiterbauteils.The The invention relates to a semiconductor device having a rewiring substrate and a semiconductor chip arranged on a chip island. It concerns further a method for producing such a semiconductor device.
Zur besseren Ableitung von Wärme ist eine direkte Anbindung des Halbleiterchips an eine metallische Chipinsel insbesondere bei Halbleiterbauteilen mit einer großen Wärmeentwicklung notwendig. Entstehende Wärme kann dann über thermische Durchkontakte zur Rückseite des Substrates abgeführt werden. Als Materialien für metallische Chipinseln kommen aufgrund ihrer günstigen thermischen und elektrischen Eigenschaften vor allem Gold und Kupfer infrage.to better dissipation of heat is a direct connection of the semiconductor chip to a metallic one Chip island, especially in semiconductor devices with a large heat generation necessary. Resulting heat can then over thermal vias to the back be removed from the substrate. As materials for Metallic chip islands come due to their favorable thermal and electrical Properties especially gold and copper in question.
Die Chipinsel kann gleichzeitig mit weiteren metallischen Komponenten des Halbleiterbauteils hergestellt werden, beispielsweise gleichzeitig mit Bondflächen. Die Oberfläche der Bondflächen ist jedoch typischerweise möglichst glatt, damit eine gute Bondbarkeit gewährleistet ist. Wenn die Chipinsel im gleichen Prozess mit den Bondflächen hergestellt wird, ist diese ebenfalls glatt und weist eine Rautiefe von weniger als 0,1 μm auf, so dass keine zuverlässige Haftwirkung des Chipklebers, der den Halbleiterchip auf der Chipinsel fixiert, erzielt werden kann.The Chip island can simultaneously with other metallic components of the semiconductor device, for example, simultaneously with bonding surfaces. The surface the bonding surfaces however, it is typically possible smooth, so that a good bondability is guaranteed. If the chip island is made in the same process with the bonding surfaces is this also smooth and has a surface roughness of less than 0.1 microns, so that no reliable Adhesive effect of the chip adhesive, the semiconductor chip on the chip island fixed, can be achieved.
Wird die Chipinsel aus Kupfer oder einer Kupferlegierung ausgeführt, wirkt sich die starke Oxidationsneigung des Kupfers nachteilig auf die Haftung aus. Außerdem kann es dabei zur störenden Silbermigration kommen, falls zur Verbesserung der Wärmeleitfähigkeit ein mit Silberpartikeln gefüllter Chipklebstoff verwendet wird.Becomes the chip island made of copper or a copper alloy acts the strong tendency to oxidation of the copper adversely affect the Liability. Furthermore it can be annoying Silver migration come in case to improve the thermal conductivity a chip adhesive filled with silver particles is used.
Aufgabe der Erfindung ist es daher, ein Halbleiterbauteil anzugeben, bei dem die Haftung des Chipklebstoffes auf der Chipinsel dauerhaft und auch bei thermischer Belastung zuverlässig gegeben ist.task The invention is therefore to provide a semiconductor device, in the adhesion of the chip adhesive on the chip island permanently and is reliably given even under thermal stress.
Darüber hinaus ist es eine weitere Aufgabe der vorliegenden Erfindung, ein möglichst einfaches Verfahren zur Herstellung eines solchen Halbleiterbauteils anzugeben.Furthermore It is another object of the present invention, a possible simple method for producing such a semiconductor device specify.
Erfindungsgemäß wird diese Aufgabe mit dem Gegenstand der unabhängigen Patentansprüche gelöst. Vorteilhafte Weiterbildungen der Erfindung sind Gegenstand der abhängigen Patentansprüche.According to the invention this Problem solved with the subject of the independent claims. advantageous Further developments of the invention are the subject of the dependent claims.
Ein erfindungsgemäßes Halbleiterbauteil mit einem Umverdrahtungssubstrat mit Bondflächen und einem auf einer Chipinsel angeordneten Halbleiterchip weist auf dem als Chipinsel vorgesehenen Bereich des Umverdrahtungssubstrates eine Metallbeschichtungsstruktur auf, die zumindest eine zum Umverdrahtungssubstrat gerichtete Basisschicht aus Kupfer oder einer Kupferlegierung, eine zum Chip gerichtete Deckschicht aus zumindest einer Edelmetalllage und zwischen der Basis- und der Deckschicht zumindest eine Zwischenschicht aus Nickel oder einer Nickellegierung umfasst. Die Zwischenschicht weist eine Grenzfläche zu der Deckschicht auf, wobei die Grenzfläche eine mittlere Rautiefe tm aufweist mit 0,1 μm ≤ tm ≤ 3,0 μm.A semiconductor component according to the invention having a rewiring substrate with bonding pads and a semiconductor chip arranged on a chip island has a metal coating structure on the region of the rewiring substrate which is at least one base layer made of copper or a copper alloy facing the rewiring substrate, a cover layer made of at least one noble metal layer facing the chip and between the base and top layers at least one intermediate layer of nickel or a nickel alloy. The intermediate layer has an interface with the cover layer, the interface having a mean surface roughness t m of 0.1 μm ≦ t m ≦ 3.0 μm.
Auch auf den Bondflächen kann diese Metallbeschichtungsstruktur aufgebracht sein. Es ist aber auch möglich, bei der Bil dung der Bondflächen beispielsweise auf die Zwischenschicht mit der rauen Grenzfläche zu verzichten.Also on the bonding surfaces This metal coating structure can be applied. But it is also possible, for example, in the case of bonding surfaces to dispense with the intermediate layer with the rough interface.
Die Erfindung geht von der Überlegung aus, dass die Haftung des Halbleiterchips auf der Chipinsel durch eine raue Struktur der Oberfläche und somit eine größere Kontaktfläche zwischen der Oberfläche der Chipinsel und dem Chipkleber verbessert werden kann. Eine raue Oberfläche lässt sich durch das galvanische Abscheiden beispielsweise von Nickel oder Nickelverbindungen erzielen. Andererseits sind aber Eigenschaften wie die Korrosionsbeständigkeit von Edelmetallen besonders günstig für die Oberflächen von Chipinsel und Bondflächen. Um die Vorteile beider Materialien zu kombinieren, wird ein Mehrschichtsystem auf die Oberflächen von Chipinsel und Bondflächen aufgebracht.The Invention goes from consideration from that the adhesion of the semiconductor chip on the chip island by a rough structure of the surface and thus a larger contact area between the surface of the Chip island and the chip adhesive can be improved. A rough surface can be by the electrodeposition of, for example, nickel or nickel compounds achieve. On the other hand, properties such as corrosion resistance of precious metals particularly favorable for the Surfaces of Chip island and bonding surfaces. To combine the advantages of both materials becomes a multi-layer system on the surfaces of chip island and bonding surfaces applied.
Auf eine spiegelglatte Oberfläche von Chipinsel und Bondflächen wird also bewusst zugunsten der besseren Hafteigenschaften der rauen Struktur verzichtet. Dabei wird die raue Struktur durch die Nickel oder eine Nickellegierung aufweisende Zwischenschicht realisiert.On a mirror-smooth surface of chip island and bonding surfaces becomes aware of the better adhesive properties of the rough ones Structure omitted. The rough structure is replaced by the nickel or realized a nickel alloy having intermediate layer.
Vorteilhafterweise ist der auf der Chipinsel angeordnete Halbleiterchip durch einen Chipklebstoff auf der Chipinsel fixiert. Der Chipklebstoff kann zur Verbesserung seiner Wärmeleitfähigkeit Silberpartikel aufweisen. Zur Ableitung von Wärme weist das Umverdrahtungssubstrat im Bereich der Chipinsel vorteilhafterweise thermische Durchkontakte auf.advantageously, is arranged on the chip island semiconductor chip by a Chip adhesive fixed on the chip island. The chip adhesive can to improve its thermal conductivity Have silver particles. For the dissipation of heat, the rewiring substrate in the area of the chip island advantageously thermal vias on.
Die mittlere Rautiefe der Grenzfläche der mittleren Metalllage ist vorteilhafterweise so groß, dass die Oberfläche der Chipinsel eine hohe Haftfähigkeit zu dem Chipklebstoff aufweist. Andererseits darf die mittlere Rautiefe der Grenzflä che auch nicht so groß sein, dass die Bondbarkeit der Bondflächen beeinträchtigt ist. Wenn der Einfachheit halber die Metalllagen auf Chipinsel und Bondflächen in demselben Prozess abgeschieden werden, muss zwischen diesen beiden Anforderungen ein Kompromiss gefunden werden.The average surface roughness of the interface the middle metal layer is advantageously so large that the surface the chip island a high adhesion to the chip adhesive. On the other hand, the average surface roughness the Grenzflä surface also not be that big that the bondability of the bonding surfaces is impaired. For simplicity, the metal layers on chip island and bonding pads in The same process must be separated between these two Requirements a compromise can be found.
Für die Dicke du der kupferhaltigen Basisschicht der Beschichtungsstruktur gilt vorteilhafterweise 2 μm ≤ du ≤ 50 μm und für die Gesamtdicke do der Deckschicht 0,1 μm ≤ do ≤ 1,5 μm. Besonders vorteilhaft sind Werte von 10 μm ≤ du ≤ 25 μm, 0,1 μm ≤ do ≤ 1,0 μm und 0,1 μm ≤ tm ≤ 2,5 μm.For the thickness d u of the copper base Layer of the coating structure is advantageously 2 microns ≤ d u ≤ 50 microns and for the total thickness d o of the top layer 0.1 microns ≤ d o ≤ 1.5 microns. Particularly advantageous values of 10 microns ≤ d u ≤ 25 microns, 0.1 microns ≤ d o ≤ 1.0 microns and 0.1 microns ≤ t m ≤ 2.5 microns.
Das erfindungsgemäße Halbleiterbauteil hat den Vorteil, dass der Halbleiterchip durch die Rauhigkeit der Oberfläche auch unter thermischer Belastung besonders zuverlässig und dauerhaft auf der Chipinsel haftet. Gleichzeitig kann die Rauhigkeit aber so gering gehalten werden, dass die Bondbarkeit der Bondflächen nicht beeinträchtigt ist.The inventive semiconductor device has the advantage that the semiconductor chip by the roughness of surface especially reliable under thermal stress permanently adheres to the chip island. At the same time, however, the roughness can be kept so low that the bondability of the bonding surfaces not impaired is.
Darüber hinaus schützen die Edelmetalllagen der Deckschicht die darunter liegenden Schichten vor Oxidation und Korrosion und bilden eine Barriere für Silberpartikel des Chipklebstoffes und verhindern auf diese Weise ihre unerwünschte Migration in die darunter liegenden Schichten.Furthermore protect the noble metal layers of the topcoat the underlying layers from oxidation and corrosion and form a barrier to silver particles of the chip adhesive and thus prevent their unwanted migration in the underlying layers.
Nach der vorliegenden Erfindung umfasst ein Verfahren zur Herstellung eines Halbleiterbauteils folgende Schritte: Zunächst wird ein Umverdrahtungssubstrat mit einem als Chipinsel vorgesehenen Bereich und einer Anzahl von Bondflächenbereichen bereitgestellt. Auf dem Umverdrahtungssubstrat wird unter Bilden einer Chipinsel eine Kupfer oder eine Kupferlegierung aufweisende Basisschicht durch selektives galvanisches oder chemisches Abscheiden aufgebracht, die die Basis schicht einer mehrschichtigen Metallbeschichtungsstruktur darstellt.To The present invention comprises a process for the preparation of a semiconductor device, the following steps: First, a rewiring substrate with an area provided as a chip island and a number of Bond surface areas provided. On the rewiring substrate, forming a chip island a copper or a copper alloy having base layer applied selective electroplating or chemical deposition, which is the base layer of a multilayer metal coating structure represents.
Darauf wird ebenfalls durch selektives galvanisches Abscheiden eine raue Zwischenschicht aus Nickel oder einer Nickellegierung aufgebacht, die mit einer weiteren Schicht, nämlich einer Palladium und/oder Edelmetalle aufweisenden Deckschicht, abgedeckt wird. Anschließend wird ein Halbleiterchip auf die mit der Metallbeschichtungsstruktur versehene Chipinsel aufgebracht und mit Hilfe eines Chipklebstoffes fixiert. Die Zwischenschicht hat eine Grenzfläche zu der Deckschicht und die Grenzfläche weist eine mittlere Rautiefe tm auf mit 0,1 μm ≤ tm ≤ 2,0 μm.Then, by selective electrodeposition, a rough intermediate layer of nickel or a nickel alloy is applied, which is covered with a further layer, namely a cover layer comprising palladium and / or noble metals. Subsequently, a semiconductor chip is applied to the chip island provided with the metal coating structure and fixed with the aid of a chip adhesive. The intermediate layer has an interface with the cover layer and the interface has an average surface roughness t m of 0.1 μm ≦ t m ≦ 2.0 μm.
Die gleiche Metallbeschichtungsstruktur kann auch auf den als Bondflächen vorgesehenen Bereichen des Umverdrahtungssubstrats abgeschieden werden. Damit erhalten auch die Bondflächen eine raue Oberfläche. Ist dies nicht gewünscht, können die Bondflächenbereiche vor dem Abscheiden der gesamten Metallbeschichtungsstruktur oder lediglich vor dem Abscheiden der Zwischenschicht mit einer Photolackschicht geschützt werden.The the same metal coating structure can also on the areas provided as bonding surfaces of the redistribution substrate. Get it also the bond pads one rough surface. If this is not desired, can the bond area areas before depositing the entire metal coating structure or only before depositing the intermediate layer with a photoresist layer protected become.
Die gewünschte Rautiefe der Zwischenschicht aus Nickel oder einer Nickellegierung kann besonders einfach durch eine Variation der Stromdichten beim Abscheiden des Nickels auf der Basisschicht erzielt werden. Dabei können verschiedene Strukturen der rauen Oberfläche der Zwischenschicht realisiert werden, die entweder mehr kugelförmige Konturen aufweisen oder dendritische Konturen zeigen oder stachelförmige oder faserige Konturen bilden. In allen Fällen wird die Verankerung des Chipklebstoffes auf oder an der rauen Grenzschicht stark verbessert.The desired Roughness depth of the intermediate layer of nickel or a nickel alloy can be particularly easy due to a variation of the current densities Depositing the nickel can be achieved on the base layer. there can realized different structures of the rough surface of the intermediate layer which are either more spherical Contours or show dendritic contours or spiny or form fibrous contours. In all cases, the anchoring of the chip adhesive greatly improved on or at the rough boundary layer.
Vor dem Abscheiden der unteren Metalllage werden vorteilhafterweise Bereiche der Oberfläche des Umverdrahtungssubstrats mit einer Photolackschicht geschützt, auf denen keine untere kupferhaltige Metalllage und/oder keine Metallbeschichtungsstruktur abgeschieden werden soll.In front the deposition of the lower metal layer are advantageously Areas of the surface of the Redistribution substrate protected with a photoresist layer, on which no lower copper-containing metal layer and / or no metal coating structure should be deposited.
Mit dem erfindungsgemäßen Verfahren lässt sich eine stark verbesserte Haftung des Chipklebstoffes und damit des Halbleiterchips auf der Chipinsel erzielen. Das Halbleiterbauteil ist somit auch unter Belastung wesentlich zuverlässiger und die Gefahr einer Delamination des Halbleiterchips ist stark verringert. Zudem lässt sich diese Wirkung mit dem erfindungsgemäßen Verfahren besonders einfach erzielen. Es ist nämlich nicht notwendig, zusätzliche Maßnahmen zur Verbesserung der Haftwirkung des Chipklebstoffes zu ergreifen und zusätzliche Prozessschritte einzuführen.With the method according to the invention let yourself a greatly improved adhesion of the chip adhesive and thus the Achieve semiconductor chips on the chip island. The semiconductor device is thus much more reliable under load and the risk of Delamination of the semiconductor chip is greatly reduced. In addition, can be this effect with the method according to the invention is particularly simple achieve. It is not necessary, additional measures to improve the adhesion of the chip adhesive and additional Introduce process steps.
Vielmehr werden die ohnehin vorhandenen Prozessschritte beim Abscheiden eines Standardaufbaus mit Kupfer-, Nickel- und Goldschichten genutzt und lediglich Prozessparameter wie die Stromdichte kurzzeitig variiert, um die gewünschte Haftwirkung zu erzielen. Somit ist das erfindungsgemäße Verfahren technisch besonders einfach und schnell und damit kostengünstig umsetzbar.Much more become the already existing process steps in the deposition of a Standard construction with copper, nickel and gold layers used and only process parameters such as the current density varies for a short time, to the desired To achieve adhesion. Thus, the inventive method is technical particularly easy and fast and therefore cost-effective implementation.
Ausführungsbeispiele der Erfindung werden im folgenden anhand der beigefügten Figuren näher erläutert.embodiments The invention will be described below with reference to the accompanying drawings explained in more detail.
Gleiche Teile sind in beiden Figuren mit den gleichen Bezugszeichen versehen.Same Parts are provided in both figures with the same reference numerals.
Thermische
Durchkontakte
Die
Chipinsel
Die
Oberfläche
Die
Chipinsel
Die
Dicken der einzelnen Schichten der Metallbeschichtungsstruktur
Die
Zwischenschicht
Die
raue Struktur der Oberseite
Eine
mittlere Rautiefe tm zwischen 0,1 μm und 3,0 μm ist vorteilhaft,
weil bei dieser Rautiefe gleichzeitig eine gute Haftvermittlung
erzielt und die Bondbarkeit der Bondflächen
- 11
- HalbleiterbauteilSemiconductor device
- 22
- Umverdrahtungssubstratinterposer substrate
- 33
- HalbleiterchipSemiconductor chip
- 44
- Chipinselchip island
- 55
- BondflächeBond area
- 66
- KontaktanschlussflächeContact pad
- 77
- BonddrähteBond wires
- 88th
- Chipklebstoffchip adhesive
- 99
- thermischer Durchkontaktthermal by contact
- 1010
- Basisschichtbase layer
- 1111
- Zwischenschichtinterlayer
- 1212
- Deckschichttopcoat
- 1313
- Rückseiteback
- 1414
- Oberseite der Chipinseltop the chip island
- 1515
- MetallbeschichtungsstrukturMetal coating structure
- 1616
- Oberseite der Deckschichttop the topcoat
- 1717
- raue Grenzflächerough interface
- do d o
- Dicke der Deckschichtthickness the topcoat
- du d u
- Dicke der Basisschichtthickness the base layer
- tm t m
- mittlere Rautiefemiddle roughness
Claims (16)
Priority Applications (1)
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DE102006001602A DE102006001602A1 (en) | 2006-01-11 | 2006-01-11 | Semiconductor component and production process has metal layer structure between wiring substrate of copper and noble metal layers with an intermediate nickel layer |
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DE102006001602A DE102006001602A1 (en) | 2006-01-11 | 2006-01-11 | Semiconductor component and production process has metal layer structure between wiring substrate of copper and noble metal layers with an intermediate nickel layer |
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DE102006001602A1 true DE102006001602A1 (en) | 2007-05-24 |
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Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4786545A (en) * | 1986-02-28 | 1988-11-22 | Seiko Epson Corporation | Circuit substrate and method for forming bumps on the circuit substrate |
US6593643B1 (en) * | 1999-04-08 | 2003-07-15 | Shinko Electric Industries Co., Ltd. | Semiconductor device lead frame |
US20040232534A1 (en) * | 2003-05-22 | 2004-11-25 | Shinko Electric Industries, Co., Ltd. | Packaging component and semiconductor package |
-
2006
- 2006-01-11 DE DE102006001602A patent/DE102006001602A1/en not_active Ceased
Patent Citations (3)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4786545A (en) * | 1986-02-28 | 1988-11-22 | Seiko Epson Corporation | Circuit substrate and method for forming bumps on the circuit substrate |
US6593643B1 (en) * | 1999-04-08 | 2003-07-15 | Shinko Electric Industries Co., Ltd. | Semiconductor device lead frame |
US20040232534A1 (en) * | 2003-05-22 | 2004-11-25 | Shinko Electric Industries, Co., Ltd. | Packaging component and semiconductor package |
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