DE102005038760A1 - Metal-ceramic hybrid substrate for power-semiconductor components, has top metal layer structured into conductor paths and pads - Google Patents
Metal-ceramic hybrid substrate for power-semiconductor components, has top metal layer structured into conductor paths and pads Download PDFInfo
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- DE102005038760A1 DE102005038760A1 DE102005038760A DE102005038760A DE102005038760A1 DE 102005038760 A1 DE102005038760 A1 DE 102005038760A1 DE 102005038760 A DE102005038760 A DE 102005038760A DE 102005038760 A DE102005038760 A DE 102005038760A DE 102005038760 A1 DE102005038760 A1 DE 102005038760A1
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-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/12—Mountings, e.g. non-detachable insulating substrates
- H01L23/14—Mountings, e.g. non-detachable insulating substrates characterised by the material or its electrical properties
- H01L23/15—Ceramic or glass substrates
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/498—Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
- H01L23/49838—Geometry or layout
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0271—Arrangements for reducing stress or warp in rigid printed circuit boards, e.g. caused by loads, vibrations or differences in thermal expansion
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/34—Arrangements for cooling, heating, ventilating or temperature compensation ; Temperature sensing arrangements
- H01L23/36—Selection of materials, or shaping, to facilitate cooling or heating, e.g. heatsinks
- H01L23/373—Cooling facilitated by selection of materials for the device or materials for thermal expansion adaptation, e.g. carbon
- H01L23/3735—Laminates or multilayers, e.g. direct bond copper ceramic substrates
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/03—Use of materials for the substrate
- H05K1/0306—Inorganic insulating substrates, e.g. ceramic, glass
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/03—Conductive materials
- H05K2201/0332—Structure of the conductor
- H05K2201/0335—Layered conductors or foils
- H05K2201/0355—Metal foils
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09218—Conductive traces
- H05K2201/09263—Meander
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09654—Shape and layout details of conductors covering at least two types of conductors provided for in H05K2201/09218 - H05K2201/095
- H05K2201/09745—Recess in conductor, e.g. in pad or in metallic substrate
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Geometry (AREA)
- Chemical & Material Sciences (AREA)
- Ceramic Engineering (AREA)
- Structure Of Printed Boards (AREA)
Abstract
Description
Die Erfindung betrifft ein Metall-Keramik-Hybridsubstrat zur Aufnahme von Leistungs-Halbleiterbauelementen.The The invention relates to a metal-ceramic hybrid substrate for receiving of power semiconductor devices.
Im Bereich der Leistungselektronik, insbesondere bei Leistungsendstufen, sind aufgrund der hohen Ströme und Verlustleistungen konventionelle Substrate bzw. Schaltungsträger, z.B. Leiterplatten, im Allgemeinen nicht verwendbar. Daher werden zum Teil Metall-Keramik-Hybridsubstrate in Sandwich-Bauweise mit einer Keramikplatte und Metallbeschichtungen verwendet.in the Range of power electronics, in particular at power output stages, are due to the high currents and power dissipation conventional substrates, e.g. Circuit boards, generally not usable. Therefore, become Part of sandwiched metal-ceramic hybrid substrates with a Ceramic plate and metal coatings used.
DBC- (direkt bonded copper) Substrate werden aus einer Keramikplatte mit einer oberen Metallschicht gebildet; vorteilhafterweise ist oftmals ergänzend eine untere Metallschicht vorgesehen. Die beiden Werkstoffe werden bei hoher Temperatur unter Ausbildung einer Spinell-Verbindung miteinander verbunden. Durch den Unterschied der thermischen Ausdehnungskoeffizienten treten beim Abkühlen auf Raumtemperaturen und im Betrieb mechanische Spannungen im Substrat auf.DBC (directly bonded copper) Substrates are made of a ceramic plate formed with an upper metal layer; is advantageous often complementary a lower metal layer is provided. The two materials will be at high temperature to form a spinel connection with each other. Due to the difference of the thermal expansion coefficient occur on cooling at room temperatures and in operation mechanical stresses in the substrate on.
Neben DBC-Substraten sind weiterhin auch andere Metall-Keramik-Hybridsubstrate bzw. Hybridschaltungsträger auf Metall-Keramik-Basis bekannt, bei denen jedoch im Allgemeinen zwischen den Metallschichten und der Keramikplatte ein Lot angebracht wird. Die Metall-Keramik-Hybridsubstrate werden im Allgemeinen mit ihrer Unterseite, d.h. mit der Unterseite der Keramikplatte oder vorteilhafterweise mit der unteren Metallschicht, auf einer Wärmesenke, z.B. einem Metallträger, montiert.Next DBC substrates are also other metal-ceramic hybrid substrates or Hybrid circuit carriers known on metal-ceramic basis, which, however, in general a solder is placed between the metal layers and the ceramic plate becomes. The metal-ceramic hybrid substrates are generally used with its underside, i. with the underside of the ceramic plate or advantageously with the lower metal layer, on a heat sink, e.g. a metal carrier, assembled.
Zur Ausbildung einer elektrischen Schaltung wird im Allgemeinen die obere Metallschicht in einem Ätzschritt strukturiert. Aufgrund der Vorspannungen im Materialsandwich und der Strukturierung kommt es zu einer Änderung des Spannungszustandes und einer Deformation des Substrates, der sich vor allem unterhalb der Ecken und Kanten des Metalls in der Keramik äußert. Durch aktive (Bestromung des Leistungsbauelementes) und passive (Umgebungsbedingungen) Temperaturwechsel, weiterhin auch durch die jeweiligen Einbaubedingungen (z. B. die Befestigung des Substrates auf einer Grundplatte) und lokale Kräfte durch aufgebrachte Bauelemente kann es zu Beschädigungen und hierdurch zum Versagen derartiger Schichtsysteme kommen; bei DBC-Substraten kann hierbei insbesondere eine Rissinitiierung in der Keramik auftreten. Da sich hierbei die Metallschicht muschelförmig abhebt, wird dieser Versagungsmechanismus als Muschelbruch bezeichnet. Bei AMB-Substraten können auch andere Schadensbilder auftreten, z. B. eine Delamination.to Training an electrical circuit is generally the upper metal layer in an etching step structured. Due to the biases in the material sandwich and The structuring leads to a change of the stress state and a deformation of the substrate, which is mainly below the corners and edges of the metal in the ceramic expresses. By active (energizing of the power component) and passive (environmental conditions) temperature changes, furthermore also by the respective installation conditions (eg the Mounting the substrate on a base plate) and local forces Applied components may cause damage and thereby to Failure of such layer systems come; in DBC substrates In this case crack initiation in the ceramic in particular occur. As the metal layer stands out like a shell, this refusal mechanism becomes referred to as mussel breakage. For AMB substrates can also other damage patterns occur, eg. B. a delamination.
Derartige Risse und Muschelbrüche treten insbesondere am Ende von Leiterbahnen auf, an denen sich durch unterschiedliches thermisches Ausdehnungsverhalten erzeugte – im allgemeinen nicht gleichmäßige – mechanische Spannungen addieren. Da gerade an den Enden der Leiterbahnen jedoch meist Funktionsflächen, z.B. Bondbereiche, angeordnet sind, ist ein Versagen an diesen Stellen besonders kritisch.such Cracks and shell breaks occur in particular at the end of printed conductors on which produced by different thermal expansion behavior - in general not uniform - mechanical Add voltages. However, especially at the ends of the tracks, mostly Functional surfaces, e.g. Bond areas that are arranged is a failure at these locations especially critical.
Zum
Abbau der mechanischen Spannungen werden herkömmlicherweise verschiedene
Maßnahmen
durchgeführt;
so wird zum Teil der Randbereich der Metallstrukturelemente derartig
designed, dass ein stetiger oder stufenweiser Übergang vom Metall zur Keramik
erreicht wird. Entsprechend können
die metallischen Strukturelemente in ihrem Randbereich auch perforiert
werden; die Ausbildung derartiger Strukturen und Konstruktionselemente
ist z. B. in der
Weiterhin können die Bauelemente auf einzelne, voneinander getrennte Module verteilt werden, so dass die Flächen und der thermisch induzierte Belastungsanteil kleiner werden. Hierdurch steigt jedoch zum einen der Gesamtflächenbedarf und insbesondere die Produktionskosten. Weitere Maßnahmen können der Eingriff in Materialparameter (z. B. die Veränderung der Textur der Keramik oder der Duktilität und Kristallstruktur des Metalls), der Eingriff in den Verbindungsprozess (Zeit, Temperaturprofil) oder die Wahl von anderen, in der Regel teureren Materialien sein. Hierbei können die im Allgemeinen als Metallbleche aufgebrachten Metallschichten an der Keramik mit aufwendigeren Verbindungsverfahren angebracht werden, was jedoch im Allgemeinen die Herstellungskosten erhöht.Farther can the components distributed to individual, separate modules be so that the surfaces and the thermally induced load fraction become smaller. hereby However, on the one hand, the overall demand for space is increasing, and in particular the production costs. Further measures can be the intervention in material parameters (eg the change the texture of the ceramic or the ductility and crystal structure of the Metal), the intervention in the connection process (time, temperature profile) or the choice of other, usually more expensive materials. in this connection can the metal layers generally applied as metal sheets attached to the ceramic with more complex connection method which, however, generally increases manufacturing costs.
Die
Das erfindungsgemäße Metall-Keramik-Hybridsubstrat weist demgegenüber einige Vorteile auf.The Inventive metal-ceramic hybrid substrate indicates in contrast some advantages.
Erfindungsgemäß werden somit wohl die Leiterbahnen mit Winkeln größer als 90° und entsprechend die Pads mit konvexen stumpfwinkligen Ecken, d.h. mit Winkeln größer als 90° und kleiner 180°, ausgebildet. Vorteilhafterweise sind die Pads als stumpfwinklige Vielecke mit mehr als vier Ecken ausgebildet, und die Leiterbahnen in mehrere, über stumpfe Ecken miteinander verbundene Leiterbahnabschnitte unterteilt.Thus, according to the invention, the printed conductors with angles greater than 90 ° and correspondingly the pads with convex obtuse-angled corners, ie with angles greater than 90 ° and less than 180 °, are thus formed. Advantageously, the pads are formed as obtuse-angled polygons with more than four corners, and divided the interconnects into a plurality of interconnected via blunt corners interconnect sections.
Erfindungsgemäß wird somit eine Modifikation der Schaltungsstrukturierung vorgenommen, um die Lebensdauer des Metall-Keramik-Hybridsubstrates zu erhöhen. Durch die erfindungsgemäße Strukturierung werden 90°-Ecken, an denen sich aus zwei Richtungen kommende Spannungen zu Spannungsspitzen addieren können, vermieden. Die entlang langer Kanten bzw. Leiterbahnen auftretenden Spannungen werden erfindungsgemäß auf kleinere Bereiche verteilt, wobei die Wirkrichtung der thermischen Kräfte einmal oder mehrmals verändert wird.Thus, according to the invention a modification of the circuit structuring made to the Life of the metal-ceramic hybrid substrate to increase. By structuring the invention are 90 ° corners, where voltages coming from two directions to voltage spikes can add avoided. The occurring along long edges or traces Voltages are inventively smaller Distributed areas, where the direction of action of the thermal forces once or changed several times becomes.
Weiterhin können ganz oder teilweise auf die eingangs genannten zusätzlichen Konstruktionselemente in den Metallschichten und Ätzgruben, die die Lebensdauer des Substrates erhöhen sollen und vor allem in den Ecken und Kanten angeordnet werden und zusätzliche Fläche erfordern, vermieden werden.Farther can in whole or in part to the aforementioned additional Construction elements in the metal layers and etching pits, which should increase the life of the substrate and especially in can be arranged at the corners and edges and require additional area to be avoided.
Vorteilhafterweise wird eine Strukturierung der Metallschicht in eine Vielzahl von Strukturelementen vorgenommen, die insbesondere regelmäßige Sechsecke, aber z.B. auch regelmäßige oder unregelmäßige Fünf-, Sieben- oder Achtecke sein können. Bei einer derartigen Strukturierung der Metallfläche können sowohl die Pads als auch die Leiterbahnen durch entsprechende Aneinanderreihung angrenzender Strukturelemente ausgebildet werden. Der Verlauf der Leiterbahnen kann der Form der jeweiligen Vielecke angepasst werden. Hierbei können die jeweils auftretenden Kanten bzw. Ecken der Strukturelemente nach außen abgerundet werden. Weiterhin kann in an sich bekannter Weise zum gleichmäßigen Spannungsabbau eine stufenweise oder kontinuierliche Verdünnung der Schichtdicke, auch durch Ätzgruben oder Perforationen, vorgenommen werden.advantageously, is a structuring of the metal layer in a variety of Structural elements, in particular regular hexagons, but e.g. also regular or irregular five-, seven- or octagons. In such a structuring of the metal surface, both the pads and the interconnects by appropriate juxtaposition adjacent Structural elements are formed. The course of the tracks can be adapted to the shape of the respective polygons. in this connection can they respectively occurring edges or corners of the structural elements Outside rounded off. Furthermore, in a conventional manner for uniform voltage reduction a gradual or continuous thinning of the layer thickness, too through etching pits or perforations.
Durch die Ausbildung derartiger Vielecke können auftretende mechanische Spannungen in mehrere Richtungen verteilt werden, so dass gegenüber der rechteckigen, herkömmlichen Ausbildung von Flächen und Leiterbahnen eine gleichmäßigere Spannungs- bzw. Kraftverteilung und weiterhin eine gleichmäßigere Wärmeableitung möglich ist.By the formation of such polygons can occur mechanical Voltages are distributed in several directions, so that opposite the rectangular, conventional Training of areas and tracks a more even voltage or force distribution and further a more uniform heat dissipation is possible.
Insbesondere bei Ausbildung entsprechender Sechsecke als Struktur elemente mit anschließender Verrundung der äußeren Ecken, können sowohl Rechteckformen nachgebildet als auch z.B. im Wesentlichen kreisförmige Elemente gebildet werden. Die Leiterbahnen können hierbei zwischen den Pads hindurchgeführt werden, statt wie bei herkömmlichen Architekturen an den Außenseiten über große Wege geführt zu werden.Especially in training appropriate hexagons as a structure elements with followed by Rounding of the outer corners, can both rectangular shapes simulated and e.g. essentially circular Elements are formed. The tracks can be between the pads passed instead of conventional ones Architectures on the outsides over great paths guided to become.
Die erfindungsgemäßen Schaltungen mit dem erfindungsgemäßen Metall-Keramiksubstrat können auch vergossen werden.The inventive circuits with the metal-ceramic substrate according to the invention can also to be shed.
Die Erfindung wird im Folgenden anhand der beiliegenden Zeichnungen an einigen Ausführungsformen erläutert. Es zeigen:The Invention will be described below with reference to the accompanying drawings on some embodiments explained. Show it:
- a) ein herkömmlicherweise realisierter Leiterbahn-Verlauf,
- b) ein herkömmlicherweise als ideal angesehener, aber kaum realisierbarer Leiterbahn-Verlauf,
- c) ein erfindungsgemäßer Leiterbahn-Verlauf bzw. Leiterbahn-Architektur,
- a) a conventionally realized trace course,
- b) a conductor track course, which is conventionally regarded as ideal, but hardly realizable
- c) an inventive track trace or trace architecture,
Gemäß
Das
Substrat
Die
Herstellung der Metall-Keramik-Substrate
Erfindungsgemäß sind in
der oberen Metallschicht
Erfindungsgemäß werden
nunmehr Leiterbahnen
Erfindungsgemäß kann vorteilhafterweise eine
sechszählige
Symmetrie bzw. Wabenstruktur für die
Ausbildung von Pads
Alternativ
zu regelmäßigen Sechsecken
Die
Strukturelemente
Claims (14)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005038760A DE102005038760A1 (en) | 2005-08-17 | 2005-08-17 | Metal-ceramic hybrid substrate for power-semiconductor components, has top metal layer structured into conductor paths and pads |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
DE102005038760A DE102005038760A1 (en) | 2005-08-17 | 2005-08-17 | Metal-ceramic hybrid substrate for power-semiconductor components, has top metal layer structured into conductor paths and pads |
Publications (1)
Publication Number | Publication Date |
---|---|
DE102005038760A1 true DE102005038760A1 (en) | 2007-02-22 |
Family
ID=37697249
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Application Number | Title | Priority Date | Filing Date |
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DE102005038760A Withdrawn DE102005038760A1 (en) | 2005-08-17 | 2005-08-17 | Metal-ceramic hybrid substrate for power-semiconductor components, has top metal layer structured into conductor paths and pads |
Country Status (1)
Country | Link |
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DE (1) | DE102005038760A1 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008042035A1 (en) | 2008-09-12 | 2010-03-18 | Robert Bosch Gmbh | Semiconductor arrangement and method for producing a semiconductor device |
-
2005
- 2005-08-17 DE DE102005038760A patent/DE102005038760A1/en not_active Withdrawn
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
DE102008042035A1 (en) | 2008-09-12 | 2010-03-18 | Robert Bosch Gmbh | Semiconductor arrangement and method for producing a semiconductor device |
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