DE102004063406B8 - Device and arrangement for preventing plasma damage - Google Patents

Device and arrangement for preventing plasma damage Download PDF

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Publication number
DE102004063406B8
DE102004063406B8 DE102004063406A DE102004063406A DE102004063406B8 DE 102004063406 B8 DE102004063406 B8 DE 102004063406B8 DE 102004063406 A DE102004063406 A DE 102004063406A DE 102004063406 A DE102004063406 A DE 102004063406A DE 102004063406 B8 DE102004063406 B8 DE 102004063406B8
Authority
DE
Germany
Prior art keywords
arrangement
plasma damage
preventing plasma
preventing
damage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE102004063406A
Other languages
German (de)
Other versions
DE102004063406B4 (en
DE102004063406A1 (en
Inventor
Jae Hee Kim
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
DB HiTek Co Ltd
Original Assignee
Dongbu Electronics Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Dongbu Electronics Co Ltd filed Critical Dongbu Electronics Co Ltd
Publication of DE102004063406A1 publication Critical patent/DE102004063406A1/en
Application granted granted Critical
Publication of DE102004063406B4 publication Critical patent/DE102004063406B4/en
Publication of DE102004063406B8 publication Critical patent/DE102004063406B8/en
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
    • H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
    • H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H01L21/76832—Multiple layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823475—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type interconnection or wiring or contact manufacturing related aspects
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76—Unipolar devices, e.g. field effect transistors
    • H01L29/772—Field effect transistors
    • H01L29/78—Field effect transistors with field effect produced by an insulated gate
    • H01L29/7833—Field effect transistors with field effect produced by an insulated gate with lightly doped drain or source extension, e.g. LDD MOSFET's; DDD MOSFET's
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232—Field-effect technology
    • H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
    • H01L21/823437—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type with a particular manufacturing method of the gate conductors, e.g. particular materials, shapes
DE102004063406A 2003-12-31 2004-12-23 Device and arrangement for preventing plasma damage Expired - Fee Related DE102004063406B8 (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
KR10-2003-0101298A KR100540061B1 (en) 2003-12-31 2003-12-31 Method for preventing plasma damage
KR10-2003-0101298 2004-12-31

Publications (3)

Publication Number Publication Date
DE102004063406A1 DE102004063406A1 (en) 2005-11-10
DE102004063406B4 DE102004063406B4 (en) 2006-07-06
DE102004063406B8 true DE102004063406B8 (en) 2006-11-02

Family

ID=36641101

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102004063406A Expired - Fee Related DE102004063406B8 (en) 2003-12-31 2004-12-23 Device and arrangement for preventing plasma damage

Country Status (4)

Country Link
US (2) US7247580B2 (en)
JP (1) JP2005197741A (en)
KR (1) KR100540061B1 (en)
DE (1) DE102004063406B8 (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20130086663A (en) 2012-01-26 2013-08-05 삼성전자주식회사 Semiconductor device

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3931127C2 (en) * 1988-09-20 1996-05-23 Mitsubishi Electric Corp Method of manufacturing a semiconductor device

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR970009053B1 (en) * 1993-12-27 1997-06-03 Hyundai Electronics Ind Manufacturing method of semiconductor device
JP3466796B2 (en) * 1995-10-24 2003-11-17 松下電器産業株式会社 Method for manufacturing semiconductor device
JPH104092A (en) * 1996-06-14 1998-01-06 Nec Corp Method of fabricating semiconductor device
US5866482A (en) * 1996-09-27 1999-02-02 Taiwan Semiconductor Manufacturing Company, Ltd. Method for masking conducting layers to abate charge damage during plasma etching
TW384526B (en) * 1998-07-01 2000-03-11 United Microelectronics Corp Device structure for preventing the device from damage caused by plasma charging and vertical interference and the manufacturing method
US6211051B1 (en) * 1999-04-14 2001-04-03 Lsi Logic Corporation Reduction of plasma damage at contact etch in MOS integrated circuits
US6277723B1 (en) * 1999-10-14 2001-08-21 Taiwan Semiconductor Manufacturing Company Plasma damage protection cell using floating N/P/N and P/N/P structure
US6110841A (en) * 1999-10-14 2000-08-29 United Microelectronics Corp. Method for avoiding plasma damage
JP2001308074A (en) * 2000-04-26 2001-11-02 Hitachi Ltd Method of manufacturing semiconductor integrated circuit device
JP4789421B2 (en) * 2003-03-12 2011-10-12 三星電子株式会社 Semiconductor device having photon absorption film and method for manufacturing the same
US6806096B1 (en) * 2003-06-18 2004-10-19 Infineon Technologies Ag Integration scheme for avoiding plasma damage in MRAM technology
US20050067702A1 (en) * 2003-09-30 2005-03-31 International Business Machines Corporation Plasma surface modification and passivation of organo-silicate glass films for improved hardmask adhesion and optimal RIE processing

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3931127C2 (en) * 1988-09-20 1996-05-23 Mitsubishi Electric Corp Method of manufacturing a semiconductor device

Also Published As

Publication number Publication date
US7247580B2 (en) 2007-07-24
KR100540061B1 (en) 2005-12-29
JP2005197741A (en) 2005-07-21
KR20050069323A (en) 2005-07-05
US20060148235A1 (en) 2006-07-06
DE102004063406B4 (en) 2006-07-06
DE102004063406A1 (en) 2005-11-10
US7332796B2 (en) 2008-02-19
US20070228430A1 (en) 2007-10-04

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Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8181 Inventor (new situation)

Inventor name: KIM, JAE HEE, KYONGGI, KR

8327 Change in the person/name/address of the patent owner

Owner name: DONGBU ELECTRONICS CO.,LTD., SEOUL/SOUL, KR

8396 Reprint of erroneous front page
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee

Effective date: 20140701