DE102004017858A1 - Organic field effect transistor has narrow strip type conductor drain and source electrodes, a gate dielectric and a gate electrode that overlaps the narrow strips of the drain and source electrodes - Google Patents

Abstract

Organic field effect transistor (1) has drain (2) and source (3) electrodes as well as a gate dielectric (5) that is isolated from the drain and source and a partially overlapping gate electrode (6). The drain and source electrodes are configured as narrow strip conductors extending in a first lateral direction (x). The gate electrode is arranged in a perpendicular direction (y) and extends over the gate and source electrodes for defined distances (B2, B3). The widths correspond to the overlap lengths of the FET.

Description

The The invention relates to an organic field-effect transistor with drain and source electrode, and one through a gate dielectric from the drain and source electrodes isolated and the drain and source electrode at least partially overlapping Gate electrode.

FETs come for many years in a wide range of electronic Applications are used, for example in the realization of microprocessors, Semiconductor memories and flat screens, in mobile phones, in automotive electronics, medical technology and countless others Application fields. Many of these products not only play the static properties of the transistors (ie the dependence of the drain current from the gate-source voltage and the drain-source voltage in the steady state), but also their dynamic properties an important role. Under the dynamic characteristics of the transistors is the time-resolved Switching behavior, that is the time dependence the electrical output signals in response to input side electrical impulses, understood.

The dynamic properties of a field effect transistor are through a variety of factors are determined, being generally between intrinsic Factors and parasitic Factors can be distinguished. About the intrinsic factors counting for example, the mobility of the electronic charge carriers in the semiconductor (this means, the maximum determined by the choice of semiconductor material Speed of the charge carriers dependent on from the accelerating electric field strength) and the channel length of the Transistor (that is the distance that the charge carriers make on their way between Source and drain in the semiconductor must cover). To the parasitic factors counting for example, the electrical resistances of the source and drain contacts and the electrical capacities, resulting from the overlap areas between Gate electrode and source and drain contact result.

There the time delays, which are subject to electrical signals in transistor circuits, generally behave in proportion to the parasitic capacitances and resistances (τ ~ R × C) it for the sake of a possible good dynamic behavior of the transistors required parasitic Sizes so far as possible to minimize. The minimization of parasitic capacitances and resistances is an essential goal of material and process development in the Semiconductor industry.

at Silicon field effect transistors are the overlap areas (and thus the overlap capacity) between the gate electrode and the source and drain contacts less through the design rules rather than the clever choice of materials and process parameters Are defined.

In Silicon MOSFETs are the source and drain contacts by introducing of dopant into the silicon by diffusion or ion implantation generated. This happens self-aligned, that is, when introducing the dopant ensures the gate electrode for a shading of the channel region in which no doping is desired, so that the doping takes place exactly at the edge of the gate electrode. In the subsequent temperature-controlled activation of the introduced Dopants diffuse slightly below the gate electrode, so that overlap the gate electrode results in each case with the source and drain electrodes, referred to as Überlapplänge Δ1 becomes. This overlap ΔL must on the one hand greater than Zero to ensure reliable control of the carrier density on the entire length between Ensure source and drain; On the other hand, the overlap length should be so small be as possible to minimize the overlap capacity. The overlap capacity is proportional to the overlap length. By Clever choice of parameters for temperature-controlled activation the introduced dopants, the overlap length can be set almost arbitrarily small It is only a few nanometers in modern silicon MOSFETs. consequently Thanks self-adjustment in the definition of contact regions the silicon MOSFETs whose overlap capacity is almost be made arbitrarily small.

in the Field effect transistors based on organic semiconductor layers, as they increasingly for one Variety of cost-effective, large area and mechanically flexible electronic applications are discussed is a doping of the contact regions and thus a self-aligned Definition of contacts not possible. In principle, the electrical conductivity of many organic Although semiconductor also by introducing suitable organic or inorganic dopants, but fails the reliable contact doping in organic field effect transistors in the absence of the necessary positional selectivity, since the introduced dopants in organic semiconductors are often not are bound to specific positions, but within the Move materials freely. Even if the doping process originally on the contact regions limited could be it would come later to a movement of the dopants through the entire organic semiconductor layer, which causes the electrical switching behavior and the life significantly degrade the transistors.

consequently become in the production of organic field effect transistors the Source and drain contacts not by a doping of the semiconductor defined, but only by the direct contact of the undoped (more specifically, the non-targeted doped) organic Semiconductor with a metallically conductive contact material, ie either an inorganic metal, such as gold, or a conductive Polymer, such as polyaniline. While introducing dopants in a silicon wafer self-alignment of the contact regions in an elegant way by means of the shading of the doping process the gate electrode brought about is, the definition of the contacts in organic transistors exclusively by the targeted structuring of the conductive contact material. A self-aligned design Although this structuring is possible in principle, for example by backside exposures by an (optically transparent) substrate, however, are such Selbstjustier processes much more complex than with silicon MOSFETs and with the general Claim organic transistors with low complexity and low Manufacturing costs in principle incompatible.

In the enclosed 2 and 3 simplified schematic cross-sections of conventional in the art organic field effect transistors in two different designs are shown.

According to 2 lie on a lower substrate 11 in the vertical z-direction, a gate electrode 16 , a gate electrode 16 insulating gate dielectric 15 , above each a drain electrode 12 and a source electrode 13 and the latter are of an organic semiconductor layer 14 covered.

In the in 3 Construction shown on the substrate 11 first the drain electrode 12 and the source electrode 13 , above the organic semiconductor layer 14 and over this the insulating gate dielectric 15 and as the upper layer, the gate electrode 16 educated. Regardless of the in the 2 and 3 As shown, the overlap length ΔL results above all from the accuracy with which the second metal layer (in FIG 2 the drain electrode 12 and the source electrode 13 and in 3 the gate electrode 16 ) over the first already structured metal layer (the gate electrode 16 according to 2 and the drain electrode 12 and source electrode 13 according to 3 ) is adjusted and structured.

4 shows a schematic layout view of a prior art organic field effect transistor, the in 2 and 3 corresponds to shown schematic cross-sectional views. The overlap ΔL results from the accuracy of the adjustment of the metal layer of the gate electrode 16 relative to the metal layer of the drain electrode 12 and the source electrode 13 or vice versa.

The accuracy with which subsequent layers can be adjusted to existing structures is highly dependent on the mechanical properties of the substrate 11 from. Commercial applications for organic transistors are currently being discussed particularly in connection with particularly inexpensive, mechanically flexible substrate materials, such as packaging films and paper. Such materials are typically characterized by significant mechanical distortion, that is, the substrate changes shape during processing due to the uptake and release of organic solvents and thermal stress. For many of these materials, the mechanical distortion may be so great that it may significantly exceed the size of the structures to be defined, especially near the edges of very large substrates. Since the substrate distortion is not calculable in the rule, when using a structure according to the 2 to 4 a secure adjustment of the metal layers over the entire substrate surface can only be guaranteed if the draft overlap ΔL is defined as large as the expected maximum distortion. This generally leads to very large overlap capacities and, as a result, to relatively poor dynamic transistor properties.

That with the in 4 The problem associated with the design shown is that the overlap length is determined solely by the accuracy with which the second (upper) metal layer is aligned and patterned over the first already structured (lower) metal layer.

to Minimization of the overlap ΔL in organic Field effect transistors on substrates, which by a significant mechanical distortion during the processing of the transistors are characterized, it is necessary through innovative design rules the dependence of the minimum overlap length of cancel the adjustment accuracy.

It is therefore an object of the invention to provide an organic field effect transistor of the type mentioned so that the determined by the parasitic capacitances in field effect transistors dynamic properties are significantly improved. In this case, the invention aims less at those field effect transistors which are produced on the surface of monocrystalline silicon wafers, but especially at organic field effect transistors which are produced on substrates which during the processing of Transistors undergo a significant mechanical distortion.

These Task is solved according to the claim.

According to one The essential aspect is a generic organic field effect transistor thereby characterized in that the drain and source electrodes are substantially in shape in a first lateral direction running narrow strip-shaped interconnects are formed so that the gate electrode in each case in the one Defined transverse to the first lateral direction lying second lateral direction Width of the drain and source electrode tracks projected on both sides, so that this width in each case coincides with the overlap length of the field effect transistor.

With this design is the overlap length not by the adjustment between the gate electrode and the source and drain electrodes but only by the width of the drain and Sourceelektrodenleitbahnen determined by the (for example metallic) gate electrode surmounted on both sides become. The distortion of the substrate thus has no influence on the overlap length ΔL. Consequently have all the organic field effect transistors on the substrate independent of whose default is the same overlap length. Thereby the dispersion of the dynamic electrical parameters is clear minimized or approximate suppressed.

The smallest overlap ΔL, the at the organic according to the invention Field effect transistor can be achieved is identical to the minimum width with the running under the gate electrode interconnects the drain and source electrodes can be safely defined. This Width dimension is from is determined by a number of factors, but is in each case independent of Warpage of the substrate. Under certain conditions, for example with significant substrate distortion, is the minimum achievable Structure size significantly less than the adjustment accuracy; In these cases, the inventive design leads for one organic field effect transistor to a significant reduction the overlap capacities and thus significantly improved dynamic properties.

Prefers run the drain and source electrode tracks in the section where they are surmounted by the gate electrode on both sides, parallel. As well preferred there have the drain and Source electrode baffles substantially the same width. there the gate electrode may be rectangular his and two shorter Pages in the first lateral direction and two on the shorter sides subsequent longer pages in the second lateral direction. For the formation of contact areas for the drain and Sourceelektrodenleitbahnen, the latter in the first lateral direction at least over one the longer one Protruding sides of the gate electrode.

at an embodiment the gate electrode and the gate dielectric are in the vertical direction under the drain and source electrode tracks and the organic Semiconductor layer formed. Alternatively, the gate electrode and the gate dielectric also over the drain and source electrode patterns and the organic semiconductor layer be formed.

The Drain and Sourceelektrodenleitbahnen consist in an organic according to the invention Field effect transistor either made of metal or alternatively of one electrically conductive Polymer.

In a prior art comparative example of an organic field effect transistor, in the substrate material polyethylene terephthalate often used for the fabrication of organic transistors, substrate distortion is usually about 0.1%. Polyethylene terephthalate is an inexpensive film material, as is commonly used in the packaging industry. On a substrate with an edge length of about 10 cm, this corresponds to a distortion of up to 100 microns, that is, when using the design according to 4 the overlap length ΔL would have to be set to at least 100 μm in order to ensure reliable adjustment of the metal layers over the entire substrate surface.

at the for an organic according to the invention Field effect transistor used design rule is defined by the definition for example, 5 microns wide Drain and Sourceelektrodenleitbahnen the overlap length on the entire substrate to exactly 5 μm established. This reduces the overlap capacities and thus the signal delay times by a factor of 20 compared to the example described above a known organic field effect transistor. this is a significant improvement of the dynamic properties of organic field effect transistors formed in such a substrate.

The above and further advantageous features of an organic according to the invention Field effect transistor will be in the following description of a preferred embodiment closer to the drawing explained. The drawing figures show in detail:

1 a schematic layout view of an embodiment of an organic field effect transistor according to the invention;

2 and 3 simplified schematic cross-sectional views of known organic field effect transistors in two different designs (already described above), and

4 a schematic layout view of the prior art organic field effect transistor, wherein the overlap length from the accuracy of the adjustment of two metal layers results (already described above).

These Invention describes an organic field effect transistor, in that the overlap length is not by the adjustment between gate electrode and drain and Sourceelektrodenleitbahnen but solely determined by their width.

1 shows a schematic layout view in plan view of an embodiment of an organic field effect transistor according to the invention, in which the overlap ΔL alone by the width B2 and B3 each of a drain and Sourceelektrodenleitbahn 2 and 3 is defined.

In this configuration, for each of the four functional layers to be structured, namely gate electrode 6 , Gate dielectric 5 (in 1 not shown directly), Drainelektrodenleitbahn 2 , Source Electrode Track 3 and organic semiconductor layer 4 made a chromium mask, which allows the structuring of the deposited layers by means of photolithographic processes. On a flexible (not shown) polyethylene terephthalate substrate, an approximately 30 nm thick layer of aluminum is applied by thermal evaporation, which is patterned by means of photolithography and wet chemical etching in aqueous potassium hydroxide solution to the first (lower) metal layer (gate electrode). 6 define. Around the gate dielectric 5 from an appropriate organic solvent (for example, propylene glycol monomethyl ether acetate, PGMEA), an approximately 200 nm thick layer of polyvinylphenol is spin-on, crosslinked thermally (at about 200 ° C.), and by photolithography and etching in an oxygen plasma structured. In the third step, an approximately 30 nm thick layer of gold is evaporated and the drain electrode located in the second metal layer by means of photolithography and wet-chemical etching 2 and source electrode 3 Are defined. To form the organic semiconductor layer 4 Finally, an approximately 30 nm thick layer of pentacene vapor-deposited and patterned by photolithography (with the aid of a water-soluble photoresist) and plasma etching.

Thus, in the in 1 illustrated embodiment of an organic field effect transistor according to the invention 1 the drain and source electrodes 2 . 3 in the form of narrow strip-shaped interconnects running essentially in the x-direction, in such a way that the gate electrode 6 the width B2 and B3 respectively defined in the y-direction running at right angles to the x-direction, in each case of the drain-electrode conducting path 2 and the source electrode trace 3 surmounted on both sides, so that these widths B2 and B3 are each the overlap length ΔL of this organic field-effect transistor 1 Are defined. The degree to which the gate electrode 6 the drain and source electrode tracks 2 and 3 projected on both sides, is in principle based on other design criteria, but should not fall below the respective widths B2, B3.

After the above realized in the 1 shown embodiment of an organic field effect transistor 1 a structure with lying in a first (bottom) metal layer gate electrode 6 overlying gate dielectric 5 and drain and source electrode patterns disposed in a second (upper) metal layer 2 and 3 as well as over this lying organic semiconductor layer 4 , Of course, another embodiment of an organic field effect transistor (not shown) according to the invention may also have a vertical structure similar to that in FIG 3 illustrated example of the prior art. At the in 1 illustrated embodiment run the Drainelektrodenleitbahn 2 and the source electrode conductive path 3 at least in the area where it is from the gate electrode 6 be projected on both sides, parallel and their widths B2 and B3 are preferably the same size. The gate electrode 6 is rectangular, has a smaller extent in the first lateral direction x than in the second lateral direction y, and its shorter sides are parallel to the drain and source electrode patterns 2 . 3 , Further, both the drain electrode lead 2 as well as the Sourceelektrodenleitbahn 3 at least in the x-direction on one side of the gate electrode 6 beyond these to contact surfaces or connection pads 8th and 9 or to form vias (not shown).

The gate electrode 6 may be made of aluminum or of an electrically conductive polymer. The drain and source electrode tracks 2 . 3 may for example consist of gold or also of an electrically conductive polymer.

At the in 1 shown embodiment of an organic field effect transistor according to the invention 1 the overlap length ΔL is not determined by the alignment between the gate electrode and the source and drain electrodes but solely by the widths B2 and B3 of the drain electrode track 2 and the source electrode trace 3 in the area where it is from the gate electrode 6 be surmounted on both sides. The delay of (in 1 not shown) substrate thus has no influence on the overlap length. Thus, all have on the Subst rat formed organic field effect transistors regardless of the distortion of the substrate, the same overlap length, whereby the scattering of the dynamic electrical parameters is significantly minimized or almost eliminated.

1

organic Field Effect Transistor

2, 3, 12, 13

drain and source electrode patterns

4; 14

organic Semiconductor layer

5; 15

gate dielectric

6; 16

gate electrode

8th, 9

contact pads

11

substratum

.DELTA.L

overlap length

x, Y Z

spatial coordinates

Claims (10)

Organic field effect transistor ( 1 ) with drain and source electrode ( 2 . 3 ) and one through a gate dielectric ( 5 ) from the drain and source electrodes ( 2 . 3 ) and the drain and source electrodes ( 2 . 3 ) at least partially overlapping gate electrode ( 6 ), characterized in that the drain and source electrodes ( 2 . 3 ) are formed in the form substantially narrow in a first lateral direction (x) narrow strip-shaped interconnects such that the gate electrode ( 6 ) the widths (B2, B3) of the drain and source electrode tracks defined in each case in the second lateral direction (y) lying transverse to the first lateral direction (x) ( 2 . 3 ) projected on both sides, so that this width (B2, B3) in each case with the overlap length (.DELTA.L) of the field effect transistor ( 1 ) matches. Organic field effect transistor according to claim 1, characterized in that the first lateral direction (x) with the second lateral direction (y) forms a right angle. Organic field effect transistor according to claim 1 or 2, characterized in that the drain and source electrode tracks ( 2 . 3 ) under the gate electrode ( 6 ) run parallel. Organic field effect transistor according to one of the preceding claims, characterized in that the drain and source electrode tracks ( 2 . 3 ) under the gate electrode ( 6 ) have substantially the same width (B2, B3). Organic field-effect transistor according to one of the preceding claims, characterized in that the gate electrode ( 6 ) is rectangular with two shorter sides in the first lateral direction (x) and two longer sides following the shorter sides in the second lateral direction (y). Organic field effect transistor according to claim 5, characterized in that the drain and source electrode tracks ( 2 . 3 ) in the first lateral direction (x) on at least one of the longer sides via the gate electrode (10) 6 ) go out. Organic field-effect transistor according to one of the preceding claims, characterized in that the gate electrode ( 6 ) and the gate dielectric ( 5 ) in the vertical direction (z) under the drain and source electrode tracks ( 2 . 3 ) and the organic semiconductor layer ( 4 ) lie. Organic field-effect transistor according to one of Claims 1 to 6, characterized in that the gate electrode ( 6 ) and the gate dielectric ( 5 ) over the drain and source electrode tracks ( 2 . 3 ) and the organic semiconductor layer ( 4 ) lie. Organic field effect transistor according to one of the preceding claims, characterized in that the drain and source electrode tracks ( 2 . 3 ) consist of metal. Organic field effect transistor according to one of claims 1 to 8, characterized in that the drain and Sourceelektrodenleitbahnen from an electrically conductive Polymer exist.