DE102004015017A1 - Erzeugung von mechanischen und elektrischen Verbindungen zwischen den Oberflächen zweier Substrate - Google Patents

Erzeugung von mechanischen und elektrischen Verbindungen zwischen den Oberflächen zweier Substrate Download PDF

Info

Publication number
DE102004015017A1
DE102004015017A1 DE102004015017A DE102004015017A DE102004015017A1 DE 102004015017 A1 DE102004015017 A1 DE 102004015017A1 DE 102004015017 A DE102004015017 A DE 102004015017A DE 102004015017 A DE102004015017 A DE 102004015017A DE 102004015017 A1 DE102004015017 A1 DE 102004015017A1
Authority
DE
Germany
Prior art keywords
layer
substrates
semiconductor material
joining
mechanical
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
DE102004015017A
Other languages
English (en)
Other versions
DE102004015017B4 (de
Inventor
Erwin Hacker
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Original Assignee
Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV filed Critical Fraunhofer Gesellschaft zur Forderung der Angewandten Forschung eV
Priority to DE102004015017A priority Critical patent/DE102004015017B4/de
Publication of DE102004015017A1 publication Critical patent/DE102004015017A1/de
Application granted granted Critical
Publication of DE102004015017B4 publication Critical patent/DE102004015017B4/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/50Multistep manufacturing processes of assemblies consisting of devices, each device being of a type provided for in group H01L27/00 or H01L29/00
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16135Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
    • H01L2224/16145Disposition the bump connector connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip the bodies being stacked
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • H01L2224/8182Diffusion bonding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • H01L2224/8384Sintering
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01013Aluminum [Al]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01029Copper [Cu]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01032Germanium [Ge]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/0105Tin [Sn]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01068Erbium [Er]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01072Hafnium [Hf]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/0132Binary Alloys
    • H01L2924/01322Eutectic Alloys, i.e. obtained by a liquid transforming into two solid phases

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Pressure Welding/Diffusion-Bonding (AREA)

Abstract

Ein Verfahren zur Herstellung einer mechanischen und elektrischen Verbindung zwischen zwei Substraten umfaßt zunächst den Schritt des Bereitstellens der Substrate mit einer metallischen Schicht auf einer Oberfläche von jedem der Substrate und einer Schicht aus amorphem Halbleitermaterial auf den metallischen Schichten. Die Halbleitermaterialschichten werden mechanisch aneinandergefügt, woraufhin die metallischen Schichten und die amorphen Halbleitermaterialschichten erwärmt werden, so daß zwischen den metallischen Schichten und den Halbleitermaterialschichten eine Diffusion zur Erzeugung einer Legierung stattfindet.
DE102004015017A 2004-03-26 2004-03-26 Erzeugung von mechanischen und elektrischen Verbindungen zwischen den Oberflächen zweier Substrate Expired - Fee Related DE102004015017B4 (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
DE102004015017A DE102004015017B4 (de) 2004-03-26 2004-03-26 Erzeugung von mechanischen und elektrischen Verbindungen zwischen den Oberflächen zweier Substrate

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE102004015017A DE102004015017B4 (de) 2004-03-26 2004-03-26 Erzeugung von mechanischen und elektrischen Verbindungen zwischen den Oberflächen zweier Substrate

Publications (2)

Publication Number Publication Date
DE102004015017A1 true DE102004015017A1 (de) 2005-10-20
DE102004015017B4 DE102004015017B4 (de) 2006-11-16

Family

ID=35033920

Family Applications (1)

Application Number Title Priority Date Filing Date
DE102004015017A Expired - Fee Related DE102004015017B4 (de) 2004-03-26 2004-03-26 Erzeugung von mechanischen und elektrischen Verbindungen zwischen den Oberflächen zweier Substrate

Country Status (1)

Country Link
DE (1) DE102004015017B4 (de)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2994935A1 (de) * 2013-07-05 2016-03-16 EV Group E. Thallner GmbH Verfahren zum bonden von metallischen kontaktflächen unter lösen einer auf einer der kontaktflächen aufgebrachten opferschicht in mindestens einer der kontaktflächen

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0238066A2 (de) * 1986-03-18 1987-09-23 Fujitsu Limited Verfahren zur Ausführung der Adhäsion zwischen Scheiben aus Silizium oder Siliziumdioxid
US5380598A (en) * 1992-03-05 1995-01-10 Westinghouse Brake & Signal Holdings Ltd. Solder joint
WO1997030474A1 (en) * 1996-02-13 1997-08-21 Northrop Grumman Corporation DIE ATTACHED SiC AND DIE ATTACH PROCEDURE FOR SiC
FR2798224A1 (fr) * 1999-09-08 2001-03-09 Commissariat Energie Atomique Realisation d'un collage electriquement conducteur entre deux elements semi-conducteurs.

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP0238066A2 (de) * 1986-03-18 1987-09-23 Fujitsu Limited Verfahren zur Ausführung der Adhäsion zwischen Scheiben aus Silizium oder Siliziumdioxid
US5380598A (en) * 1992-03-05 1995-01-10 Westinghouse Brake & Signal Holdings Ltd. Solder joint
WO1997030474A1 (en) * 1996-02-13 1997-08-21 Northrop Grumman Corporation DIE ATTACHED SiC AND DIE ATTACH PROCEDURE FOR SiC
FR2798224A1 (fr) * 1999-09-08 2001-03-09 Commissariat Energie Atomique Realisation d'un collage electriquement conducteur entre deux elements semi-conducteurs.

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
Mirza,A.R., Ayon, A.A.: Silicon wafer bonding for MEMS manufacturing. In: Solid State Technology, ISSN 0038-111X, August 1999, S.73-78 *

Cited By (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP2994935A1 (de) * 2013-07-05 2016-03-16 EV Group E. Thallner GmbH Verfahren zum bonden von metallischen kontaktflächen unter lösen einer auf einer der kontaktflächen aufgebrachten opferschicht in mindestens einer der kontaktflächen
EP3301706A1 (de) * 2013-07-05 2018-04-04 EV Group E. Thallner GmbH Verfahren zum bonden von teilweise metallischen kontaktflächen zweier substrate mittels mehrerer übereinander aufgebrachter opferschichten, bevorzugt einer festen opferschicht und einer flüssigen opferschicht
CN110310896A (zh) * 2013-07-05 2019-10-08 Ev 集团 E·索尔纳有限责任公司 用于接合基板的接触表面的方法
TWI775080B (zh) * 2013-07-05 2022-08-21 奧地利商Ev集團E塔那有限公司 用於接觸表面之接合之方法
CN110310896B (zh) * 2013-07-05 2023-08-15 Ev 集团 E·索尔纳有限责任公司 用于接合基板的接触表面的方法
TWI826971B (zh) * 2013-07-05 2023-12-21 奧地利商Ev集團E塔那有限公司 用於接觸表面之接合之方法

Also Published As

Publication number Publication date
DE102004015017B4 (de) 2006-11-16

Similar Documents

Publication Publication Date Title
WO2004053947A3 (en) Titanium silicon nitride (tisin) barrier layer for copper diffusion
TW200737403A (en) A method of fabricating a composite substrate with improved electrical properties
FR2874745A1 (fr) Plaque semiconductrice presentant une structure stratifiee avec de faibles warp et bow, et procedes pour sa preparation
TW200603251A (en) Semiconductor device and method for forming the same
WO2001006546A3 (en) Silicon on iii-v semiconductor bonding for monolithic optoelectronic integration
WO2007087196A3 (en) Advanced ceramic heater for substrate processing
TW200701335A (en) Nitride semiconductor device and manufacturing mathod thereof
EP1385215A3 (de) Nitrid-Halbleiterbauelement mit einem gebondeten Substrat und entsprechendes Herstellungsverfahren
WO2006015246A3 (en) Method and system for fabricating a strained semiconductor layer
TW200744120A (en) Semiconductor structure, semiconductor wafer and method for fabricating the same
WO2004001810A3 (en) Coplanar integration of lattice-mismatched semiconductor with silicon via wafer boning virtual substrates
EP1383165A3 (de) Abziehmethode
WO2004021420A3 (en) Fabrication method for a monocrystalline semiconductor layer on a substrate
SG166786A1 (en) Methods of fabricating interconnects for semiconductor components
SG152141A1 (en) Soi substrates with a fine buried insulating layer
WO2008125543A3 (en) Method for reducing the thickness of substrates
TW200627598A (en) Semiconductor device and a method for manufacturing thereof
TW200518263A (en) Method for fabricating copper interconnects
TW200629462A (en) Supporting plate attaching method
MY147005A (en) Method for bonding a semiconductor substrate to a metal subtrate
TW200746356A (en) Semiconductor integrated circuit device and method for manufacture thereof
TW200746330A (en) Microelectronic assembly with back side metallization and method for forming the same
AU2003247130A1 (en) Method of transferring of a layer of strained semiconductor material
CN112567495A (zh) 半导体结构及其形成方法
TW200616190A (en) The fabrication method of the wafer and the structure thereof

Legal Events

Date Code Title Description
OP8 Request for examination as to paragraph 44 patent law
8364 No opposition during term of opposition
R119 Application deemed withdrawn, or ip right lapsed, due to non-payment of renewal fee